target/arm: Add missing clear_tail calls
[qemu/ar7.git] / scripts / tracetool / format / c.py
blob833c05a0228739e4da1084d9f19dee9a0c1e75ba
1 #!/usr/bin/env python
2 # -*- coding: utf-8 -*-
4 """
5 trace/generated-tracers.c
6 """
8 __author__ = "Lluís Vilanova <vilanova@ac.upc.edu>"
9 __copyright__ = "Copyright 2012-2014, Lluís Vilanova <vilanova@ac.upc.edu>"
10 __license__ = "GPL version 2 or (at your option) any later version"
12 __maintainer__ = "Stefan Hajnoczi"
13 __email__ = "stefanha@linux.vnet.ibm.com"
16 from tracetool import out
19 def generate(events, backend, group):
20 active_events = [e for e in events
21 if "disable" not in e.properties]
23 if group == "root":
24 header = "trace-root.h"
25 else:
26 header = "trace.h"
28 out('/* This file is autogenerated by tracetool, do not edit. */',
29 '',
30 '#include "qemu/osdep.h"',
31 '#include "%s"' % header,
32 '')
34 for e in events:
35 out('uint16_t %s;' % e.api(e.QEMU_DSTATE))
37 for e in events:
38 if "vcpu" in e.properties:
39 vcpu_id = 0
40 else:
41 vcpu_id = "TRACE_VCPU_EVENT_NONE"
42 out('TraceEvent %(event)s = {',
43 ' .id = 0,',
44 ' .vcpu_id = %(vcpu_id)s,',
45 ' .name = \"%(name)s\",',
46 ' .sstate = %(sstate)s,',
47 ' .dstate = &%(dstate)s ',
48 '};',
49 event = e.api(e.QEMU_EVENT),
50 vcpu_id = vcpu_id,
51 name = e.name,
52 sstate = "TRACE_%s_ENABLED" % e.name.upper(),
53 dstate = e.api(e.QEMU_DSTATE))
55 out('TraceEvent *%(group)s_trace_events[] = {',
56 group = group.lower())
58 for e in events:
59 out(' &%(event)s,', event = e.api(e.QEMU_EVENT))
61 out(' NULL,',
62 '};',
63 '')
65 out('static void trace_%(group)s_register_events(void)',
66 '{',
67 ' trace_event_register_group(%(group)s_trace_events);',
68 '}',
69 'trace_init(trace_%(group)s_register_events)',
70 group = group.lower())
72 backend.generate_begin(active_events, group)
73 for event in active_events:
74 backend.generate(event, group)
75 backend.generate_end(active_events, group)