target-arm: get_phys_addr_lpae: more xn control
[qemu/ar7.git] / target-moxie / helper.c
blob6c98965b93201806d82d61ba088a44730339504d
1 /*
2 * Moxie helper routines.
4 * Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <stdio.h>
21 #include <string.h>
22 #include <assert.h>
24 #include "config.h"
25 #include "cpu.h"
26 #include "mmu.h"
27 #include "exec/exec-all.h"
28 #include "exec/cpu_ldst.h"
29 #include "qemu/host-utils.h"
30 #include "exec/helper-proto.h"
32 /* Try to fill the TLB and return an exception if error. If retaddr is
33 NULL, it means that the function was called in C code (i.e. not
34 from generated code or from helper.c) */
35 void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
36 uintptr_t retaddr)
38 int ret;
40 ret = moxie_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
41 if (unlikely(ret)) {
42 if (retaddr) {
43 cpu_restore_state(cs, retaddr);
46 cpu_loop_exit(cs);
49 void helper_raise_exception(CPUMoxieState *env, int ex)
51 CPUState *cs = CPU(moxie_env_get_cpu(env));
53 cs->exception_index = ex;
54 /* Stash the exception type. */
55 env->sregs[2] = ex;
56 /* Stash the address where the exception occurred. */
57 cpu_restore_state(cs, GETPC());
58 env->sregs[5] = env->pc;
59 /* Jump the the exception handline routine. */
60 env->pc = env->sregs[1];
61 cpu_loop_exit(cs);
64 uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
66 if (unlikely(b == 0)) {
67 helper_raise_exception(env, MOXIE_EX_DIV0);
68 return 0;
70 if (unlikely(a == INT_MIN && b == -1)) {
71 return INT_MIN;
74 return (int32_t)a / (int32_t)b;
77 uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
79 if (unlikely(b == 0)) {
80 helper_raise_exception(env, MOXIE_EX_DIV0);
81 return 0;
83 return a / b;
86 void helper_debug(CPUMoxieState *env)
88 CPUState *cs = CPU(moxie_env_get_cpu(env));
90 cs->exception_index = EXCP_DEBUG;
91 cpu_loop_exit(cs);
94 #if defined(CONFIG_USER_ONLY)
96 void moxie_cpu_do_interrupt(CPUState *cs)
98 CPUState *cs = CPU(moxie_env_get_cpu(env));
100 cs->exception_index = -1;
103 int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
104 int rw, int mmu_idx)
106 MoxieCPU *cpu = MOXIE_CPU(cs);
108 cs->exception_index = 0xaa;
109 cpu->env.debug1 = address;
110 cpu_dump_state(cs, stderr, fprintf, 0);
111 return 1;
114 #else /* !CONFIG_USER_ONLY */
116 int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
117 int rw, int mmu_idx)
119 MoxieCPU *cpu = MOXIE_CPU(cs);
120 CPUMoxieState *env = &cpu->env;
121 MoxieMMUResult res;
122 int prot, miss;
123 target_ulong phy;
124 int r = 1;
126 address &= TARGET_PAGE_MASK;
127 prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
128 miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
129 if (miss) {
130 /* handle the miss. */
131 phy = 0;
132 cs->exception_index = MOXIE_EX_MMU_MISS;
133 } else {
134 phy = res.phy;
135 r = 0;
137 tlb_set_page(cs, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
138 return r;
142 void moxie_cpu_do_interrupt(CPUState *cs)
144 switch (cs->exception_index) {
145 case MOXIE_EX_BREAK:
146 break;
147 default:
148 break;
152 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
154 MoxieCPU *cpu = MOXIE_CPU(cs);
155 uint32_t phy = addr;
156 MoxieMMUResult res;
157 int miss;
159 miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
160 if (!miss) {
161 phy = res.phy;
163 return phy;
165 #endif