4 * Copyright (C) 2014 Red Hat Inc
7 * Marcel Apfelbaum <marcel.a@redhat.com>
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
14 #include "qemu/option.h"
15 #include "qapi/qmp/qerror.h"
16 #include "sysemu/replay.h"
17 #include "qemu/units.h"
18 #include "hw/boards.h"
19 #include "hw/loader.h"
20 #include "qapi/error.h"
21 #include "qapi/qapi-visit-common.h"
22 #include "qapi/visitor.h"
23 #include "hw/sysbus.h"
24 #include "sysemu/cpus.h"
25 #include "sysemu/sysemu.h"
26 #include "sysemu/reset.h"
27 #include "sysemu/runstate.h"
28 #include "sysemu/numa.h"
29 #include "qemu/error-report.h"
30 #include "sysemu/qtest.h"
31 #include "hw/pci/pci.h"
32 #include "hw/mem/nvdimm.h"
33 #include "migration/global_state.h"
34 #include "migration/vmstate.h"
35 #include "exec/confidential-guest-support.h"
36 #include "hw/virtio/virtio.h"
37 #include "hw/virtio/virtio-pci.h"
39 GlobalProperty hw_compat_5_2
[] = {
40 { "ICH9-LPC", "smm-compat", "on"},
41 { "PIIX4_PM", "smm-compat", "on"},
42 { "virtio-blk-device", "report-discard-granularity", "off" },
43 { "virtio-net-pci", "vectors", "3"},
45 const size_t hw_compat_5_2_len
= G_N_ELEMENTS(hw_compat_5_2
);
47 GlobalProperty hw_compat_5_1
[] = {
48 { "vhost-scsi", "num_queues", "1"},
49 { "vhost-user-blk", "num-queues", "1"},
50 { "vhost-user-scsi", "num_queues", "1"},
51 { "virtio-blk-device", "num-queues", "1"},
52 { "virtio-scsi-device", "num_queues", "1"},
53 { "nvme", "use-intel-id", "on"},
54 { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */
55 { "pl011", "migrate-clk", "off" },
56 { "virtio-pci", "x-ats-page-aligned", "off"},
58 const size_t hw_compat_5_1_len
= G_N_ELEMENTS(hw_compat_5_1
);
60 GlobalProperty hw_compat_5_0
[] = {
61 { "pci-host-bridge", "x-config-reg-migration-enabled", "off" },
62 { "virtio-balloon-device", "page-poison", "false" },
63 { "vmport", "x-read-set-eax", "off" },
64 { "vmport", "x-signal-unsupported-cmd", "off" },
65 { "vmport", "x-report-vmx-type", "off" },
66 { "vmport", "x-cmds-v2", "off" },
67 { "virtio-device", "x-disable-legacy-check", "true" },
69 const size_t hw_compat_5_0_len
= G_N_ELEMENTS(hw_compat_5_0
);
71 GlobalProperty hw_compat_4_2
[] = {
72 { "virtio-blk-device", "queue-size", "128"},
73 { "virtio-scsi-device", "virtqueue_size", "128"},
74 { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" },
75 { "virtio-blk-device", "seg-max-adjust", "off"},
76 { "virtio-scsi-device", "seg_max_adjust", "off"},
77 { "vhost-blk-device", "seg_max_adjust", "off"},
78 { "usb-host", "suppress-remote-wake", "off" },
79 { "usb-redir", "suppress-remote-wake", "off" },
80 { "qxl", "revision", "4" },
81 { "qxl-vga", "revision", "4" },
82 { "fw_cfg", "acpi-mr-restore", "false" },
83 { "virtio-device", "use-disabled-flag", "false" },
85 const size_t hw_compat_4_2_len
= G_N_ELEMENTS(hw_compat_4_2
);
87 GlobalProperty hw_compat_4_1
[] = {
88 { "virtio-pci", "x-pcie-flr-init", "off" },
90 const size_t hw_compat_4_1_len
= G_N_ELEMENTS(hw_compat_4_1
);
92 GlobalProperty hw_compat_4_0
[] = {
93 { "VGA", "edid", "false" },
94 { "secondary-vga", "edid", "false" },
95 { "bochs-display", "edid", "false" },
96 { "virtio-vga", "edid", "false" },
97 { "virtio-gpu-device", "edid", "false" },
98 { "virtio-device", "use-started", "false" },
99 { "virtio-balloon-device", "qemu-4-0-config-size", "true" },
100 { "pl031", "migrate-tick-offset", "false" },
102 const size_t hw_compat_4_0_len
= G_N_ELEMENTS(hw_compat_4_0
);
104 GlobalProperty hw_compat_3_1
[] = {
105 { "pcie-root-port", "x-speed", "2_5" },
106 { "pcie-root-port", "x-width", "1" },
107 { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" },
108 { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" },
109 { "tpm-crb", "ppi", "false" },
110 { "tpm-tis", "ppi", "false" },
111 { "usb-kbd", "serial", "42" },
112 { "usb-mouse", "serial", "42" },
113 { "usb-tablet", "serial", "42" },
114 { "virtio-blk-device", "discard", "false" },
115 { "virtio-blk-device", "write-zeroes", "false" },
116 { "virtio-balloon-device", "qemu-4-0-config-size", "false" },
117 { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */
119 const size_t hw_compat_3_1_len
= G_N_ELEMENTS(hw_compat_3_1
);
121 GlobalProperty hw_compat_3_0
[] = {};
122 const size_t hw_compat_3_0_len
= G_N_ELEMENTS(hw_compat_3_0
);
124 GlobalProperty hw_compat_2_12
[] = {
125 { "migration", "decompress-error-check", "off" },
126 { "hda-audio", "use-timer", "false" },
127 { "cirrus-vga", "global-vmstate", "true" },
128 { "VGA", "global-vmstate", "true" },
129 { "vmware-svga", "global-vmstate", "true" },
130 { "qxl-vga", "global-vmstate", "true" },
132 const size_t hw_compat_2_12_len
= G_N_ELEMENTS(hw_compat_2_12
);
134 GlobalProperty hw_compat_2_11
[] = {
135 { "hpet", "hpet-offset-saved", "false" },
136 { "virtio-blk-pci", "vectors", "2" },
137 { "vhost-user-blk-pci", "vectors", "2" },
138 { "e1000", "migrate_tso_props", "off" },
140 const size_t hw_compat_2_11_len
= G_N_ELEMENTS(hw_compat_2_11
);
142 GlobalProperty hw_compat_2_10
[] = {
143 { "virtio-mouse-device", "wheel-axis", "false" },
144 { "virtio-tablet-device", "wheel-axis", "false" },
146 const size_t hw_compat_2_10_len
= G_N_ELEMENTS(hw_compat_2_10
);
148 GlobalProperty hw_compat_2_9
[] = {
149 { "pci-bridge", "shpc", "off" },
150 { "intel-iommu", "pt", "off" },
151 { "virtio-net-device", "x-mtu-bypass-backend", "off" },
152 { "pcie-root-port", "x-migrate-msix", "false" },
154 const size_t hw_compat_2_9_len
= G_N_ELEMENTS(hw_compat_2_9
);
156 GlobalProperty hw_compat_2_8
[] = {
157 { "fw_cfg_mem", "x-file-slots", "0x10" },
158 { "fw_cfg_io", "x-file-slots", "0x10" },
159 { "pflash_cfi01", "old-multiple-chip-handling", "on" },
160 { "pci-bridge", "shpc", "on" },
161 { TYPE_PCI_DEVICE
, "x-pcie-extcap-init", "off" },
162 { "virtio-pci", "x-pcie-deverr-init", "off" },
163 { "virtio-pci", "x-pcie-lnkctl-init", "off" },
164 { "virtio-pci", "x-pcie-pm-init", "off" },
165 { "cirrus-vga", "vgamem_mb", "8" },
166 { "isa-cirrus-vga", "vgamem_mb", "8" },
168 const size_t hw_compat_2_8_len
= G_N_ELEMENTS(hw_compat_2_8
);
170 GlobalProperty hw_compat_2_7
[] = {
171 { "virtio-pci", "page-per-vq", "on" },
172 { "virtio-serial-device", "emergency-write", "off" },
173 { "ioapic", "version", "0x11" },
174 { "intel-iommu", "x-buggy-eim", "true" },
175 { "virtio-pci", "x-ignore-backend-features", "on" },
177 const size_t hw_compat_2_7_len
= G_N_ELEMENTS(hw_compat_2_7
);
179 GlobalProperty hw_compat_2_6
[] = {
180 { "virtio-mmio", "format_transport_address", "off" },
181 /* Optional because not all virtio-pci devices support legacy mode */
182 { "virtio-pci", "disable-modern", "on", .optional
= true },
183 { "virtio-pci", "disable-legacy", "off", .optional
= true },
185 const size_t hw_compat_2_6_len
= G_N_ELEMENTS(hw_compat_2_6
);
187 GlobalProperty hw_compat_2_5
[] = {
188 { "isa-fdc", "fallback", "144" },
189 { "pvscsi", "x-old-pci-configuration", "on" },
190 { "pvscsi", "x-disable-pcie", "on" },
191 { "vmxnet3", "x-old-msi-offsets", "on" },
192 { "vmxnet3", "x-disable-pcie", "on" },
194 const size_t hw_compat_2_5_len
= G_N_ELEMENTS(hw_compat_2_5
);
196 GlobalProperty hw_compat_2_4
[] = {
197 /* Optional because the 'scsi' property is Linux-only */
198 { "virtio-blk-device", "scsi", "true", .optional
= true },
199 { "e1000", "extra_mac_registers", "off" },
200 { "virtio-pci", "x-disable-pcie", "on" },
201 { "virtio-pci", "migrate-extra", "off" },
202 { "fw_cfg_mem", "dma_enabled", "off" },
203 { "fw_cfg_io", "dma_enabled", "off" }
205 const size_t hw_compat_2_4_len
= G_N_ELEMENTS(hw_compat_2_4
);
207 GlobalProperty hw_compat_2_3
[] = {
208 { "virtio-blk-pci", "any_layout", "off" },
209 { "virtio-balloon-pci", "any_layout", "off" },
210 { "virtio-serial-pci", "any_layout", "off" },
211 { "virtio-9p-pci", "any_layout", "off" },
212 { "virtio-rng-pci", "any_layout", "off" },
213 { TYPE_PCI_DEVICE
, "x-pcie-lnksta-dllla", "off" },
214 { "migration", "send-configuration", "off" },
215 { "migration", "send-section-footer", "off" },
216 { "migration", "store-global-state", "off" },
218 const size_t hw_compat_2_3_len
= G_N_ELEMENTS(hw_compat_2_3
);
220 GlobalProperty hw_compat_2_2
[] = {};
221 const size_t hw_compat_2_2_len
= G_N_ELEMENTS(hw_compat_2_2
);
223 GlobalProperty hw_compat_2_1
[] = {
224 { "intel-hda", "old_msi_addr", "on" },
225 { "VGA", "qemu-extended-regs", "off" },
226 { "secondary-vga", "qemu-extended-regs", "off" },
227 { "virtio-scsi-pci", "any_layout", "off" },
228 { "usb-mouse", "usb_version", "1" },
229 { "usb-kbd", "usb_version", "1" },
230 { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" },
232 const size_t hw_compat_2_1_len
= G_N_ELEMENTS(hw_compat_2_1
);
234 MachineState
*current_machine
;
236 static char *machine_get_kernel(Object
*obj
, Error
**errp
)
238 MachineState
*ms
= MACHINE(obj
);
240 return g_strdup(ms
->kernel_filename
);
243 static void machine_set_kernel(Object
*obj
, const char *value
, Error
**errp
)
245 MachineState
*ms
= MACHINE(obj
);
247 g_free(ms
->kernel_filename
);
248 ms
->kernel_filename
= g_strdup(value
);
251 static char *machine_get_initrd(Object
*obj
, Error
**errp
)
253 MachineState
*ms
= MACHINE(obj
);
255 return g_strdup(ms
->initrd_filename
);
258 static void machine_set_initrd(Object
*obj
, const char *value
, Error
**errp
)
260 MachineState
*ms
= MACHINE(obj
);
262 g_free(ms
->initrd_filename
);
263 ms
->initrd_filename
= g_strdup(value
);
266 static char *machine_get_append(Object
*obj
, Error
**errp
)
268 MachineState
*ms
= MACHINE(obj
);
270 return g_strdup(ms
->kernel_cmdline
);
273 static void machine_set_append(Object
*obj
, const char *value
, Error
**errp
)
275 MachineState
*ms
= MACHINE(obj
);
277 g_free(ms
->kernel_cmdline
);
278 ms
->kernel_cmdline
= g_strdup(value
);
281 static char *machine_get_dtb(Object
*obj
, Error
**errp
)
283 MachineState
*ms
= MACHINE(obj
);
285 return g_strdup(ms
->dtb
);
288 static void machine_set_dtb(Object
*obj
, const char *value
, Error
**errp
)
290 MachineState
*ms
= MACHINE(obj
);
293 ms
->dtb
= g_strdup(value
);
296 static char *machine_get_dumpdtb(Object
*obj
, Error
**errp
)
298 MachineState
*ms
= MACHINE(obj
);
300 return g_strdup(ms
->dumpdtb
);
303 static void machine_set_dumpdtb(Object
*obj
, const char *value
, Error
**errp
)
305 MachineState
*ms
= MACHINE(obj
);
308 ms
->dumpdtb
= g_strdup(value
);
311 static void machine_get_phandle_start(Object
*obj
, Visitor
*v
,
312 const char *name
, void *opaque
,
315 MachineState
*ms
= MACHINE(obj
);
316 int64_t value
= ms
->phandle_start
;
318 visit_type_int(v
, name
, &value
, errp
);
321 static void machine_set_phandle_start(Object
*obj
, Visitor
*v
,
322 const char *name
, void *opaque
,
325 MachineState
*ms
= MACHINE(obj
);
328 if (!visit_type_int(v
, name
, &value
, errp
)) {
332 ms
->phandle_start
= value
;
335 static char *machine_get_dt_compatible(Object
*obj
, Error
**errp
)
337 MachineState
*ms
= MACHINE(obj
);
339 return g_strdup(ms
->dt_compatible
);
342 static void machine_set_dt_compatible(Object
*obj
, const char *value
, Error
**errp
)
344 MachineState
*ms
= MACHINE(obj
);
346 g_free(ms
->dt_compatible
);
347 ms
->dt_compatible
= g_strdup(value
);
350 static bool machine_get_dump_guest_core(Object
*obj
, Error
**errp
)
352 MachineState
*ms
= MACHINE(obj
);
354 return ms
->dump_guest_core
;
357 static void machine_set_dump_guest_core(Object
*obj
, bool value
, Error
**errp
)
359 MachineState
*ms
= MACHINE(obj
);
361 ms
->dump_guest_core
= value
;
364 static bool machine_get_mem_merge(Object
*obj
, Error
**errp
)
366 MachineState
*ms
= MACHINE(obj
);
368 return ms
->mem_merge
;
371 static void machine_set_mem_merge(Object
*obj
, bool value
, Error
**errp
)
373 MachineState
*ms
= MACHINE(obj
);
375 ms
->mem_merge
= value
;
378 static bool machine_get_usb(Object
*obj
, Error
**errp
)
380 MachineState
*ms
= MACHINE(obj
);
385 static void machine_set_usb(Object
*obj
, bool value
, Error
**errp
)
387 MachineState
*ms
= MACHINE(obj
);
390 ms
->usb_disabled
= !value
;
393 static bool machine_get_graphics(Object
*obj
, Error
**errp
)
395 MachineState
*ms
= MACHINE(obj
);
397 return ms
->enable_graphics
;
400 static void machine_set_graphics(Object
*obj
, bool value
, Error
**errp
)
402 MachineState
*ms
= MACHINE(obj
);
404 ms
->enable_graphics
= value
;
407 static char *machine_get_firmware(Object
*obj
, Error
**errp
)
409 MachineState
*ms
= MACHINE(obj
);
411 return g_strdup(ms
->firmware
);
414 static void machine_set_firmware(Object
*obj
, const char *value
, Error
**errp
)
416 MachineState
*ms
= MACHINE(obj
);
418 g_free(ms
->firmware
);
419 ms
->firmware
= g_strdup(value
);
422 static void machine_set_suppress_vmdesc(Object
*obj
, bool value
, Error
**errp
)
424 MachineState
*ms
= MACHINE(obj
);
426 ms
->suppress_vmdesc
= value
;
429 static bool machine_get_suppress_vmdesc(Object
*obj
, Error
**errp
)
431 MachineState
*ms
= MACHINE(obj
);
433 return ms
->suppress_vmdesc
;
436 static char *machine_get_memory_encryption(Object
*obj
, Error
**errp
)
438 MachineState
*ms
= MACHINE(obj
);
441 return g_strdup(object_get_canonical_path_component(OBJECT(ms
->cgs
)));
447 static void machine_set_memory_encryption(Object
*obj
, const char *value
,
451 object_resolve_path_component(object_get_objects_root(), value
);
454 error_setg(errp
, "No such memory encryption object '%s'", value
);
458 object_property_set_link(obj
, "confidential-guest-support", cgs
, errp
);
461 static void machine_check_confidential_guest_support(const Object
*obj
,
467 * So far the only constraint is that the target has the
468 * TYPE_CONFIDENTIAL_GUEST_SUPPORT interface, and that's checked
473 static bool machine_get_nvdimm(Object
*obj
, Error
**errp
)
475 MachineState
*ms
= MACHINE(obj
);
477 return ms
->nvdimms_state
->is_enabled
;
480 static void machine_set_nvdimm(Object
*obj
, bool value
, Error
**errp
)
482 MachineState
*ms
= MACHINE(obj
);
484 ms
->nvdimms_state
->is_enabled
= value
;
487 static bool machine_get_hmat(Object
*obj
, Error
**errp
)
489 MachineState
*ms
= MACHINE(obj
);
491 return ms
->numa_state
->hmat_enabled
;
494 static void machine_set_hmat(Object
*obj
, bool value
, Error
**errp
)
496 MachineState
*ms
= MACHINE(obj
);
498 ms
->numa_state
->hmat_enabled
= value
;
501 static char *machine_get_nvdimm_persistence(Object
*obj
, Error
**errp
)
503 MachineState
*ms
= MACHINE(obj
);
505 return g_strdup(ms
->nvdimms_state
->persistence_string
);
508 static void machine_set_nvdimm_persistence(Object
*obj
, const char *value
,
511 MachineState
*ms
= MACHINE(obj
);
512 NVDIMMState
*nvdimms_state
= ms
->nvdimms_state
;
514 if (strcmp(value
, "cpu") == 0) {
515 nvdimms_state
->persistence
= 3;
516 } else if (strcmp(value
, "mem-ctrl") == 0) {
517 nvdimms_state
->persistence
= 2;
519 error_setg(errp
, "-machine nvdimm-persistence=%s: unsupported option",
524 g_free(nvdimms_state
->persistence_string
);
525 nvdimms_state
->persistence_string
= g_strdup(value
);
528 void machine_class_allow_dynamic_sysbus_dev(MachineClass
*mc
, const char *type
)
530 QAPI_LIST_PREPEND(mc
->allowed_dynamic_sysbus_devices
, g_strdup(type
));
533 static void validate_sysbus_device(SysBusDevice
*sbdev
, void *opaque
)
535 MachineState
*machine
= opaque
;
536 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
537 bool allowed
= false;
540 for (wl
= mc
->allowed_dynamic_sysbus_devices
;
543 allowed
|= !!object_dynamic_cast(OBJECT(sbdev
), wl
->value
);
547 error_report("Option '-device %s' cannot be handled by this machine",
548 object_class_get_name(object_get_class(OBJECT(sbdev
))));
553 static char *machine_get_memdev(Object
*obj
, Error
**errp
)
555 MachineState
*ms
= MACHINE(obj
);
557 return g_strdup(ms
->ram_memdev_id
);
560 static void machine_set_memdev(Object
*obj
, const char *value
, Error
**errp
)
562 MachineState
*ms
= MACHINE(obj
);
564 g_free(ms
->ram_memdev_id
);
565 ms
->ram_memdev_id
= g_strdup(value
);
569 static void machine_init_notify(Notifier
*notifier
, void *data
)
571 MachineState
*machine
= MACHINE(qdev_get_machine());
574 * Loop through all dynamically created sysbus devices and check if they are
575 * all allowed. If a device is not allowed, error out.
577 foreach_dynamic_sysbus_device(validate_sysbus_device
, machine
);
580 HotpluggableCPUList
*machine_query_hotpluggable_cpus(MachineState
*machine
)
583 HotpluggableCPUList
*head
= NULL
;
584 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
586 /* force board to initialize possible_cpus if it hasn't been done yet */
587 mc
->possible_cpu_arch_ids(machine
);
589 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
591 HotpluggableCPU
*cpu_item
= g_new0(typeof(*cpu_item
), 1);
593 cpu_item
->type
= g_strdup(machine
->possible_cpus
->cpus
[i
].type
);
594 cpu_item
->vcpus_count
= machine
->possible_cpus
->cpus
[i
].vcpus_count
;
595 cpu_item
->props
= g_memdup(&machine
->possible_cpus
->cpus
[i
].props
,
596 sizeof(*cpu_item
->props
));
598 cpu
= machine
->possible_cpus
->cpus
[i
].cpu
;
600 cpu_item
->has_qom_path
= true;
601 cpu_item
->qom_path
= object_get_canonical_path(cpu
);
603 QAPI_LIST_PREPEND(head
, cpu_item
);
609 * machine_set_cpu_numa_node:
610 * @machine: machine object to modify
611 * @props: specifies which cpu objects to assign to
612 * numa node specified by @props.node_id
613 * @errp: if an error occurs, a pointer to an area to store the error
615 * Associate NUMA node specified by @props.node_id with cpu slots that
616 * match socket/core/thread-ids specified by @props. It's recommended to use
617 * query-hotpluggable-cpus.props values to specify affected cpu slots,
618 * which would lead to exact 1:1 mapping of cpu slots to NUMA node.
620 * However for CLI convenience it's possible to pass in subset of properties,
621 * which would affect all cpu slots that match it.
623 * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \
624 * -numa cpu,node-id=0,socket_id=0 \
625 * -numa cpu,node-id=1,socket_id=1
626 * will assign all child cores of socket 0 to node 0 and
627 * of socket 1 to node 1.
629 * On attempt of reassigning (already assigned) cpu slot to another NUMA node,
631 * Empty subset is disallowed and function will return with error in this case.
633 void machine_set_cpu_numa_node(MachineState
*machine
,
634 const CpuInstanceProperties
*props
, Error
**errp
)
636 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
637 NodeInfo
*numa_info
= machine
->numa_state
->nodes
;
641 if (!mc
->possible_cpu_arch_ids
) {
642 error_setg(errp
, "mapping of CPUs to NUMA node is not supported");
646 /* disabling node mapping is not supported, forbid it */
647 assert(props
->has_node_id
);
649 /* force board to initialize possible_cpus if it hasn't been done yet */
650 mc
->possible_cpu_arch_ids(machine
);
652 for (i
= 0; i
< machine
->possible_cpus
->len
; i
++) {
653 CPUArchId
*slot
= &machine
->possible_cpus
->cpus
[i
];
655 /* reject unsupported by board properties */
656 if (props
->has_thread_id
&& !slot
->props
.has_thread_id
) {
657 error_setg(errp
, "thread-id is not supported");
661 if (props
->has_core_id
&& !slot
->props
.has_core_id
) {
662 error_setg(errp
, "core-id is not supported");
666 if (props
->has_socket_id
&& !slot
->props
.has_socket_id
) {
667 error_setg(errp
, "socket-id is not supported");
671 if (props
->has_die_id
&& !slot
->props
.has_die_id
) {
672 error_setg(errp
, "die-id is not supported");
676 /* skip slots with explicit mismatch */
677 if (props
->has_thread_id
&& props
->thread_id
!= slot
->props
.thread_id
) {
681 if (props
->has_core_id
&& props
->core_id
!= slot
->props
.core_id
) {
685 if (props
->has_die_id
&& props
->die_id
!= slot
->props
.die_id
) {
689 if (props
->has_socket_id
&& props
->socket_id
!= slot
->props
.socket_id
) {
693 /* reject assignment if slot is already assigned, for compatibility
694 * of legacy cpu_index mapping with SPAPR core based mapping do not
695 * error out if cpu thread and matched core have the same node-id */
696 if (slot
->props
.has_node_id
&&
697 slot
->props
.node_id
!= props
->node_id
) {
698 error_setg(errp
, "CPU is already assigned to node-id: %" PRId64
,
699 slot
->props
.node_id
);
703 /* assign slot to node as it's matched '-numa cpu' key */
705 slot
->props
.node_id
= props
->node_id
;
706 slot
->props
.has_node_id
= props
->has_node_id
;
708 if (machine
->numa_state
->hmat_enabled
) {
709 if ((numa_info
[props
->node_id
].initiator
< MAX_NODES
) &&
710 (props
->node_id
!= numa_info
[props
->node_id
].initiator
)) {
711 error_setg(errp
, "The initiator of CPU NUMA node %" PRId64
712 " should be itself", props
->node_id
);
715 numa_info
[props
->node_id
].has_cpu
= true;
716 numa_info
[props
->node_id
].initiator
= props
->node_id
;
721 error_setg(errp
, "no match found");
725 static void smp_parse(MachineState
*ms
, QemuOpts
*opts
)
728 unsigned cpus
= qemu_opt_get_number(opts
, "cpus", 0);
729 unsigned sockets
= qemu_opt_get_number(opts
, "sockets", 0);
730 unsigned cores
= qemu_opt_get_number(opts
, "cores", 0);
731 unsigned threads
= qemu_opt_get_number(opts
, "threads", 0);
733 /* compute missing values, prefer sockets over cores over threads */
734 if (cpus
== 0 || sockets
== 0) {
735 cores
= cores
> 0 ? cores
: 1;
736 threads
= threads
> 0 ? threads
: 1;
738 sockets
= sockets
> 0 ? sockets
: 1;
739 cpus
= cores
* threads
* sockets
;
742 qemu_opt_get_number(opts
, "maxcpus", cpus
);
743 sockets
= ms
->smp
.max_cpus
/ (cores
* threads
);
745 } else if (cores
== 0) {
746 threads
= threads
> 0 ? threads
: 1;
747 cores
= cpus
/ (sockets
* threads
);
748 cores
= cores
> 0 ? cores
: 1;
749 } else if (threads
== 0) {
750 threads
= cpus
/ (cores
* sockets
);
751 threads
= threads
> 0 ? threads
: 1;
752 } else if (sockets
* cores
* threads
< cpus
) {
753 error_report("cpu topology: "
754 "sockets (%u) * cores (%u) * threads (%u) < "
756 sockets
, cores
, threads
, cpus
);
761 qemu_opt_get_number(opts
, "maxcpus", cpus
);
763 if (ms
->smp
.max_cpus
< cpus
) {
764 error_report("maxcpus must be equal to or greater than smp");
768 if (sockets
* cores
* threads
!= ms
->smp
.max_cpus
) {
769 error_report("Invalid CPU topology: "
770 "sockets (%u) * cores (%u) * threads (%u) "
772 sockets
, cores
, threads
,
778 ms
->smp
.cores
= cores
;
779 ms
->smp
.threads
= threads
;
780 ms
->smp
.sockets
= sockets
;
783 if (ms
->smp
.cpus
> 1) {
784 Error
*blocker
= NULL
;
785 error_setg(&blocker
, QERR_REPLAY_NOT_SUPPORTED
, "smp");
786 replay_add_blocker(blocker
);
790 static void machine_class_init(ObjectClass
*oc
, void *data
)
792 MachineClass
*mc
= MACHINE_CLASS(oc
);
794 /* Default 128 MB as guest ram size */
795 mc
->default_ram_size
= 128 * MiB
;
796 mc
->rom_file_has_mr
= true;
797 mc
->smp_parse
= smp_parse
;
799 /* numa node memory size aligned on 8MB by default.
800 * On Linux, each node's border has to be 8MB aligned
802 mc
->numa_mem_align_shift
= 23;
804 object_class_property_add_str(oc
, "kernel",
805 machine_get_kernel
, machine_set_kernel
);
806 object_class_property_set_description(oc
, "kernel",
807 "Linux kernel image file");
809 object_class_property_add_str(oc
, "initrd",
810 machine_get_initrd
, machine_set_initrd
);
811 object_class_property_set_description(oc
, "initrd",
812 "Linux initial ramdisk file");
814 object_class_property_add_str(oc
, "append",
815 machine_get_append
, machine_set_append
);
816 object_class_property_set_description(oc
, "append",
817 "Linux kernel command line");
819 object_class_property_add_str(oc
, "dtb",
820 machine_get_dtb
, machine_set_dtb
);
821 object_class_property_set_description(oc
, "dtb",
822 "Linux kernel device tree file");
824 object_class_property_add_str(oc
, "dumpdtb",
825 machine_get_dumpdtb
, machine_set_dumpdtb
);
826 object_class_property_set_description(oc
, "dumpdtb",
827 "Dump current dtb to a file and quit");
829 object_class_property_add(oc
, "phandle-start", "int",
830 machine_get_phandle_start
, machine_set_phandle_start
,
832 object_class_property_set_description(oc
, "phandle-start",
833 "The first phandle ID we may generate dynamically");
835 object_class_property_add_str(oc
, "dt-compatible",
836 machine_get_dt_compatible
, machine_set_dt_compatible
);
837 object_class_property_set_description(oc
, "dt-compatible",
838 "Overrides the \"compatible\" property of the dt root node");
840 object_class_property_add_bool(oc
, "dump-guest-core",
841 machine_get_dump_guest_core
, machine_set_dump_guest_core
);
842 object_class_property_set_description(oc
, "dump-guest-core",
843 "Include guest memory in a core dump");
845 object_class_property_add_bool(oc
, "mem-merge",
846 machine_get_mem_merge
, machine_set_mem_merge
);
847 object_class_property_set_description(oc
, "mem-merge",
848 "Enable/disable memory merge support");
850 object_class_property_add_bool(oc
, "usb",
851 machine_get_usb
, machine_set_usb
);
852 object_class_property_set_description(oc
, "usb",
853 "Set on/off to enable/disable usb");
855 object_class_property_add_bool(oc
, "graphics",
856 machine_get_graphics
, machine_set_graphics
);
857 object_class_property_set_description(oc
, "graphics",
858 "Set on/off to enable/disable graphics emulation");
860 object_class_property_add_str(oc
, "firmware",
861 machine_get_firmware
, machine_set_firmware
);
862 object_class_property_set_description(oc
, "firmware",
865 object_class_property_add_bool(oc
, "suppress-vmdesc",
866 machine_get_suppress_vmdesc
, machine_set_suppress_vmdesc
);
867 object_class_property_set_description(oc
, "suppress-vmdesc",
868 "Set on to disable self-describing migration");
870 object_class_property_add_link(oc
, "confidential-guest-support",
871 TYPE_CONFIDENTIAL_GUEST_SUPPORT
,
872 offsetof(MachineState
, cgs
),
873 machine_check_confidential_guest_support
,
874 OBJ_PROP_LINK_STRONG
);
875 object_class_property_set_description(oc
, "confidential-guest-support",
876 "Set confidential guest scheme to support");
878 /* For compatibility */
879 object_class_property_add_str(oc
, "memory-encryption",
880 machine_get_memory_encryption
, machine_set_memory_encryption
);
881 object_class_property_set_description(oc
, "memory-encryption",
882 "Set memory encryption object to use");
884 object_class_property_add_str(oc
, "memory-backend",
885 machine_get_memdev
, machine_set_memdev
);
886 object_class_property_set_description(oc
, "memory-backend",
888 "Valid value is ID of hostmem based backend");
891 static void machine_class_base_init(ObjectClass
*oc
, void *data
)
893 MachineClass
*mc
= MACHINE_CLASS(oc
);
894 mc
->max_cpus
= mc
->max_cpus
?: 1;
895 mc
->min_cpus
= mc
->min_cpus
?: 1;
896 mc
->default_cpus
= mc
->default_cpus
?: 1;
898 if (!object_class_is_abstract(oc
)) {
899 const char *cname
= object_class_get_name(oc
);
900 assert(g_str_has_suffix(cname
, TYPE_MACHINE_SUFFIX
));
901 mc
->name
= g_strndup(cname
,
902 strlen(cname
) - strlen(TYPE_MACHINE_SUFFIX
));
903 mc
->compat_props
= g_ptr_array_new();
907 static void machine_initfn(Object
*obj
)
909 MachineState
*ms
= MACHINE(obj
);
910 MachineClass
*mc
= MACHINE_GET_CLASS(obj
);
912 container_get(obj
, "/peripheral");
913 container_get(obj
, "/peripheral-anon");
915 ms
->dump_guest_core
= true;
916 ms
->mem_merge
= true;
917 ms
->enable_graphics
= true;
918 ms
->kernel_cmdline
= g_strdup("");
920 if (mc
->nvdimm_supported
) {
921 Object
*obj
= OBJECT(ms
);
923 ms
->nvdimms_state
= g_new0(NVDIMMState
, 1);
924 object_property_add_bool(obj
, "nvdimm",
925 machine_get_nvdimm
, machine_set_nvdimm
);
926 object_property_set_description(obj
, "nvdimm",
927 "Set on/off to enable/disable "
928 "NVDIMM instantiation");
930 object_property_add_str(obj
, "nvdimm-persistence",
931 machine_get_nvdimm_persistence
,
932 machine_set_nvdimm_persistence
);
933 object_property_set_description(obj
, "nvdimm-persistence",
934 "Set NVDIMM persistence"
935 "Valid values are cpu, mem-ctrl");
938 if (mc
->cpu_index_to_instance_props
&& mc
->get_default_cpu_node_id
) {
939 ms
->numa_state
= g_new0(NumaState
, 1);
940 object_property_add_bool(obj
, "hmat",
941 machine_get_hmat
, machine_set_hmat
);
942 object_property_set_description(obj
, "hmat",
943 "Set on/off to enable/disable "
944 "ACPI Heterogeneous Memory Attribute "
948 /* Register notifier when init is done for sysbus sanity checks */
949 ms
->sysbus_notifier
.notify
= machine_init_notify
;
950 qemu_add_machine_init_done_notifier(&ms
->sysbus_notifier
);
952 /* default to mc->default_cpus */
953 ms
->smp
.cpus
= mc
->default_cpus
;
954 ms
->smp
.max_cpus
= mc
->default_cpus
;
960 static void machine_finalize(Object
*obj
)
962 MachineState
*ms
= MACHINE(obj
);
964 g_free(ms
->kernel_filename
);
965 g_free(ms
->initrd_filename
);
966 g_free(ms
->kernel_cmdline
);
969 g_free(ms
->dt_compatible
);
970 g_free(ms
->firmware
);
971 g_free(ms
->device_memory
);
972 g_free(ms
->nvdimms_state
);
973 g_free(ms
->numa_state
);
976 bool machine_usb(MachineState
*machine
)
981 int machine_phandle_start(MachineState
*machine
)
983 return machine
->phandle_start
;
986 bool machine_dump_guest_core(MachineState
*machine
)
988 return machine
->dump_guest_core
;
991 bool machine_mem_merge(MachineState
*machine
)
993 return machine
->mem_merge
;
996 static char *cpu_slot_to_string(const CPUArchId
*cpu
)
998 GString
*s
= g_string_new(NULL
);
999 if (cpu
->props
.has_socket_id
) {
1000 g_string_append_printf(s
, "socket-id: %"PRId64
, cpu
->props
.socket_id
);
1002 if (cpu
->props
.has_die_id
) {
1003 g_string_append_printf(s
, "die-id: %"PRId64
, cpu
->props
.die_id
);
1005 if (cpu
->props
.has_core_id
) {
1007 g_string_append_printf(s
, ", ");
1009 g_string_append_printf(s
, "core-id: %"PRId64
, cpu
->props
.core_id
);
1011 if (cpu
->props
.has_thread_id
) {
1013 g_string_append_printf(s
, ", ");
1015 g_string_append_printf(s
, "thread-id: %"PRId64
, cpu
->props
.thread_id
);
1017 return g_string_free(s
, false);
1020 static void numa_validate_initiator(NumaState
*numa_state
)
1023 NodeInfo
*numa_info
= numa_state
->nodes
;
1025 for (i
= 0; i
< numa_state
->num_nodes
; i
++) {
1026 if (numa_info
[i
].initiator
== MAX_NODES
) {
1027 error_report("The initiator of NUMA node %d is missing, use "
1028 "'-numa node,initiator' option to declare it", i
);
1032 if (!numa_info
[numa_info
[i
].initiator
].present
) {
1033 error_report("NUMA node %" PRIu16
" is missing, use "
1034 "'-numa node' option to declare it first",
1035 numa_info
[i
].initiator
);
1039 if (!numa_info
[numa_info
[i
].initiator
].has_cpu
) {
1040 error_report("The initiator of NUMA node %d is invalid", i
);
1046 static void machine_numa_finish_cpu_init(MachineState
*machine
)
1049 bool default_mapping
;
1050 GString
*s
= g_string_new(NULL
);
1051 MachineClass
*mc
= MACHINE_GET_CLASS(machine
);
1052 const CPUArchIdList
*possible_cpus
= mc
->possible_cpu_arch_ids(machine
);
1054 assert(machine
->numa_state
->num_nodes
);
1055 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1056 if (possible_cpus
->cpus
[i
].props
.has_node_id
) {
1060 default_mapping
= (i
== possible_cpus
->len
);
1062 for (i
= 0; i
< possible_cpus
->len
; i
++) {
1063 const CPUArchId
*cpu_slot
= &possible_cpus
->cpus
[i
];
1065 if (!cpu_slot
->props
.has_node_id
) {
1066 /* fetch default mapping from board and enable it */
1067 CpuInstanceProperties props
= cpu_slot
->props
;
1069 props
.node_id
= mc
->get_default_cpu_node_id(machine
, i
);
1070 if (!default_mapping
) {
1071 /* record slots with not set mapping,
1072 * TODO: make it hard error in future */
1073 char *cpu_str
= cpu_slot_to_string(cpu_slot
);
1074 g_string_append_printf(s
, "%sCPU %d [%s]",
1075 s
->len
? ", " : "", i
, cpu_str
);
1078 /* non mapped cpus used to fallback to node 0 */
1082 props
.has_node_id
= true;
1083 machine_set_cpu_numa_node(machine
, &props
, &error_fatal
);
1087 if (machine
->numa_state
->hmat_enabled
) {
1088 numa_validate_initiator(machine
->numa_state
);
1091 if (s
->len
&& !qtest_enabled()) {
1092 warn_report("CPU(s) not present in any NUMA nodes: %s",
1094 warn_report("All CPU(s) up to maxcpus should be described "
1095 "in NUMA config, ability to start up with partial NUMA "
1096 "mappings is obsoleted and will be removed in future");
1098 g_string_free(s
, true);
1101 MemoryRegion
*machine_consume_memdev(MachineState
*machine
,
1102 HostMemoryBackend
*backend
)
1104 MemoryRegion
*ret
= host_memory_backend_get_memory(backend
);
1106 if (memory_region_is_mapped(ret
)) {
1107 error_report("memory backend %s can't be used multiple times.",
1108 object_get_canonical_path_component(OBJECT(backend
)));
1111 host_memory_backend_set_mapped(backend
, true);
1112 vmstate_register_ram_global(ret
);
1116 bool machine_smp_parse(MachineState
*ms
, QemuOpts
*opts
, Error
**errp
)
1118 MachineClass
*mc
= MACHINE_GET_CLASS(ms
);
1120 mc
->smp_parse(ms
, opts
);
1122 /* sanity-check smp_cpus and max_cpus against mc */
1123 if (ms
->smp
.cpus
< mc
->min_cpus
) {
1124 error_setg(errp
, "Invalid SMP CPUs %d. The min CPUs "
1125 "supported by machine '%s' is %d",
1127 mc
->name
, mc
->min_cpus
);
1129 } else if (ms
->smp
.max_cpus
> mc
->max_cpus
) {
1130 error_setg(errp
, "Invalid SMP CPUs %d. The max CPUs "
1131 "supported by machine '%s' is %d",
1132 current_machine
->smp
.max_cpus
,
1133 mc
->name
, mc
->max_cpus
);
1139 void machine_run_board_init(MachineState
*machine
)
1141 MachineClass
*machine_class
= MACHINE_GET_CLASS(machine
);
1142 ObjectClass
*oc
= object_class_by_name(machine
->cpu_type
);
1145 /* This checkpoint is required by replay to separate prior clock
1146 reading from the other reads, because timer polling functions query
1147 clock values from the log. */
1148 replay_checkpoint(CHECKPOINT_INIT
);
1150 if (machine
->ram_memdev_id
) {
1152 o
= object_resolve_path_type(machine
->ram_memdev_id
,
1153 TYPE_MEMORY_BACKEND
, NULL
);
1154 machine
->ram
= machine_consume_memdev(machine
, MEMORY_BACKEND(o
));
1157 if (machine
->numa_state
) {
1158 numa_complete_configuration(machine
);
1159 if (machine
->numa_state
->num_nodes
) {
1160 machine_numa_finish_cpu_init(machine
);
1164 /* If the machine supports the valid_cpu_types check and the user
1165 * specified a CPU with -cpu check here that the user CPU is supported.
1167 if (machine_class
->valid_cpu_types
&& machine
->cpu_type
) {
1170 for (i
= 0; machine_class
->valid_cpu_types
[i
]; i
++) {
1171 if (object_class_dynamic_cast(oc
,
1172 machine_class
->valid_cpu_types
[i
])) {
1173 /* The user specificed CPU is in the valid field, we are
1180 if (!machine_class
->valid_cpu_types
[i
]) {
1181 /* The user specified CPU is not valid */
1182 error_report("Invalid CPU type: %s", machine
->cpu_type
);
1183 error_printf("The valid types are: %s",
1184 machine_class
->valid_cpu_types
[0]);
1185 for (i
= 1; machine_class
->valid_cpu_types
[i
]; i
++) {
1186 error_printf(", %s", machine_class
->valid_cpu_types
[i
]);
1194 /* Check if CPU type is deprecated and warn if so */
1196 if (cc
&& cc
->deprecation_note
) {
1197 warn_report("CPU model %s is deprecated -- %s", machine
->cpu_type
,
1198 cc
->deprecation_note
);
1203 * With confidential guests, the host can't see the real
1204 * contents of RAM, so there's no point in it trying to merge
1207 machine_set_mem_merge(OBJECT(machine
), false, &error_abort
);
1210 * Virtio devices can't count on directly accessing guest
1211 * memory, so they need iommu_platform=on to use normal DMA
1212 * mechanisms. That requires also disabling legacy virtio
1213 * support for those virtio pci devices which allow it.
1215 object_register_sugar_prop(TYPE_VIRTIO_PCI
, "disable-legacy",
1217 object_register_sugar_prop(TYPE_VIRTIO_DEVICE
, "iommu_platform",
1221 machine_class
->init(machine
);
1222 phase_advance(PHASE_MACHINE_INITIALIZED
);
1225 static NotifierList machine_init_done_notifiers
=
1226 NOTIFIER_LIST_INITIALIZER(machine_init_done_notifiers
);
1228 void qemu_add_machine_init_done_notifier(Notifier
*notify
)
1230 notifier_list_add(&machine_init_done_notifiers
, notify
);
1231 if (phase_check(PHASE_MACHINE_READY
)) {
1232 notify
->notify(notify
, NULL
);
1236 void qemu_remove_machine_init_done_notifier(Notifier
*notify
)
1238 notifier_remove(notify
);
1241 void qdev_machine_creation_done(void)
1243 cpu_synchronize_all_post_init();
1245 if (current_machine
->boot_once
) {
1246 qemu_boot_set(current_machine
->boot_once
, &error_fatal
);
1247 qemu_register_reset(restore_boot_order
, g_strdup(current_machine
->boot_order
));
1251 * ok, initial machine setup is done, starting from now we can
1252 * only create hotpluggable devices
1254 phase_advance(PHASE_MACHINE_READY
);
1255 qdev_assert_realized_properly();
1257 /* TODO: once all bus devices are qdevified, this should be done
1258 * when bus is created by qdev.c */
1260 * TODO: If we had a main 'reset container' that the whole system
1261 * lived in, we could reset that using the multi-phase reset
1262 * APIs. For the moment, we just reset the sysbus, which will cause
1263 * all devices hanging off it (and all their child buses, recursively)
1264 * to be reset. Note that this will *not* reset any Device objects
1265 * which are not attached to some part of the qbus tree!
1267 qemu_register_reset(resettable_cold_reset_fn
, sysbus_get_default());
1269 notifier_list_notify(&machine_init_done_notifiers
, NULL
);
1271 if (rom_check_and_register_reset() != 0) {
1277 /* This checkpoint is required by replay to separate prior clock
1278 reading from the other reads, because timer polling functions query
1279 clock values from the log. */
1280 replay_checkpoint(CHECKPOINT_RESET
);
1281 qemu_system_reset(SHUTDOWN_CAUSE_NONE
);
1282 register_global_state();
1285 static const TypeInfo machine_info
= {
1286 .name
= TYPE_MACHINE
,
1287 .parent
= TYPE_OBJECT
,
1289 .class_size
= sizeof(MachineClass
),
1290 .class_init
= machine_class_init
,
1291 .class_base_init
= machine_class_base_init
,
1292 .instance_size
= sizeof(MachineState
),
1293 .instance_init
= machine_initfn
,
1294 .instance_finalize
= machine_finalize
,
1297 static void machine_register_types(void)
1299 type_register_static(&machine_info
);
1302 type_init(machine_register_types
)