tcg/tcg.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef TCG_H
  26 #define TCG_H
  27
  28 #include "qemu-common.h"
  29 #include "qemu/bitops.h"
  30 #include "tcg-target.h"
  31
  32 #define CPU_TEMP_BUF_NLONGS 128
  33
  34 /* Default target word size to pointer size.  */
  35 #ifndef TCG_TARGET_REG_BITS
  36 # if UINTPTR_MAX == UINT32_MAX
  37 #  define TCG_TARGET_REG_BITS 32
  38 # elif UINTPTR_MAX == UINT64_MAX
  39 #  define TCG_TARGET_REG_BITS 64
  40 # else
  41 #  error Unknown pointer size for tcg target
  42 # endif
  43 #endif
  44
  45 #if TCG_TARGET_REG_BITS == 32
  46 typedef int32_t tcg_target_long;
  47 typedef uint32_t tcg_target_ulong;
  48 #define TCG_PRIlx PRIx32
  49 #define TCG_PRIld PRId32
  50 #elif TCG_TARGET_REG_BITS == 64
  51 typedef int64_t tcg_target_long;
  52 typedef uint64_t tcg_target_ulong;
  53 #define TCG_PRIlx PRIx64
  54 #define TCG_PRIld PRId64
  55 #else
  56 #error unsupported
  57 #endif
  58
  59 #if TCG_TARGET_NB_REGS <= 32
  60 typedef uint32_t TCGRegSet;
  61 #elif TCG_TARGET_NB_REGS <= 64
  62 typedef uint64_t TCGRegSet;
  63 #else
  64 #error unsupported
  65 #endif
  66
  67 #if TCG_TARGET_REG_BITS == 32
  68 /* Turn some undef macros into false macros.  */
  69 #define TCG_TARGET_HAS_extrl_i64_i32    0
  70 #define TCG_TARGET_HAS_extrh_i64_i32    0
  71 #define TCG_TARGET_HAS_div_i64          0
  72 #define TCG_TARGET_HAS_rem_i64          0
  73 #define TCG_TARGET_HAS_div2_i64         0
  74 #define TCG_TARGET_HAS_rot_i64          0
  75 #define TCG_TARGET_HAS_ext8s_i64        0
  76 #define TCG_TARGET_HAS_ext16s_i64       0
  77 #define TCG_TARGET_HAS_ext32s_i64       0
  78 #define TCG_TARGET_HAS_ext8u_i64        0
  79 #define TCG_TARGET_HAS_ext16u_i64       0
  80 #define TCG_TARGET_HAS_ext32u_i64       0
  81 #define TCG_TARGET_HAS_bswap16_i64      0
  82 #define TCG_TARGET_HAS_bswap32_i64      0
  83 #define TCG_TARGET_HAS_bswap64_i64      0
  84 #define TCG_TARGET_HAS_neg_i64          0
  85 #define TCG_TARGET_HAS_not_i64          0
  86 #define TCG_TARGET_HAS_andc_i64         0
  87 #define TCG_TARGET_HAS_orc_i64          0
  88 #define TCG_TARGET_HAS_eqv_i64          0
  89 #define TCG_TARGET_HAS_nand_i64         0
  90 #define TCG_TARGET_HAS_nor_i64          0
  91 #define TCG_TARGET_HAS_deposit_i64      0
  92 #define TCG_TARGET_HAS_movcond_i64      0
  93 #define TCG_TARGET_HAS_add2_i64         0
  94 #define TCG_TARGET_HAS_sub2_i64         0
  95 #define TCG_TARGET_HAS_mulu2_i64        0
  96 #define TCG_TARGET_HAS_muls2_i64        0
  97 #define TCG_TARGET_HAS_muluh_i64        0
  98 #define TCG_TARGET_HAS_mulsh_i64        0
  99 /* Turn some undef macros into true macros.  */
 100 #define TCG_TARGET_HAS_add2_i32         1
 101 #define TCG_TARGET_HAS_sub2_i32         1
 102 #endif
 103
 104 #ifndef TCG_TARGET_deposit_i32_valid
 105 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
 106 #endif
 107 #ifndef TCG_TARGET_deposit_i64_valid
 108 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
 109 #endif
 110
 111 /* Only one of DIV or DIV2 should be defined.  */
 112 #if defined(TCG_TARGET_HAS_div_i32)
 113 #define TCG_TARGET_HAS_div2_i32         0
 114 #elif defined(TCG_TARGET_HAS_div2_i32)
 115 #define TCG_TARGET_HAS_div_i32          0
 116 #define TCG_TARGET_HAS_rem_i32          0
 117 #endif
 118 #if defined(TCG_TARGET_HAS_div_i64)
 119 #define TCG_TARGET_HAS_div2_i64         0
 120 #elif defined(TCG_TARGET_HAS_div2_i64)
 121 #define TCG_TARGET_HAS_div_i64          0
 122 #define TCG_TARGET_HAS_rem_i64          0
 123 #endif
 124
 125 /* For 32-bit targets, some sort of unsigned widening multiply is required.  */
 126 #if TCG_TARGET_REG_BITS == 32 \
 127     && !(defined(TCG_TARGET_HAS_mulu2_i32) \
 128          || defined(TCG_TARGET_HAS_muluh_i32))
 129 # error "Missing unsigned widening multiply"
 130 #endif
 131
 132 typedef enum TCGOpcode {
 133 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
 134 #include "tcg-opc.h"
 135 #undef DEF
 136     NB_OPS,
 137 } TCGOpcode;
 138
 139 #define tcg_regset_clear(d) (d) = 0
 140 #define tcg_regset_set(d, s) (d) = (s)
 141 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
 142 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
 143 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
 144 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
 145 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
 146 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
 147 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
 148 #define tcg_regset_not(d, a) (d) = ~(a)
 149
 150 #ifndef TCG_TARGET_INSN_UNIT_SIZE
 151 # error "Missing TCG_TARGET_INSN_UNIT_SIZE"
 152 #elif TCG_TARGET_INSN_UNIT_SIZE == 1
 153 typedef uint8_t tcg_insn_unit;
 154 #elif TCG_TARGET_INSN_UNIT_SIZE == 2
 155 typedef uint16_t tcg_insn_unit;
 156 #elif TCG_TARGET_INSN_UNIT_SIZE == 4
 157 typedef uint32_t tcg_insn_unit;
 158 #elif TCG_TARGET_INSN_UNIT_SIZE == 8
 159 typedef uint64_t tcg_insn_unit;
 160 #else
 161 /* The port better have done this.  */
 162 #endif
 163
 164
 165 typedef struct TCGRelocation {
 166     struct TCGRelocation *next;
 167     int type;
 168     tcg_insn_unit *ptr;
 169     intptr_t addend;
 170 } TCGRelocation;
 171
 172 typedef struct TCGLabel {
 173     unsigned has_value : 1;
 174     unsigned id : 31;
 175     union {
 176         uintptr_t value;
 177         tcg_insn_unit *value_ptr;
 178         TCGRelocation *first_reloc;
 179     } u;
 180 } TCGLabel;
 181
 182 typedef struct TCGPool {
 183     struct TCGPool *next;
 184     int size;
 185     uint8_t data[0] __attribute__ ((aligned));
 186 } TCGPool;
 187
 188 #define TCG_POOL_CHUNK_SIZE 32768
 189
 190 #define TCG_MAX_TEMPS 512
 191
 192 /* when the size of the arguments of a called function is smaller than
 193    this value, they are statically allocated in the TB stack frame */
 194 #define TCG_STATIC_CALL_ARGS_SIZE 128
 195
 196 typedef enum TCGType {
 197     TCG_TYPE_I32,
 198     TCG_TYPE_I64,
 199     TCG_TYPE_COUNT, /* number of different types */
 200
 201     /* An alias for the size of the host register.  */
 202 #if TCG_TARGET_REG_BITS == 32
 203     TCG_TYPE_REG = TCG_TYPE_I32,
 204 #else
 205     TCG_TYPE_REG = TCG_TYPE_I64,
 206 #endif
 207
 208     /* An alias for the size of the native pointer.  */
 209 #if UINTPTR_MAX == UINT32_MAX
 210     TCG_TYPE_PTR = TCG_TYPE_I32,
 211 #else
 212     TCG_TYPE_PTR = TCG_TYPE_I64,
 213 #endif
 214
 215     /* An alias for the size of the target "long", aka register.  */
 216 #if TARGET_LONG_BITS == 64
 217     TCG_TYPE_TL = TCG_TYPE_I64,
 218 #else
 219     TCG_TYPE_TL = TCG_TYPE_I32,
 220 #endif
 221 } TCGType;
 222
 223 /* Constants for qemu_ld and qemu_st for the Memory Operation field.  */
 224 typedef enum TCGMemOp {
 225     MO_8     = 0,
 226     MO_16    = 1,
 227     MO_32    = 2,
 228     MO_64    = 3,
 229     MO_SIZE  = 3,   /* Mask for the above.  */
 230
 231     MO_SIGN  = 4,   /* Sign-extended, otherwise zero-extended.  */
 232
 233     MO_BSWAP = 8,   /* Host reverse endian.  */
 234 #ifdef HOST_WORDS_BIGENDIAN
 235     MO_LE    = MO_BSWAP,
 236     MO_BE    = 0,
 237 #else
 238     MO_LE    = 0,
 239     MO_BE    = MO_BSWAP,
 240 #endif
 241 #ifdef TARGET_WORDS_BIGENDIAN
 242     MO_TE    = MO_BE,
 243 #else
 244     MO_TE    = MO_LE,
 245 #endif
 246
 247     /* MO_UNALN accesses are never checked for alignment.
 248        MO_ALIGN accesses will result in a call to the CPU's
 249        do_unaligned_access hook if the guest address is not aligned.
 250        The default depends on whether the target CPU defines ALIGNED_ONLY.  */
 251     MO_AMASK = 16,
 252 #ifdef ALIGNED_ONLY
 253     MO_ALIGN = 0,
 254     MO_UNALN = MO_AMASK,
 255 #else
 256     MO_ALIGN = MO_AMASK,
 257     MO_UNALN = 0,
 258 #endif
 259
 260     /* Combinations of the above, for ease of use.  */
 261     MO_UB    = MO_8,
 262     MO_UW    = MO_16,
 263     MO_UL    = MO_32,
 264     MO_SB    = MO_SIGN | MO_8,
 265     MO_SW    = MO_SIGN | MO_16,
 266     MO_SL    = MO_SIGN | MO_32,
 267     MO_Q     = MO_64,
 268
 269     MO_LEUW  = MO_LE | MO_UW,
 270     MO_LEUL  = MO_LE | MO_UL,
 271     MO_LESW  = MO_LE | MO_SW,
 272     MO_LESL  = MO_LE | MO_SL,
 273     MO_LEQ   = MO_LE | MO_Q,
 274
 275     MO_BEUW  = MO_BE | MO_UW,
 276     MO_BEUL  = MO_BE | MO_UL,
 277     MO_BESW  = MO_BE | MO_SW,
 278     MO_BESL  = MO_BE | MO_SL,
 279     MO_BEQ   = MO_BE | MO_Q,
 280
 281     MO_TEUW  = MO_TE | MO_UW,
 282     MO_TEUL  = MO_TE | MO_UL,
 283     MO_TESW  = MO_TE | MO_SW,
 284     MO_TESL  = MO_TE | MO_SL,
 285     MO_TEQ   = MO_TE | MO_Q,
 286
 287     MO_SSIZE = MO_SIZE | MO_SIGN,
 288 } TCGMemOp;
 289
 290 typedef tcg_target_ulong TCGArg;
 291
 292 /* Define a type and accessor macros for variables.  Using pointer types
 293    is nice because it gives some level of type safely.  Converting to and
 294    from intptr_t rather than int reduces the number of sign-extension
 295    instructions that get implied on 64-bit hosts.  Users of tcg_gen_* don't
 296    need to know about any of this, and should treat TCGv as an opaque type.
 297    In addition we do typechecking for different types of variables.  TCGv_i32
 298    and TCGv_i64 are 32/64-bit variables respectively.  TCGv and TCGv_ptr
 299    are aliases for target_ulong and host pointer sized values respectively.  */
 300
 301 typedef struct TCGv_i32_d *TCGv_i32;
 302 typedef struct TCGv_i64_d *TCGv_i64;
 303 typedef struct TCGv_ptr_d *TCGv_ptr;
 304
 305 static inline TCGv_i32 QEMU_ARTIFICIAL MAKE_TCGV_I32(intptr_t i)
 306 {
 307     return (TCGv_i32)i;
 308 }
 309
 310 static inline TCGv_i64 QEMU_ARTIFICIAL MAKE_TCGV_I64(intptr_t i)
 311 {
 312     return (TCGv_i64)i;
 313 }
 314
 315 static inline TCGv_ptr QEMU_ARTIFICIAL MAKE_TCGV_PTR(intptr_t i)
 316 {
 317     return (TCGv_ptr)i;
 318 }
 319
 320 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I32(TCGv_i32 t)
 321 {
 322     return (intptr_t)t;
 323 }
 324
 325 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I64(TCGv_i64 t)
 326 {
 327     return (intptr_t)t;
 328 }
 329
 330 static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t)
 331 {
 332     return (intptr_t)t;
 333 }
 334
 335 #if TCG_TARGET_REG_BITS == 32
 336 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
 337 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
 338 #endif
 339
 340 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
 341 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
 342 #define TCGV_EQUAL_PTR(a, b) (GET_TCGV_PTR(a) == GET_TCGV_PTR(b))
 343
 344 /* Dummy definition to avoid compiler warnings.  */
 345 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
 346 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
 347 #define TCGV_UNUSED_PTR(x) x = MAKE_TCGV_PTR(-1)
 348
 349 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
 350 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
 351 #define TCGV_IS_UNUSED_PTR(x) (GET_TCGV_PTR(x) == -1)
 352
 353 /* call flags */
 354 /* Helper does not read globals (either directly or through an exception). It
 355    implies TCG_CALL_NO_WRITE_GLOBALS. */
 356 #define TCG_CALL_NO_READ_GLOBALS    0x0010
 357 /* Helper does not write globals */
 358 #define TCG_CALL_NO_WRITE_GLOBALS   0x0020
 359 /* Helper can be safely suppressed if the return value is not used. */
 360 #define TCG_CALL_NO_SIDE_EFFECTS    0x0040
 361
 362 /* convenience version of most used call flags */
 363 #define TCG_CALL_NO_RWG         TCG_CALL_NO_READ_GLOBALS
 364 #define TCG_CALL_NO_WG          TCG_CALL_NO_WRITE_GLOBALS
 365 #define TCG_CALL_NO_SE          TCG_CALL_NO_SIDE_EFFECTS
 366 #define TCG_CALL_NO_RWG_SE      (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
 367 #define TCG_CALL_NO_WG_SE       (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
 368
 369 /* used to align parameters */
 370 #define TCG_CALL_DUMMY_TCGV     MAKE_TCGV_I32(-1)
 371 #define TCG_CALL_DUMMY_ARG      ((TCGArg)(-1))
 372
 373 /* Conditions.  Note that these are laid out for easy manipulation by
 374    the functions below:
 375      bit 0 is used for inverting;
 376      bit 1 is signed,
 377      bit 2 is unsigned,
 378      bit 3 is used with bit 0 for swapping signed/unsigned.  */
 379 typedef enum {
 380     /* non-signed */
 381     TCG_COND_NEVER  = 0 | 0 | 0 | 0,
 382     TCG_COND_ALWAYS = 0 | 0 | 0 | 1,
 383     TCG_COND_EQ     = 8 | 0 | 0 | 0,
 384     TCG_COND_NE     = 8 | 0 | 0 | 1,
 385     /* signed */
 386     TCG_COND_LT     = 0 | 0 | 2 | 0,
 387     TCG_COND_GE     = 0 | 0 | 2 | 1,
 388     TCG_COND_LE     = 8 | 0 | 2 | 0,
 389     TCG_COND_GT     = 8 | 0 | 2 | 1,
 390     /* unsigned */
 391     TCG_COND_LTU    = 0 | 4 | 0 | 0,
 392     TCG_COND_GEU    = 0 | 4 | 0 | 1,
 393     TCG_COND_LEU    = 8 | 4 | 0 | 0,
 394     TCG_COND_GTU    = 8 | 4 | 0 | 1,
 395 } TCGCond;
 396
 397 /* Invert the sense of the comparison.  */
 398 static inline TCGCond tcg_invert_cond(TCGCond c)
 399 {
 400     return (TCGCond)(c ^ 1);
 401 }
 402
 403 /* Swap the operands in a comparison.  */
 404 static inline TCGCond tcg_swap_cond(TCGCond c)
 405 {
 406     return c & 6 ? (TCGCond)(c ^ 9) : c;
 407 }
 408
 409 /* Create an "unsigned" version of a "signed" comparison.  */
 410 static inline TCGCond tcg_unsigned_cond(TCGCond c)
 411 {
 412     return c & 2 ? (TCGCond)(c ^ 6) : c;
 413 }
 414
 415 /* Must a comparison be considered unsigned?  */
 416 static inline bool is_unsigned_cond(TCGCond c)
 417 {
 418     return (c & 4) != 0;
 419 }
 420
 421 /* Create a "high" version of a double-word comparison.
 422    This removes equality from a LTE or GTE comparison.  */
 423 static inline TCGCond tcg_high_cond(TCGCond c)
 424 {
 425     switch (c) {
 426     case TCG_COND_GE:
 427     case TCG_COND_LE:
 428     case TCG_COND_GEU:
 429     case TCG_COND_LEU:
 430         return (TCGCond)(c ^ 8);
 431     default:
 432         return c;
 433     }
 434 }
 435
 436 typedef enum TCGTempVal {
 437     TEMP_VAL_DEAD,
 438     TEMP_VAL_REG,
 439     TEMP_VAL_MEM,
 440     TEMP_VAL_CONST,
 441 } TCGTempVal;
 442
 443 typedef struct TCGTemp {
 444     unsigned int reg:8;
 445     unsigned int mem_reg:8;
 446     TCGTempVal val_type:8;
 447     TCGType base_type:8;
 448     TCGType type:8;
 449     unsigned int fixed_reg:1;
 450     unsigned int mem_coherent:1;
 451     unsigned int mem_allocated:1;
 452     unsigned int temp_local:1; /* If true, the temp is saved across
 453                                   basic blocks. Otherwise, it is not
 454                                   preserved across basic blocks. */
 455     unsigned int temp_allocated:1; /* never used for code gen */
 456
 457     tcg_target_long val;
 458     intptr_t mem_offset;
 459     const char *name;
 460 } TCGTemp;
 461
 462 typedef struct TCGContext TCGContext;
 463
 464 typedef struct TCGTempSet {
 465     unsigned long l[BITS_TO_LONGS(TCG_MAX_TEMPS)];
 466 } TCGTempSet;
 467
 468 typedef struct TCGOp {
 469     TCGOpcode opc   : 8;
 470
 471     /* The number of out and in parameter for a call.  */
 472     unsigned callo  : 2;
 473     unsigned calli  : 6;
 474
 475     /* Index of the arguments for this op, or -1 for zero-operand ops.  */
 476     signed args     : 16;
 477
 478     /* Index of the prex/next op, or -1 for the end of the list.  */
 479     signed prev     : 16;
 480     signed next     : 16;
 481 } TCGOp;
 482
 483 QEMU_BUILD_BUG_ON(NB_OPS > 0xff);
 484 QEMU_BUILD_BUG_ON(OPC_BUF_SIZE >= 0x7fff);
 485 QEMU_BUILD_BUG_ON(OPPARAM_BUF_SIZE >= 0x7fff);
 486
 487 struct TCGContext {
 488     uint8_t *pool_cur, *pool_end;
 489     TCGPool *pool_first, *pool_current, *pool_first_large;
 490     int nb_labels;
 491     int nb_globals;
 492     int nb_temps;
 493
 494     /* goto_tb support */
 495     tcg_insn_unit *code_buf;
 496     uintptr_t *tb_next;
 497     uint16_t *tb_next_offset;
 498     uint16_t *tb_jmp_offset; /* != NULL if USE_DIRECT_JUMP */
 499
 500     /* liveness analysis */
 501     uint16_t *op_dead_args; /* for each operation, each bit tells if the
 502                                corresponding argument is dead */
 503     uint8_t *op_sync_args;  /* for each operation, each bit tells if the
 504                                corresponding output argument needs to be
 505                                sync to memory. */
 506
 507     TCGRegSet reserved_regs;
 508     intptr_t current_frame_offset;
 509     intptr_t frame_start;
 510     intptr_t frame_end;
 511     int frame_reg;
 512
 513     tcg_insn_unit *code_ptr;
 514
 515     GHashTable *helpers;
 516
 517 #ifdef CONFIG_PROFILER
 518     /* profiling info */
 519     int64_t tb_count1;
 520     int64_t tb_count;
 521     int64_t op_count; /* total insn count */
 522     int op_count_max; /* max insn per TB */
 523     int64_t temp_count;
 524     int temp_count_max;
 525     int64_t del_op_count;
 526     int64_t code_in_len;
 527     int64_t code_out_len;
 528     int64_t interm_time;
 529     int64_t code_time;
 530     int64_t la_time;
 531     int64_t opt_time;
 532     int64_t restore_count;
 533     int64_t restore_time;
 534 #endif
 535
 536 #ifdef CONFIG_DEBUG_TCG
 537     int temps_in_use;
 538     int goto_tb_issue_mask;
 539 #endif
 540
 541     int gen_first_op_idx;
 542     int gen_last_op_idx;
 543     int gen_next_op_idx;
 544     int gen_next_parm_idx;
 545
 546     /* Code generation.  Note that we specifically do not use tcg_insn_unit
 547        here, because there's too much arithmetic throughout that relies
 548        on addition and subtraction working on bytes.  Rely on the GCC
 549        extension that allows arithmetic on void*.  */
 550     int code_gen_max_blocks;
 551     void *code_gen_prologue;
 552     void *code_gen_buffer;
 553     size_t code_gen_buffer_size;
 554     /* threshold to flush the translated code buffer */
 555     size_t code_gen_buffer_max_size;
 556     void *code_gen_ptr;
 557
 558     TBContext tb_ctx;
 559
 560     /* The TCGBackendData structure is private to tcg-target.c.  */
 561     struct TCGBackendData *be;
 562
 563     TCGTempSet free_temps[TCG_TYPE_COUNT * 2];
 564     TCGTemp temps[TCG_MAX_TEMPS]; /* globals first, temps after */
 565
 566     /* tells in which temporary a given register is. It does not take
 567        into account fixed registers */
 568     int reg_to_temp[TCG_TARGET_NB_REGS];
 569
 570     TCGOp gen_op_buf[OPC_BUF_SIZE];
 571     TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
 572
 573     target_ulong gen_opc_pc[OPC_BUF_SIZE];
 574     uint16_t gen_opc_icount[OPC_BUF_SIZE];
 575     uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
 576 };
 577
 578 extern TCGContext tcg_ctx;
 579
 580 /* The number of opcodes emitted so far.  */
 581 static inline int tcg_op_buf_count(void)
 582 {
 583     return tcg_ctx.gen_next_op_idx;
 584 }
 585
 586 /* Test for whether to terminate the TB for using too many opcodes.  */
 587 static inline bool tcg_op_buf_full(void)
 588 {
 589     return tcg_op_buf_count() >= OPC_MAX_SIZE;
 590 }
 591
 592 /* pool based memory allocation */
 593
 594 void *tcg_malloc_internal(TCGContext *s, int size);
 595 void tcg_pool_reset(TCGContext *s);
 596 void tcg_pool_delete(TCGContext *s);
 597
 598 void tb_lock(void);
 599 void tb_unlock(void);
 600 void tb_lock_reset(void);
 601
 602 static inline void *tcg_malloc(int size)
 603 {
 604     TCGContext *s = &tcg_ctx;
 605     uint8_t *ptr, *ptr_end;
 606     size = (size + sizeof(long) - 1) & ~(sizeof(long) - 1);
 607     ptr = s->pool_cur;
 608     ptr_end = ptr + size;
 609     if (unlikely(ptr_end > s->pool_end)) {
 610         return tcg_malloc_internal(&tcg_ctx, size);
 611     } else {
 612         s->pool_cur = ptr_end;
 613         return ptr;
 614     }
 615 }
 616
 617 void tcg_context_init(TCGContext *s);
 618 void tcg_prologue_init(TCGContext *s);
 619 void tcg_func_start(TCGContext *s);
 620
 621 int tcg_gen_code(TCGContext *s, tcg_insn_unit *gen_code_buf);
 622 int tcg_gen_code_search_pc(TCGContext *s, tcg_insn_unit *gen_code_buf,
 623                            long offset);
 624
 625 void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size);
 626
 627 TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name);
 628 TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name);
 629 TCGv_i32 tcg_temp_new_internal_i32(int temp_local);
 630 static inline TCGv_i32 tcg_temp_new_i32(void)
 631 {
 632     return tcg_temp_new_internal_i32(0);
 633 }
 634 static inline TCGv_i32 tcg_temp_local_new_i32(void)
 635 {
 636     return tcg_temp_new_internal_i32(1);
 637 }
 638 void tcg_temp_free_i32(TCGv_i32 arg);
 639 char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg);
 640
 641 TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name);
 642 TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name);
 643 TCGv_i64 tcg_temp_new_internal_i64(int temp_local);
 644 static inline TCGv_i64 tcg_temp_new_i64(void)
 645 {
 646     return tcg_temp_new_internal_i64(0);
 647 }
 648 static inline TCGv_i64 tcg_temp_local_new_i64(void)
 649 {
 650     return tcg_temp_new_internal_i64(1);
 651 }
 652 void tcg_temp_free_i64(TCGv_i64 arg);
 653 char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg);
 654
 655 #if defined(CONFIG_DEBUG_TCG)
 656 /* If you call tcg_clear_temp_count() at the start of a section of
 657  * code which is not supposed to leak any TCG temporaries, then
 658  * calling tcg_check_temp_count() at the end of the section will
 659  * return 1 if the section did in fact leak a temporary.
 660  */
 661 void tcg_clear_temp_count(void);
 662 int tcg_check_temp_count(void);
 663 #else
 664 #define tcg_clear_temp_count() do { } while (0)
 665 #define tcg_check_temp_count() 0
 666 #endif
 667
 668 void tcg_dump_info(FILE *f, fprintf_function cpu_fprintf);
 669 void tcg_dump_op_count(FILE *f, fprintf_function cpu_fprintf);
 670
 671 #define TCG_CT_ALIAS  0x80
 672 #define TCG_CT_IALIAS 0x40
 673 #define TCG_CT_REG    0x01
 674 #define TCG_CT_CONST  0x02 /* any constant of register size */
 675
 676 typedef struct TCGArgConstraint {
 677     uint16_t ct;
 678     uint8_t alias_index;
 679     union {
 680         TCGRegSet regs;
 681     } u;
 682 } TCGArgConstraint;
 683
 684 #define TCG_MAX_OP_ARGS 16
 685
 686 /* Bits for TCGOpDef->flags, 8 bits available.  */
 687 enum {
 688     /* Instruction defines the end of a basic block.  */
 689     TCG_OPF_BB_END       = 0x01,
 690     /* Instruction clobbers call registers and potentially update globals.  */
 691     TCG_OPF_CALL_CLOBBER = 0x02,
 692     /* Instruction has side effects: it cannot be removed if its outputs
 693        are not used, and might trigger exceptions.  */
 694     TCG_OPF_SIDE_EFFECTS = 0x04,
 695     /* Instruction operands are 64-bits (otherwise 32-bits).  */
 696     TCG_OPF_64BIT        = 0x08,
 697     /* Instruction is optional and not implemented by the host, or insn
 698        is generic and should not be implemened by the host.  */
 699     TCG_OPF_NOT_PRESENT  = 0x10,
 700 };
 701
 702 typedef struct TCGOpDef {
 703     const char *name;
 704     uint8_t nb_oargs, nb_iargs, nb_cargs, nb_args;
 705     uint8_t flags;
 706     TCGArgConstraint *args_ct;
 707     int *sorted_args;
 708 #if defined(CONFIG_DEBUG_TCG)
 709     int used;
 710 #endif
 711 } TCGOpDef;
 712
 713 extern TCGOpDef tcg_op_defs[];
 714 extern const size_t tcg_op_defs_max;
 715
 716 typedef struct TCGTargetOpDef {
 717     TCGOpcode op;
 718     const char *args_ct_str[TCG_MAX_OP_ARGS];
 719 } TCGTargetOpDef;
 720
 721 #define tcg_abort() \
 722 do {\
 723     fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
 724     abort();\
 725 } while (0)
 726
 727 #ifdef CONFIG_DEBUG_TCG
 728 # define tcg_debug_assert(X) do { assert(X); } while (0)
 729 #elif QEMU_GNUC_PREREQ(4, 5)
 730 # define tcg_debug_assert(X) \
 731     do { if (!(X)) { __builtin_unreachable(); } } while (0)
 732 #else
 733 # define tcg_debug_assert(X) do { (void)(X); } while (0)
 734 #endif
 735
 736 void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs);
 737
 738 #if UINTPTR_MAX == UINT32_MAX
 739 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
 740 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
 741
 742 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((intptr_t)(V)))
 743 #define tcg_global_reg_new_ptr(R, N) \
 744     TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
 745 #define tcg_global_mem_new_ptr(R, O, N) \
 746     TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
 747 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
 748 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
 749 #else
 750 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
 751 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
 752
 753 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((intptr_t)(V)))
 754 #define tcg_global_reg_new_ptr(R, N) \
 755     TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
 756 #define tcg_global_mem_new_ptr(R, O, N) \
 757     TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
 758 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
 759 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
 760 #endif
 761
 762 void tcg_gen_callN(TCGContext *s, void *func,
 763                    TCGArg ret, int nargs, TCGArg *args);
 764
 765 void tcg_op_remove(TCGContext *s, TCGOp *op);
 766 void tcg_optimize(TCGContext *s);
 767
 768 /* only used for debugging purposes */
 769 void tcg_dump_ops(TCGContext *s);
 770
 771 void dump_ops(const uint16_t *opc_buf, const TCGArg *opparam_buf);
 772 TCGv_i32 tcg_const_i32(int32_t val);
 773 TCGv_i64 tcg_const_i64(int64_t val);
 774 TCGv_i32 tcg_const_local_i32(int32_t val);
 775 TCGv_i64 tcg_const_local_i64(int64_t val);
 776
 777 TCGLabel *gen_new_label(void);
 778
 779 /**
 780  * label_arg
 781  * @l: label
 782  *
 783  * Encode a label for storage in the TCG opcode stream.
 784  */
 785
 786 static inline TCGArg label_arg(TCGLabel *l)
 787 {
 788     return (uintptr_t)l;
 789 }
 790
 791 /**
 792  * arg_label
 793  * @i: value
 794  *
 795  * The opposite of label_arg.  Retrieve a label from the
 796  * encoding of the TCG opcode stream.
 797  */
 798
 799 static inline TCGLabel *arg_label(TCGArg i)
 800 {
 801     return (TCGLabel *)(uintptr_t)i;
 802 }
 803
 804 /**
 805  * tcg_ptr_byte_diff
 806  * @a, @b: addresses to be differenced
 807  *
 808  * There are many places within the TCG backends where we need a byte
 809  * difference between two pointers.  While this can be accomplished
 810  * with local casting, it's easy to get wrong -- especially if one is
 811  * concerned with the signedness of the result.
 812  *
 813  * This version relies on GCC's void pointer arithmetic to get the
 814  * correct result.
 815  */
 816
 817 static inline ptrdiff_t tcg_ptr_byte_diff(void *a, void *b)
 818 {
 819     return a - b;
 820 }
 821
 822 /**
 823  * tcg_pcrel_diff
 824  * @s: the tcg context
 825  * @target: address of the target
 826  *
 827  * Produce a pc-relative difference, from the current code_ptr
 828  * to the destination address.
 829  */
 830
 831 static inline ptrdiff_t tcg_pcrel_diff(TCGContext *s, void *target)
 832 {
 833     return tcg_ptr_byte_diff(target, s->code_ptr);
 834 }
 835
 836 /**
 837  * tcg_current_code_size
 838  * @s: the tcg context
 839  *
 840  * Compute the current code size within the translation block.
 841  * This is used to fill in qemu's data structures for goto_tb.
 842  */
 843
 844 static inline size_t tcg_current_code_size(TCGContext *s)
 845 {
 846     return tcg_ptr_byte_diff(s->code_ptr, s->code_buf);
 847 }
 848
 849 /* Combine the TCGMemOp and mmu_idx parameters into a single value.  */
 850 typedef uint32_t TCGMemOpIdx;
 851
 852 /**
 853  * make_memop_idx
 854  * @op: memory operation
 855  * @idx: mmu index
 856  *
 857  * Encode these values into a single parameter.
 858  */
 859 static inline TCGMemOpIdx make_memop_idx(TCGMemOp op, unsigned idx)
 860 {
 861     tcg_debug_assert(idx <= 15);
 862     return (op << 4) | idx;
 863 }
 864
 865 /**
 866  * get_memop
 867  * @oi: combined op/idx parameter
 868  *
 869  * Extract the memory operation from the combined value.
 870  */
 871 static inline TCGMemOp get_memop(TCGMemOpIdx oi)
 872 {
 873     return oi >> 4;
 874 }
 875
 876 /**
 877  * get_mmuidx
 878  * @oi: combined op/idx parameter
 879  *
 880  * Extract the mmu index from the combined value.
 881  */
 882 static inline unsigned get_mmuidx(TCGMemOpIdx oi)
 883 {
 884     return oi & 15;
 885 }
 886
 887 /**
 888  * tcg_qemu_tb_exec:
 889  * @env: CPUArchState * for the CPU
 890  * @tb_ptr: address of generated code for the TB to execute
 891  *
 892  * Start executing code from a given translation block.
 893  * Where translation blocks have been linked, execution
 894  * may proceed from the given TB into successive ones.
 895  * Control eventually returns only when some action is needed
 896  * from the top-level loop: either control must pass to a TB
 897  * which has not yet been directly linked, or an asynchronous
 898  * event such as an interrupt needs handling.
 899  *
 900  * The return value is a pointer to the next TB to execute
 901  * (if known; otherwise zero). This pointer is assumed to be
 902  * 4-aligned, and the bottom two bits are used to return further
 903  * information:
 904  *  0, 1: the link between this TB and the next is via the specified
 905  *        TB index (0 or 1). That is, we left the TB via (the equivalent
 906  *        of) "goto_tb <index>". The main loop uses this to determine
 907  *        how to link the TB just executed to the next.
 908  *  2:    we are using instruction counting code generation, and we
 909  *        did not start executing this TB because the instruction counter
 910  *        would hit zero midway through it. In this case the next-TB pointer
 911  *        returned is the TB we were about to execute, and the caller must
 912  *        arrange to execute the remaining count of instructions.
 913  *  3:    we stopped because the CPU's exit_request flag was set
 914  *        (usually meaning that there is an interrupt that needs to be
 915  *        handled). The next-TB pointer returned is the TB we were
 916  *        about to execute when we noticed the pending exit request.
 917  *
 918  * If the bottom two bits indicate an exit-via-index then the CPU
 919  * state is correctly synchronised and ready for execution of the next
 920  * TB (and in particular the guest PC is the address to execute next).
 921  * Otherwise, we gave up on execution of this TB before it started, and
 922  * the caller must fix up the CPU state by calling the CPU's
 923  * synchronize_from_tb() method with the next-TB pointer we return (falling
 924  * back to calling the CPU's set_pc method with tb->pb if no
 925  * synchronize_from_tb() method exists).
 926  *
 927  * Note that TCG targets may use a different definition of tcg_qemu_tb_exec
 928  * to this default (which just calls the prologue.code emitted by
 929  * tcg_target_qemu_prologue()).
 930  */
 931 #define TB_EXIT_MASK 3
 932 #define TB_EXIT_IDX0 0
 933 #define TB_EXIT_IDX1 1
 934 #define TB_EXIT_ICOUNT_EXPIRED 2
 935 #define TB_EXIT_REQUESTED 3
 936
 937 #ifdef HAVE_TCG_QEMU_TB_EXEC
 938 uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr);
 939 #else
 940 # define tcg_qemu_tb_exec(env, tb_ptr) \
 941     ((uintptr_t (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, tb_ptr)
 942 #endif
 943
 944 void tcg_register_jit(void *buf, size_t buf_size);
 945
 946 /*
 947  * Memory helpers that will be used by TCG generated code.
 948  */
 949 #ifdef CONFIG_SOFTMMU
 950 /* Value zero-extended to tcg register size.  */
 951 tcg_target_ulong helper_ret_ldub_mmu(CPUArchState *env, target_ulong addr,
 952                                      TCGMemOpIdx oi, uintptr_t retaddr);
 953 tcg_target_ulong helper_le_lduw_mmu(CPUArchState *env, target_ulong addr,
 954                                     TCGMemOpIdx oi, uintptr_t retaddr);
 955 tcg_target_ulong helper_le_ldul_mmu(CPUArchState *env, target_ulong addr,
 956                                     TCGMemOpIdx oi, uintptr_t retaddr);
 957 uint64_t helper_le_ldq_mmu(CPUArchState *env, target_ulong addr,
 958                            TCGMemOpIdx oi, uintptr_t retaddr);
 959 tcg_target_ulong helper_be_lduw_mmu(CPUArchState *env, target_ulong addr,
 960                                     TCGMemOpIdx oi, uintptr_t retaddr);
 961 tcg_target_ulong helper_be_ldul_mmu(CPUArchState *env, target_ulong addr,
 962                                     TCGMemOpIdx oi, uintptr_t retaddr);
 963 uint64_t helper_be_ldq_mmu(CPUArchState *env, target_ulong addr,
 964                            TCGMemOpIdx oi, uintptr_t retaddr);
 965
 966 /* Value sign-extended to tcg register size.  */
 967 tcg_target_ulong helper_ret_ldsb_mmu(CPUArchState *env, target_ulong addr,
 968                                      TCGMemOpIdx oi, uintptr_t retaddr);
 969 tcg_target_ulong helper_le_ldsw_mmu(CPUArchState *env, target_ulong addr,
 970                                     TCGMemOpIdx oi, uintptr_t retaddr);
 971 tcg_target_ulong helper_le_ldsl_mmu(CPUArchState *env, target_ulong addr,
 972                                     TCGMemOpIdx oi, uintptr_t retaddr);
 973 tcg_target_ulong helper_be_ldsw_mmu(CPUArchState *env, target_ulong addr,
 974                                     TCGMemOpIdx oi, uintptr_t retaddr);
 975 tcg_target_ulong helper_be_ldsl_mmu(CPUArchState *env, target_ulong addr,
 976                                     TCGMemOpIdx oi, uintptr_t retaddr);
 977
 978 void helper_ret_stb_mmu(CPUArchState *env, target_ulong addr, uint8_t val,
 979                         TCGMemOpIdx oi, uintptr_t retaddr);
 980 void helper_le_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 981                        TCGMemOpIdx oi, uintptr_t retaddr);
 982 void helper_le_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 983                        TCGMemOpIdx oi, uintptr_t retaddr);
 984 void helper_le_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 985                        TCGMemOpIdx oi, uintptr_t retaddr);
 986 void helper_be_stw_mmu(CPUArchState *env, target_ulong addr, uint16_t val,
 987                        TCGMemOpIdx oi, uintptr_t retaddr);
 988 void helper_be_stl_mmu(CPUArchState *env, target_ulong addr, uint32_t val,
 989                        TCGMemOpIdx oi, uintptr_t retaddr);
 990 void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 991                        TCGMemOpIdx oi, uintptr_t retaddr);
 992
 993 uint8_t helper_ret_ldb_cmmu(CPUArchState *env, target_ulong addr,
 994                             TCGMemOpIdx oi, uintptr_t retaddr);
 995 uint16_t helper_le_ldw_cmmu(CPUArchState *env, target_ulong addr,
 996                             TCGMemOpIdx oi, uintptr_t retaddr);
 997 uint32_t helper_le_ldl_cmmu(CPUArchState *env, target_ulong addr,
 998                             TCGMemOpIdx oi, uintptr_t retaddr);
 999 uint64_t helper_le_ldq_cmmu(CPUArchState *env, target_ulong addr,
1000                             TCGMemOpIdx oi, uintptr_t retaddr);
1001 uint16_t helper_be_ldw_cmmu(CPUArchState *env, target_ulong addr,
1002                             TCGMemOpIdx oi, uintptr_t retaddr);
1003 uint32_t helper_be_ldl_cmmu(CPUArchState *env, target_ulong addr,
1004                             TCGMemOpIdx oi, uintptr_t retaddr);
1005 uint64_t helper_be_ldq_cmmu(CPUArchState *env, target_ulong addr,
1006                             TCGMemOpIdx oi, uintptr_t retaddr);
1007
1008 /* Temporary aliases until backends are converted.  */
1009 #ifdef TARGET_WORDS_BIGENDIAN
1010 # define helper_ret_ldsw_mmu  helper_be_ldsw_mmu
1011 # define helper_ret_lduw_mmu  helper_be_lduw_mmu
1012 # define helper_ret_ldsl_mmu  helper_be_ldsl_mmu
1013 # define helper_ret_ldul_mmu  helper_be_ldul_mmu
1014 # define helper_ret_ldl_mmu   helper_be_ldul_mmu
1015 # define helper_ret_ldq_mmu   helper_be_ldq_mmu
1016 # define helper_ret_stw_mmu   helper_be_stw_mmu
1017 # define helper_ret_stl_mmu   helper_be_stl_mmu
1018 # define helper_ret_stq_mmu   helper_be_stq_mmu
1019 # define helper_ret_ldw_cmmu  helper_be_ldw_cmmu
1020 # define helper_ret_ldl_cmmu  helper_be_ldl_cmmu
1021 # define helper_ret_ldq_cmmu  helper_be_ldq_cmmu
1022 #else
1023 # define helper_ret_ldsw_mmu  helper_le_ldsw_mmu
1024 # define helper_ret_lduw_mmu  helper_le_lduw_mmu
1025 # define helper_ret_ldsl_mmu  helper_le_ldsl_mmu
1026 # define helper_ret_ldul_mmu  helper_le_ldul_mmu
1027 # define helper_ret_ldl_mmu   helper_le_ldul_mmu
1028 # define helper_ret_ldq_mmu   helper_le_ldq_mmu
1029 # define helper_ret_stw_mmu   helper_le_stw_mmu
1030 # define helper_ret_stl_mmu   helper_le_stl_mmu
1031 # define helper_ret_stq_mmu   helper_le_stq_mmu
1032 # define helper_ret_ldw_cmmu  helper_le_ldw_cmmu
1033 # define helper_ret_ldl_cmmu  helper_le_ldl_cmmu
1034 # define helper_ret_ldq_cmmu  helper_le_ldq_cmmu
1035 #endif
1036
1037 #endif /* CONFIG_SOFTMMU */
1038
1039 #endif /* TCG_H */