target/riscv/cpu.c: restrict 'marchid' value
[qemu/ar7.git] / tcg / sparc64 / tcg-target-reg-bits.h
blob34a6711013dd1a0fe4f838bfb4fb39e0ddd96e10
1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Define target-specific register size
4 * Copyright (c) 2023 Linaro
5 */
7 #ifndef TCG_TARGET_REG_BITS_H
8 #define TCG_TARGET_REG_BITS_H
10 #define TCG_TARGET_REG_BITS 64
12 #endif