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target/riscv/cpu.c: restrict 'marchid' value
[qemu/ar7.git]
/
tcg
/
sparc64
/
tcg-target-reg-bits.h
blob
34a6711013dd1a0fe4f838bfb4fb39e0ddd96e10
1
/* SPDX-License-Identifier: MIT */
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/*
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* Define target-specific register size
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* Copyright (c) 2023 Linaro
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*/
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#ifndef TCG_TARGET_REG_BITS_H
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#define TCG_TARGET_REG_BITS_H
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#define TCG_TARGET_REG_BITS 64
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#endif