tcg/tcg-op.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef TCG_TCG_OP_H
  26 #define TCG_TCG_OP_H
  27
  28 #include "tcg.h"
  29 #include "exec/helper-proto.h"
  30 #include "exec/helper-gen.h"
  31
  32 /* Basic output routines.  Not for general consumption.  */
  33
  34 void tcg_gen_op1(TCGOpcode, TCGArg);
  35 void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg);
  36 void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg);
  37 void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
  38 void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
  39 void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
  40
  41 void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
  42 void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
  43 void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
  44
  45 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
  46 {
  47     tcg_gen_op1(opc, tcgv_i32_arg(a1));
  48 }
  49
  50 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
  51 {
  52     tcg_gen_op1(opc, tcgv_i64_arg(a1));
  53 }
  54
  55 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
  56 {
  57     tcg_gen_op1(opc, a1);
  58 }
  59
  60 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
  61 {
  62     tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
  63 }
  64
  65 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
  66 {
  67     tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
  68 }
  69
  70 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
  71 {
  72     tcg_gen_op2(opc, tcgv_i32_arg(a1), a2);
  73 }
  74
  75 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
  76 {
  77     tcg_gen_op2(opc, tcgv_i64_arg(a1), a2);
  78 }
  79
  80 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
  81 {
  82     tcg_gen_op2(opc, a1, a2);
  83 }
  84
  85 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
  86                                    TCGv_i32 a2, TCGv_i32 a3)
  87 {
  88     tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3));
  89 }
  90
  91 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
  92                                    TCGv_i64 a2, TCGv_i64 a3)
  93 {
  94     tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3));
  95 }
  96
  97 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
  98                                     TCGv_i32 a2, TCGArg a3)
  99 {
 100     tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
 101 }
 102
 103 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
 104                                     TCGv_i64 a2, TCGArg a3)
 105 {
 106     tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
 107 }
 108
 109 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
 110                                        TCGv_ptr base, TCGArg offset)
 111 {
 112     tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
 113 }
 114
 115 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
 116                                        TCGv_ptr base, TCGArg offset)
 117 {
 118     tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
 119 }
 120
 121 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 122                                    TCGv_i32 a3, TCGv_i32 a4)
 123 {
 124     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 125                 tcgv_i32_arg(a3), tcgv_i32_arg(a4));
 126 }
 127
 128 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 129                                    TCGv_i64 a3, TCGv_i64 a4)
 130 {
 131     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 132                 tcgv_i64_arg(a3), tcgv_i64_arg(a4));
 133 }
 134
 135 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 136                                     TCGv_i32 a3, TCGArg a4)
 137 {
 138     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 139                 tcgv_i32_arg(a3), a4);
 140 }
 141
 142 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 143                                     TCGv_i64 a3, TCGArg a4)
 144 {
 145     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 146                 tcgv_i64_arg(a3), a4);
 147 }
 148
 149 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 150                                      TCGArg a3, TCGArg a4)
 151 {
 152     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
 153 }
 154
 155 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 156                                      TCGArg a3, TCGArg a4)
 157 {
 158     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
 159 }
 160
 161 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 162                                    TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
 163 {
 164     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 165                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
 166 }
 167
 168 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 169                                    TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
 170 {
 171     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 172                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
 173 }
 174
 175 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 176                                     TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
 177 {
 178     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 179                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
 180 }
 181
 182 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 183                                     TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
 184 {
 185     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 186                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
 187 }
 188
 189 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 190                                      TCGv_i32 a3, TCGArg a4, TCGArg a5)
 191 {
 192     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 193                 tcgv_i32_arg(a3), a4, a5);
 194 }
 195
 196 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 197                                      TCGv_i64 a3, TCGArg a4, TCGArg a5)
 198 {
 199     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 200                 tcgv_i64_arg(a3), a4, a5);
 201 }
 202
 203 static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 204                                    TCGv_i32 a3, TCGv_i32 a4,
 205                                    TCGv_i32 a5, TCGv_i32 a6)
 206 {
 207     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 208                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
 209                 tcgv_i32_arg(a6));
 210 }
 211
 212 static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 213                                    TCGv_i64 a3, TCGv_i64 a4,
 214                                    TCGv_i64 a5, TCGv_i64 a6)
 215 {
 216     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 217                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
 218                 tcgv_i64_arg(a6));
 219 }
 220
 221 static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 222                                     TCGv_i32 a3, TCGv_i32 a4,
 223                                     TCGv_i32 a5, TCGArg a6)
 224 {
 225     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 226                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
 227 }
 228
 229 static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 230                                     TCGv_i64 a3, TCGv_i64 a4,
 231                                     TCGv_i64 a5, TCGArg a6)
 232 {
 233     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 234                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
 235 }
 236
 237 static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 238                                      TCGv_i32 a3, TCGv_i32 a4,
 239                                      TCGArg a5, TCGArg a6)
 240 {
 241     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 242                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
 243 }
 244
 245 static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 246                                      TCGv_i64 a3, TCGv_i64 a4,
 247                                      TCGArg a5, TCGArg a6)
 248 {
 249     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 250                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
 251 }
 252
 253
 254 /* Generic ops.  */
 255
 256 static inline void gen_set_label(TCGLabel *l)
 257 {
 258     l->present = 1;
 259     tcg_gen_op1(INDEX_op_set_label, label_arg(l));
 260 }
 261
 262 static inline void tcg_gen_br(TCGLabel *l)
 263 {
 264     l->refs++;
 265     tcg_gen_op1(INDEX_op_br, label_arg(l));
 266 }
 267
 268 void tcg_gen_mb(TCGBar);
 269
 270 /* Helper calls. */
 271
 272 /* 32 bit ops */
 273
 274 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 275 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
 276 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 277 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 278 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 279 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 280 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 281 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 282 void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 283 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 284 void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 285 void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 286 void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 287 void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 288 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 289 void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 290 void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 291 void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 292 void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 293 void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 294 void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 295 void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 296 void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 297 void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
 298 void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
 299 void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 300 void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 301 void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 302 void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 303 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
 304                          unsigned int ofs, unsigned int len);
 305 void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
 306                            unsigned int ofs, unsigned int len);
 307 void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
 308                          unsigned int ofs, unsigned int len);
 309 void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
 310                           unsigned int ofs, unsigned int len);
 311 void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
 312 void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
 313 void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
 314                          TCGv_i32 arg1, TCGv_i32 arg2);
 315 void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
 316                           TCGv_i32 arg1, int32_t arg2);
 317 void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
 318                          TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
 319 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 320                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 321 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 322                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 323 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 324 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 325 void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 326 void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
 327 void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
 328 void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
 329 void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
 330 void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
 331 void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
 332 void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
 333 void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
 334 void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
 335 void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
 336
 337 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
 338 {
 339     tcg_gen_op1_i32(INDEX_op_discard, arg);
 340 }
 341
 342 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
 343 {
 344     if (ret != arg) {
 345         tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
 346     }
 347 }
 348
 349 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
 350 {
 351     tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
 352 }
 353
 354 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 355                                     tcg_target_long offset)
 356 {
 357     tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
 358 }
 359
 360 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 361                                     tcg_target_long offset)
 362 {
 363     tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
 364 }
 365
 366 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 367                                      tcg_target_long offset)
 368 {
 369     tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
 370 }
 371
 372 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 373                                      tcg_target_long offset)
 374 {
 375     tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
 376 }
 377
 378 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
 379                                   tcg_target_long offset)
 380 {
 381     tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
 382 }
 383
 384 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 385                                    tcg_target_long offset)
 386 {
 387     tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
 388 }
 389
 390 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 391                                     tcg_target_long offset)
 392 {
 393     tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
 394 }
 395
 396 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 397                                   tcg_target_long offset)
 398 {
 399     tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
 400 }
 401
 402 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 403 {
 404     tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
 405 }
 406
 407 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 408 {
 409     tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
 410 }
 411
 412 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 413 {
 414     tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
 415 }
 416
 417 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 418 {
 419     tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
 420 }
 421
 422 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 423 {
 424     tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
 425 }
 426
 427 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 428 {
 429     tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
 430 }
 431
 432 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 433 {
 434     tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
 435 }
 436
 437 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 438 {
 439     tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
 440 }
 441
 442 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 443 {
 444     tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
 445 }
 446
 447 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
 448 {
 449     if (TCG_TARGET_HAS_neg_i32) {
 450         tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
 451     } else {
 452         tcg_gen_subfi_i32(ret, 0, arg);
 453     }
 454 }
 455
 456 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
 457 {
 458     if (TCG_TARGET_HAS_not_i32) {
 459         tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
 460     } else {
 461         tcg_gen_xori_i32(ret, arg, -1);
 462     }
 463 }
 464
 465 /* 64 bit ops */
 466
 467 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 468 void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
 469 void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 470 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 471 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 472 void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 473 void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 474 void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 475 void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 476 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 477 void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 478 void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 479 void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 480 void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 481 void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 482 void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 483 void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 484 void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 485 void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 486 void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 487 void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 488 void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 489 void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 490 void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
 491 void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
 492 void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 493 void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 494 void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 495 void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 496 void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
 497                          unsigned int ofs, unsigned int len);
 498 void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
 499                            unsigned int ofs, unsigned int len);
 500 void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
 501                          unsigned int ofs, unsigned int len);
 502 void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
 503                           unsigned int ofs, unsigned int len);
 504 void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
 505 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
 506 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
 507                          TCGv_i64 arg1, TCGv_i64 arg2);
 508 void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
 509                           TCGv_i64 arg1, int64_t arg2);
 510 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
 511                          TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
 512 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 513                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 514 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 515                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 516 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 517 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 518 void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 519 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
 520 void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
 521 void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
 522 void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
 523 void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
 524 void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
 525 void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
 526 void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
 527 void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
 528 void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
 529 void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
 530 void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
 531 void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
 532 void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
 533
 534 #if TCG_TARGET_REG_BITS == 64
 535 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
 536 {
 537     tcg_gen_op1_i64(INDEX_op_discard, arg);
 538 }
 539
 540 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 541 {
 542     if (ret != arg) {
 543         tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
 544     }
 545 }
 546
 547 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 548 {
 549     tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
 550 }
 551
 552 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 553                                     tcg_target_long offset)
 554 {
 555     tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
 556 }
 557
 558 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 559                                     tcg_target_long offset)
 560 {
 561     tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
 562 }
 563
 564 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 565                                      tcg_target_long offset)
 566 {
 567     tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
 568 }
 569
 570 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 571                                      tcg_target_long offset)
 572 {
 573     tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
 574 }
 575
 576 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 577                                      tcg_target_long offset)
 578 {
 579     tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
 580 }
 581
 582 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 583                                      tcg_target_long offset)
 584 {
 585     tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
 586 }
 587
 588 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
 589                                   tcg_target_long offset)
 590 {
 591     tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
 592 }
 593
 594 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 595                                    tcg_target_long offset)
 596 {
 597     tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
 598 }
 599
 600 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 601                                     tcg_target_long offset)
 602 {
 603     tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
 604 }
 605
 606 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 607                                     tcg_target_long offset)
 608 {
 609     tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
 610 }
 611
 612 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 613                                   tcg_target_long offset)
 614 {
 615     tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
 616 }
 617
 618 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 619 {
 620     tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
 621 }
 622
 623 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 624 {
 625     tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
 626 }
 627
 628 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 629 {
 630     tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
 631 }
 632
 633 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 634 {
 635     tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
 636 }
 637
 638 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 639 {
 640     tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
 641 }
 642
 643 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 644 {
 645     tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
 646 }
 647
 648 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 649 {
 650     tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
 651 }
 652
 653 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 654 {
 655     tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
 656 }
 657
 658 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 659 {
 660     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
 661 }
 662 #else /* TCG_TARGET_REG_BITS == 32 */
 663 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 664                                    tcg_target_long offset)
 665 {
 666     tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
 667 }
 668
 669 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 670                                     tcg_target_long offset)
 671 {
 672     tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
 673 }
 674
 675 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 676                                     tcg_target_long offset)
 677 {
 678     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 679 }
 680
 681 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 682 {
 683     tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 684                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 685 }
 686
 687 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 688 {
 689     tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 690                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 691 }
 692
 693 void tcg_gen_discard_i64(TCGv_i64 arg);
 694 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
 695 void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
 696 void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 697 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 698 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 699 void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 700 void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 701 void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 702 void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 703 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
 704 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 705 void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 706 void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 707 void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 708 void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 709 void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 710 void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 711 #endif /* TCG_TARGET_REG_BITS */
 712
 713 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
 714 {
 715     if (TCG_TARGET_HAS_neg_i64) {
 716         tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
 717     } else {
 718         tcg_gen_subfi_i64(ret, 0, arg);
 719     }
 720 }
 721
 722 /* Size changing operations.  */
 723
 724 void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 725 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 726 void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
 727 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 728 void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 729 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
 730 void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
 731
 732 static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
 733 {
 734     tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
 735 }
 736
 737 /* QEMU specific operations.  */
 738
 739 #ifndef TARGET_LONG_BITS
 740 #error must include QEMU headers
 741 #endif
 742
 743 #if TARGET_INSN_START_WORDS == 1
 744 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 745 static inline void tcg_gen_insn_start(target_ulong pc)
 746 {
 747     tcg_gen_op1(INDEX_op_insn_start, pc);
 748 }
 749 # else
 750 static inline void tcg_gen_insn_start(target_ulong pc)
 751 {
 752     tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32));
 753 }
 754 # endif
 755 #elif TARGET_INSN_START_WORDS == 2
 756 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 757 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 758 {
 759     tcg_gen_op2(INDEX_op_insn_start, pc, a1);
 760 }
 761 # else
 762 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 763 {
 764     tcg_gen_op4(INDEX_op_insn_start,
 765                 (uint32_t)pc, (uint32_t)(pc >> 32),
 766                 (uint32_t)a1, (uint32_t)(a1 >> 32));
 767 }
 768 # endif
 769 #elif TARGET_INSN_START_WORDS == 3
 770 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 771 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 772                                       target_ulong a2)
 773 {
 774     tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2);
 775 }
 776 # else
 777 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 778                                       target_ulong a2)
 779 {
 780     tcg_gen_op6(INDEX_op_insn_start,
 781                 (uint32_t)pc, (uint32_t)(pc >> 32),
 782                 (uint32_t)a1, (uint32_t)(a1 >> 32),
 783                 (uint32_t)a2, (uint32_t)(a2 >> 32));
 784 }
 785 # endif
 786 #else
 787 # error "Unhandled number of operands to insn_start"
 788 #endif
 789
 790 /**
 791  * tcg_gen_exit_tb() - output exit_tb TCG operation
 792  * @tb: The TranslationBlock from which we are exiting
 793  * @idx: Direct jump slot index, or exit request
 794  *
 795  * See tcg/README for more info about this TCG operation.
 796  * See also tcg.h and the block comment above TB_EXIT_MASK.
 797  *
 798  * For a normal exit from the TB, back to the main loop, @tb should
 799  * be NULL and @idx should be 0.  Otherwise, @tb should be valid and
 800  * @idx should be one of the TB_EXIT_ values.
 801  */
 802 void tcg_gen_exit_tb(TranslationBlock *tb, unsigned idx);
 803
 804 /**
 805  * tcg_gen_goto_tb() - output goto_tb TCG operation
 806  * @idx: Direct jump slot index (0 or 1)
 807  *
 808  * See tcg/README for more info about this TCG operation.
 809  *
 810  * NOTE: In softmmu emulation, direct jumps with goto_tb are only safe within
 811  * the pages this TB resides in because we don't take care of direct jumps when
 812  * address mapping changes, e.g. in tlb_flush(). In user mode, there's only a
 813  * static address translation, so the destination address is always valid, TBs
 814  * are always invalidated properly, and direct jumps are reset when mapping
 815  * changes.
 816  */
 817 void tcg_gen_goto_tb(unsigned idx);
 818
 819 /**
 820  * tcg_gen_lookup_and_goto_ptr() - look up the current TB, jump to it if valid
 821  * @addr: Guest address of the target TB
 822  *
 823  * If the TB is not valid, jump to the epilogue.
 824  *
 825  * This operation is optional. If the TCG backend does not implement goto_ptr,
 826  * this op is equivalent to calling tcg_gen_exit_tb() with 0 as the argument.
 827  */
 828 void tcg_gen_lookup_and_goto_ptr(void);
 829
 830 #if TARGET_LONG_BITS == 32
 831 #define tcg_temp_new() tcg_temp_new_i32()
 832 #define tcg_global_reg_new tcg_global_reg_new_i32
 833 #define tcg_global_mem_new tcg_global_mem_new_i32
 834 #define tcg_temp_local_new() tcg_temp_local_new_i32()
 835 #define tcg_temp_free tcg_temp_free_i32
 836 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
 837 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
 838 #else
 839 #define tcg_temp_new() tcg_temp_new_i64()
 840 #define tcg_global_reg_new tcg_global_reg_new_i64
 841 #define tcg_global_mem_new tcg_global_mem_new_i64
 842 #define tcg_temp_local_new() tcg_temp_local_new_i64()
 843 #define tcg_temp_free tcg_temp_free_i64
 844 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
 845 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
 846 #endif
 847
 848 void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 849 void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 850 void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 851 void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 852
 853 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
 854 {
 855     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
 856 }
 857
 858 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
 859 {
 860     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
 861 }
 862
 863 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
 864 {
 865     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
 866 }
 867
 868 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
 869 {
 870     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
 871 }
 872
 873 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
 874 {
 875     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
 876 }
 877
 878 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
 879 {
 880     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
 881 }
 882
 883 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
 884 {
 885     tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
 886 }
 887
 888 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
 889 {
 890     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
 891 }
 892
 893 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
 894 {
 895     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
 896 }
 897
 898 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
 899 {
 900     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
 901 }
 902
 903 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
 904 {
 905     tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
 906 }
 907
 908 void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
 909                                 TCGArg, TCGMemOp);
 910 void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
 911                                 TCGArg, TCGMemOp);
 912
 913 void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 914 void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 915
 916 void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 917 void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 918 void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 919 void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 920 void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 921 void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 922 void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 923 void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 924 void tcg_gen_atomic_fetch_smin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 925 void tcg_gen_atomic_fetch_smin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 926 void tcg_gen_atomic_fetch_umin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 927 void tcg_gen_atomic_fetch_umin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 928 void tcg_gen_atomic_fetch_smax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 929 void tcg_gen_atomic_fetch_smax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 930 void tcg_gen_atomic_fetch_umax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 931 void tcg_gen_atomic_fetch_umax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 932
 933 void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 934 void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 935 void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 936 void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 937 void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 938 void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 939 void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 940 void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 941 void tcg_gen_atomic_smin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 942 void tcg_gen_atomic_smin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 943 void tcg_gen_atomic_umin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 944 void tcg_gen_atomic_umin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 945 void tcg_gen_atomic_smax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 946 void tcg_gen_atomic_smax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 947 void tcg_gen_atomic_umax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 948 void tcg_gen_atomic_umax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 949
 950 void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
 951 void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
 952 void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
 953 void tcg_gen_dup8i_vec(TCGv_vec, uint32_t);
 954 void tcg_gen_dup16i_vec(TCGv_vec, uint32_t);
 955 void tcg_gen_dup32i_vec(TCGv_vec, uint32_t);
 956 void tcg_gen_dup64i_vec(TCGv_vec, uint64_t);
 957 void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
 958 void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 959 void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 960 void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 961 void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 962 void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 963 void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 964 void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 965 void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 966 void tcg_gen_nand_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 967 void tcg_gen_nor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 968 void tcg_gen_eqv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 969 void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
 970 void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
 971 void tcg_gen_ssadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 972 void tcg_gen_usadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 973 void tcg_gen_sssub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 974 void tcg_gen_ussub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 975 void tcg_gen_smin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 976 void tcg_gen_umin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 977 void tcg_gen_smax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 978 void tcg_gen_umax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 979
 980 void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
 981 void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
 982 void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
 983
 984 void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r,
 985                      TCGv_vec a, TCGv_vec b);
 986
 987 void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
 988 void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
 989 void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
 990
 991 #if TARGET_LONG_BITS == 64
 992 #define tcg_gen_movi_tl tcg_gen_movi_i64
 993 #define tcg_gen_mov_tl tcg_gen_mov_i64
 994 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
 995 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
 996 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
 997 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
 998 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
 999 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
1000 #define tcg_gen_ld_tl tcg_gen_ld_i64
1001 #define tcg_gen_st8_tl tcg_gen_st8_i64
1002 #define tcg_gen_st16_tl tcg_gen_st16_i64
1003 #define tcg_gen_st32_tl tcg_gen_st32_i64
1004 #define tcg_gen_st_tl tcg_gen_st_i64
1005 #define tcg_gen_add_tl tcg_gen_add_i64
1006 #define tcg_gen_addi_tl tcg_gen_addi_i64
1007 #define tcg_gen_sub_tl tcg_gen_sub_i64
1008 #define tcg_gen_neg_tl tcg_gen_neg_i64
1009 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
1010 #define tcg_gen_subi_tl tcg_gen_subi_i64
1011 #define tcg_gen_and_tl tcg_gen_and_i64
1012 #define tcg_gen_andi_tl tcg_gen_andi_i64
1013 #define tcg_gen_or_tl tcg_gen_or_i64
1014 #define tcg_gen_ori_tl tcg_gen_ori_i64
1015 #define tcg_gen_xor_tl tcg_gen_xor_i64
1016 #define tcg_gen_xori_tl tcg_gen_xori_i64
1017 #define tcg_gen_not_tl tcg_gen_not_i64
1018 #define tcg_gen_shl_tl tcg_gen_shl_i64
1019 #define tcg_gen_shli_tl tcg_gen_shli_i64
1020 #define tcg_gen_shr_tl tcg_gen_shr_i64
1021 #define tcg_gen_shri_tl tcg_gen_shri_i64
1022 #define tcg_gen_sar_tl tcg_gen_sar_i64
1023 #define tcg_gen_sari_tl tcg_gen_sari_i64
1024 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1025 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1026 #define tcg_gen_setcond_tl tcg_gen_setcond_i64
1027 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
1028 #define tcg_gen_mul_tl tcg_gen_mul_i64
1029 #define tcg_gen_muli_tl tcg_gen_muli_i64
1030 #define tcg_gen_div_tl tcg_gen_div_i64
1031 #define tcg_gen_rem_tl tcg_gen_rem_i64
1032 #define tcg_gen_divu_tl tcg_gen_divu_i64
1033 #define tcg_gen_remu_tl tcg_gen_remu_i64
1034 #define tcg_gen_discard_tl tcg_gen_discard_i64
1035 #define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
1036 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1037 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1038 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1039 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1040 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1041 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1042 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1043 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1044 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1045 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1046 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1047 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
1048 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
1049 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
1050 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1051 #define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
1052 #define tcg_gen_andc_tl tcg_gen_andc_i64
1053 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
1054 #define tcg_gen_nand_tl tcg_gen_nand_i64
1055 #define tcg_gen_nor_tl tcg_gen_nor_i64
1056 #define tcg_gen_orc_tl tcg_gen_orc_i64
1057 #define tcg_gen_clz_tl tcg_gen_clz_i64
1058 #define tcg_gen_ctz_tl tcg_gen_ctz_i64
1059 #define tcg_gen_clzi_tl tcg_gen_clzi_i64
1060 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
1061 #define tcg_gen_clrsb_tl tcg_gen_clrsb_i64
1062 #define tcg_gen_ctpop_tl tcg_gen_ctpop_i64
1063 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
1064 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
1065 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
1066 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
1067 #define tcg_gen_deposit_tl tcg_gen_deposit_i64
1068 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64
1069 #define tcg_gen_extract_tl tcg_gen_extract_i64
1070 #define tcg_gen_sextract_tl tcg_gen_sextract_i64
1071 #define tcg_const_tl tcg_const_i64
1072 #define tcg_const_local_tl tcg_const_local_i64
1073 #define tcg_gen_movcond_tl tcg_gen_movcond_i64
1074 #define tcg_gen_add2_tl tcg_gen_add2_i64
1075 #define tcg_gen_sub2_tl tcg_gen_sub2_i64
1076 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
1077 #define tcg_gen_muls2_tl tcg_gen_muls2_i64
1078 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64
1079 #define tcg_gen_smin_tl tcg_gen_smin_i64
1080 #define tcg_gen_umin_tl tcg_gen_umin_i64
1081 #define tcg_gen_smax_tl tcg_gen_smax_i64
1082 #define tcg_gen_umax_tl tcg_gen_umax_i64
1083 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
1084 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
1085 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
1086 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
1087 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
1088 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
1089 #define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i64
1090 #define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i64
1091 #define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i64
1092 #define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i64
1093 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
1094 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
1095 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
1096 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
1097 #define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i64
1098 #define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i64
1099 #define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i64
1100 #define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i64
1101 #define tcg_gen_dup_tl_vec  tcg_gen_dup_i64_vec
1102 #else
1103 #define tcg_gen_movi_tl tcg_gen_movi_i32
1104 #define tcg_gen_mov_tl tcg_gen_mov_i32
1105 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1106 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1107 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1108 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1109 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1110 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1111 #define tcg_gen_ld_tl tcg_gen_ld_i32
1112 #define tcg_gen_st8_tl tcg_gen_st8_i32
1113 #define tcg_gen_st16_tl tcg_gen_st16_i32
1114 #define tcg_gen_st32_tl tcg_gen_st_i32
1115 #define tcg_gen_st_tl tcg_gen_st_i32
1116 #define tcg_gen_add_tl tcg_gen_add_i32
1117 #define tcg_gen_addi_tl tcg_gen_addi_i32
1118 #define tcg_gen_sub_tl tcg_gen_sub_i32
1119 #define tcg_gen_neg_tl tcg_gen_neg_i32
1120 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
1121 #define tcg_gen_subi_tl tcg_gen_subi_i32
1122 #define tcg_gen_and_tl tcg_gen_and_i32
1123 #define tcg_gen_andi_tl tcg_gen_andi_i32
1124 #define tcg_gen_or_tl tcg_gen_or_i32
1125 #define tcg_gen_ori_tl tcg_gen_ori_i32
1126 #define tcg_gen_xor_tl tcg_gen_xor_i32
1127 #define tcg_gen_xori_tl tcg_gen_xori_i32
1128 #define tcg_gen_not_tl tcg_gen_not_i32
1129 #define tcg_gen_shl_tl tcg_gen_shl_i32
1130 #define tcg_gen_shli_tl tcg_gen_shli_i32
1131 #define tcg_gen_shr_tl tcg_gen_shr_i32
1132 #define tcg_gen_shri_tl tcg_gen_shri_i32
1133 #define tcg_gen_sar_tl tcg_gen_sar_i32
1134 #define tcg_gen_sari_tl tcg_gen_sari_i32
1135 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1136 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1137 #define tcg_gen_setcond_tl tcg_gen_setcond_i32
1138 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1139 #define tcg_gen_mul_tl tcg_gen_mul_i32
1140 #define tcg_gen_muli_tl tcg_gen_muli_i32
1141 #define tcg_gen_div_tl tcg_gen_div_i32
1142 #define tcg_gen_rem_tl tcg_gen_rem_i32
1143 #define tcg_gen_divu_tl tcg_gen_divu_i32
1144 #define tcg_gen_remu_tl tcg_gen_remu_i32
1145 #define tcg_gen_discard_tl tcg_gen_discard_i32
1146 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1147 #define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1148 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1149 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1150 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1151 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1152 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1153 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1154 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1155 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1156 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1157 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1158 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1159 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
1160 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1161 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1162 #define tcg_gen_andc_tl tcg_gen_andc_i32
1163 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
1164 #define tcg_gen_nand_tl tcg_gen_nand_i32
1165 #define tcg_gen_nor_tl tcg_gen_nor_i32
1166 #define tcg_gen_orc_tl tcg_gen_orc_i32
1167 #define tcg_gen_clz_tl tcg_gen_clz_i32
1168 #define tcg_gen_ctz_tl tcg_gen_ctz_i32
1169 #define tcg_gen_clzi_tl tcg_gen_clzi_i32
1170 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
1171 #define tcg_gen_clrsb_tl tcg_gen_clrsb_i32
1172 #define tcg_gen_ctpop_tl tcg_gen_ctpop_i32
1173 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
1174 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
1175 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
1176 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
1177 #define tcg_gen_deposit_tl tcg_gen_deposit_i32
1178 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32
1179 #define tcg_gen_extract_tl tcg_gen_extract_i32
1180 #define tcg_gen_sextract_tl tcg_gen_sextract_i32
1181 #define tcg_const_tl tcg_const_i32
1182 #define tcg_const_local_tl tcg_const_local_i32
1183 #define tcg_gen_movcond_tl tcg_gen_movcond_i32
1184 #define tcg_gen_add2_tl tcg_gen_add2_i32
1185 #define tcg_gen_sub2_tl tcg_gen_sub2_i32
1186 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1187 #define tcg_gen_muls2_tl tcg_gen_muls2_i32
1188 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32
1189 #define tcg_gen_smin_tl tcg_gen_smin_i32
1190 #define tcg_gen_umin_tl tcg_gen_umin_i32
1191 #define tcg_gen_smax_tl tcg_gen_smax_i32
1192 #define tcg_gen_umax_tl tcg_gen_umax_i32
1193 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1194 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1195 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1196 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1197 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1198 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1199 #define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i32
1200 #define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i32
1201 #define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i32
1202 #define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i32
1203 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1204 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1205 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1206 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1207 #define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i32
1208 #define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i32
1209 #define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i32
1210 #define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i32
1211 #define tcg_gen_dup_tl_vec  tcg_gen_dup_i32_vec
1212 #endif
1213
1214 #if UINTPTR_MAX == UINT32_MAX
1215 # define PTR  i32
1216 # define NAT  TCGv_i32
1217 #else
1218 # define PTR  i64
1219 # define NAT  TCGv_i64
1220 #endif
1221
1222 static inline void tcg_gen_ld_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
1223 {
1224     glue(tcg_gen_ld_,PTR)((NAT)r, a, o);
1225 }
1226
1227 static inline void tcg_gen_discard_ptr(TCGv_ptr a)
1228 {
1229     glue(tcg_gen_discard_,PTR)((NAT)a);
1230 }
1231
1232 static inline void tcg_gen_add_ptr(TCGv_ptr r, TCGv_ptr a, TCGv_ptr b)
1233 {
1234     glue(tcg_gen_add_,PTR)((NAT)r, (NAT)a, (NAT)b);
1235 }
1236
1237 static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b)
1238 {
1239     glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b);
1240 }
1241
1242 static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a,
1243                                        intptr_t b, TCGLabel *label)
1244 {
1245     glue(tcg_gen_brcondi_,PTR)(cond, (NAT)a, b, label);
1246 }
1247
1248 static inline void tcg_gen_ext_i32_ptr(TCGv_ptr r, TCGv_i32 a)
1249 {
1250 #if UINTPTR_MAX == UINT32_MAX
1251     tcg_gen_mov_i32((NAT)r, a);
1252 #else
1253     tcg_gen_ext_i32_i64((NAT)r, a);
1254 #endif
1255 }
1256
1257 static inline void tcg_gen_trunc_i64_ptr(TCGv_ptr r, TCGv_i64 a)
1258 {
1259 #if UINTPTR_MAX == UINT32_MAX
1260     tcg_gen_extrl_i64_i32((NAT)r, a);
1261 #else
1262     tcg_gen_mov_i64((NAT)r, a);
1263 #endif
1264 }
1265
1266 static inline void tcg_gen_extu_ptr_i64(TCGv_i64 r, TCGv_ptr a)
1267 {
1268 #if UINTPTR_MAX == UINT32_MAX
1269     tcg_gen_extu_i32_i64(r, (NAT)a);
1270 #else
1271     tcg_gen_mov_i64(r, (NAT)a);
1272 #endif
1273 }
1274
1275 static inline void tcg_gen_trunc_ptr_i32(TCGv_i32 r, TCGv_ptr a)
1276 {
1277 #if UINTPTR_MAX == UINT32_MAX
1278     tcg_gen_mov_i32(r, (NAT)a);
1279 #else
1280     tcg_gen_extrl_i64_i32(r, (NAT)a);
1281 #endif
1282 }
1283
1284 #undef PTR
1285 #undef NAT
1286
1287 #endif /* TCG_TCG_OP_H */