2 * Generic ISA Super I/O
4 * Copyright (c) 2010-2012 Herve Poussineau
5 * Copyright (c) 2011-2012 Andreas Färber
6 * Copyright (c) 2018 Philippe Mathieu-Daudé
8 * This code is licensed under the GNU GPLv2 and later.
9 * See the COPYING file in the top-level directory.
10 * SPDX-License-Identifier: GPL-2.0-or-later
12 #include "qemu/osdep.h"
13 #include "qemu/error-report.h"
14 #include "qapi/error.h"
15 #include "sysemu/sysemu.h"
16 #include "sysemu/blockdev.h"
17 #include "chardev/char.h"
18 #include "hw/isa/superio.h"
19 #include "hw/input/i8042.h"
20 #include "hw/char/serial.h"
23 static void isa_superio_realize(DeviceState
*dev
, Error
**errp
)
25 ISASuperIODevice
*sio
= ISA_SUPERIO(dev
);
26 ISASuperIOClass
*k
= ISA_SUPERIO_GET_CLASS(sio
);
27 ISABus
*bus
= isa_bus_from_device(ISA_DEVICE(dev
));
36 for (i
= 0; i
< k
->parallel
.count
; i
++) {
37 if (i
>= ARRAY_SIZE(sio
->parallel
)) {
38 warn_report("superio: ignoring %td parallel controllers",
39 k
->parallel
.count
- ARRAY_SIZE(sio
->parallel
));
42 if (!k
->parallel
.is_enabled
|| k
->parallel
.is_enabled(sio
, i
)) {
43 /* FIXME use a qdev chardev prop instead of parallel_hds[] */
44 chr
= parallel_hds
[i
];
46 name
= g_strdup_printf("discarding-parallel%d", i
);
47 chr
= qemu_chr_new(name
, "null");
49 name
= g_strdup_printf("parallel%d", i
);
51 isa
= isa_create(bus
, "isa-parallel");
53 qdev_prop_set_uint32(d
, "index", i
);
54 if (k
->parallel
.get_iobase
) {
55 qdev_prop_set_uint32(d
, "iobase",
56 k
->parallel
.get_iobase(sio
, i
));
58 if (k
->parallel
.get_irq
) {
59 qdev_prop_set_uint32(d
, "irq", k
->parallel
.get_irq(sio
, i
));
61 qdev_prop_set_chr(d
, "chardev", chr
);
63 sio
->parallel
[i
] = isa
;
64 trace_superio_create_parallel(i
,
65 k
->parallel
.get_iobase
?
66 k
->parallel
.get_iobase(sio
, i
) : -1,
68 k
->parallel
.get_irq(sio
, i
) : -1);
69 object_property_add_child(OBJECT(dev
), name
,
70 OBJECT(sio
->parallel
[i
]), NULL
);
76 for (i
= 0; i
< k
->serial
.count
; i
++) {
77 if (i
>= ARRAY_SIZE(sio
->serial
)) {
78 warn_report("superio: ignoring %td serial controllers",
79 k
->serial
.count
- ARRAY_SIZE(sio
->serial
));
82 if (!k
->serial
.is_enabled
|| k
->serial
.is_enabled(sio
, i
)) {
83 /* FIXME use a qdev chardev prop instead of serial_hd() */
86 name
= g_strdup_printf("discarding-serial%d", i
);
87 chr
= qemu_chr_new(name
, "null");
89 name
= g_strdup_printf("serial%d", i
);
91 isa
= isa_create(bus
, TYPE_ISA_SERIAL
);
93 qdev_prop_set_uint32(d
, "index", i
);
94 if (k
->serial
.get_iobase
) {
95 qdev_prop_set_uint32(d
, "iobase",
96 k
->serial
.get_iobase(sio
, i
));
98 if (k
->serial
.get_irq
) {
99 qdev_prop_set_uint32(d
, "irq", k
->serial
.get_irq(sio
, i
));
101 qdev_prop_set_chr(d
, "chardev", chr
);
103 sio
->serial
[i
] = isa
;
104 trace_superio_create_serial(i
,
105 k
->serial
.get_iobase
?
106 k
->serial
.get_iobase(sio
, i
) : -1,
108 k
->serial
.get_irq(sio
, i
) : -1);
109 object_property_add_child(OBJECT(dev
), name
,
110 OBJECT(sio
->serial
[0]), NULL
);
116 if (!k
->floppy
.is_enabled
|| k
->floppy
.is_enabled(sio
, 0)) {
117 isa
= isa_create(bus
, "isa-fdc");
119 if (k
->floppy
.get_iobase
) {
120 qdev_prop_set_uint32(d
, "iobase", k
->floppy
.get_iobase(sio
, 0));
122 if (k
->floppy
.get_irq
) {
123 qdev_prop_set_uint32(d
, "irq", k
->floppy
.get_irq(sio
, 0));
125 /* FIXME use a qdev drive property instead of drive_get() */
126 drive
= drive_get(IF_FLOPPY
, 0, 0);
128 qdev_prop_set_drive(d
, "driveA", blk_by_legacy_dinfo(drive
),
131 /* FIXME use a qdev drive property instead of drive_get() */
132 drive
= drive_get(IF_FLOPPY
, 0, 1);
134 qdev_prop_set_drive(d
, "driveB", blk_by_legacy_dinfo(drive
),
139 trace_superio_create_floppy(0,
140 k
->floppy
.get_iobase
?
141 k
->floppy
.get_iobase(sio
, 0) : -1,
143 k
->floppy
.get_irq(sio
, 0) : -1);
146 /* Keyboard, mouse */
147 sio
->kbc
= isa_create_simple(bus
, TYPE_I8042
);
150 if (k
->ide
.count
&& (!k
->ide
.is_enabled
|| k
->ide
.is_enabled(sio
, 0))) {
151 isa
= isa_create(bus
, "isa-ide");
153 if (k
->ide
.get_iobase
) {
154 qdev_prop_set_uint32(d
, "iobase", k
->ide
.get_iobase(sio
, 0));
156 if (k
->ide
.get_iobase
) {
157 qdev_prop_set_uint32(d
, "iobase2", k
->ide
.get_iobase(sio
, 1));
159 if (k
->ide
.get_irq
) {
160 qdev_prop_set_uint32(d
, "irq", k
->ide
.get_irq(sio
, 0));
164 trace_superio_create_ide(0,
166 k
->ide
.get_iobase(sio
, 0) : -1,
168 k
->ide
.get_irq(sio
, 0) : -1);
172 static void isa_superio_class_init(ObjectClass
*oc
, void *data
)
174 DeviceClass
*dc
= DEVICE_CLASS(oc
);
176 dc
->realize
= isa_superio_realize
;
177 /* Reason: Uses parallel_hds[0] in realize(), so it can't be used twice */
178 dc
->user_creatable
= false;
181 static const TypeInfo isa_superio_type_info
= {
182 .name
= TYPE_ISA_SUPERIO
,
183 .parent
= TYPE_ISA_DEVICE
,
185 .class_size
= sizeof(ISASuperIOClass
),
186 .class_init
= isa_superio_class_init
,
189 /* SMS FDC37M817 Super I/O */
190 static void fdc37m81x_class_init(ObjectClass
*klass
, void *data
)
192 ISASuperIOClass
*sc
= ISA_SUPERIO_CLASS(klass
);
194 sc
->serial
.count
= 2; /* NS16C550A */
195 sc
->parallel
.count
= 1;
196 sc
->floppy
.count
= 1; /* SMSC 82077AA Compatible */
200 static const TypeInfo fdc37m81x_type_info
= {
201 .name
= TYPE_FDC37M81X_SUPERIO
,
202 .parent
= TYPE_ISA_SUPERIO
,
203 .instance_size
= sizeof(ISASuperIODevice
),
204 .class_init
= fdc37m81x_class_init
,
207 static void isa_superio_register_types(void)
209 type_register_static(&isa_superio_type_info
);
210 type_register_static(&fdc37m81x_type_info
);
213 type_init(isa_superio_register_types
)