2 * QEMU USB EHCI Emulation
4 * This library is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU Lesser General Public
6 * License as published by the Free Software Foundation; either
7 * version 2 of the License, or(at your option) any later version.
9 * This library is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * Lesser General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 #define HW_USB_EHCI_H 1
21 #include "qemu/timer.h"
23 #include "monitor/monitor.h"
25 #include "sysemu/dma.h"
26 #include "sysemu/sysemu.h"
27 #include "hw/pci/pci.h"
28 #include "hw/sysbus.h"
35 #define DPRINTF printf
40 #define MMIO_SIZE 0x1000
41 #define CAPA_SIZE 0x10
44 #define PORTSC_BEGIN PORTSC
45 #define PORTSC_END (PORTSC + 4 * NB_PORTS)
47 #define NB_PORTS 6 /* Number of downstream ports */
49 typedef struct EHCIPacket EHCIPacket
;
50 typedef struct EHCIQueue EHCIQueue
;
51 typedef struct EHCIState EHCIState
;
53 /* EHCI spec version 1.0 Section 3.3
55 typedef struct EHCIitd
{
59 #define ITD_XACT_ACTIVE (1 << 31)
60 #define ITD_XACT_DBERROR (1 << 30)
61 #define ITD_XACT_BABBLE (1 << 29)
62 #define ITD_XACT_XACTERR (1 << 28)
63 #define ITD_XACT_LENGTH_MASK 0x0fff0000
64 #define ITD_XACT_LENGTH_SH 16
65 #define ITD_XACT_IOC (1 << 15)
66 #define ITD_XACT_PGSEL_MASK 0x00007000
67 #define ITD_XACT_PGSEL_SH 12
68 #define ITD_XACT_OFFSET_MASK 0x00000fff
71 #define ITD_BUFPTR_MASK 0xfffff000
72 #define ITD_BUFPTR_SH 12
73 #define ITD_BUFPTR_EP_MASK 0x00000f00
74 #define ITD_BUFPTR_EP_SH 8
75 #define ITD_BUFPTR_DEVADDR_MASK 0x0000007f
76 #define ITD_BUFPTR_DEVADDR_SH 0
77 #define ITD_BUFPTR_DIRECTION (1 << 11)
78 #define ITD_BUFPTR_MAXPKT_MASK 0x000007ff
79 #define ITD_BUFPTR_MAXPKT_SH 0
80 #define ITD_BUFPTR_MULT_MASK 0x00000003
81 #define ITD_BUFPTR_MULT_SH 0
84 /* EHCI spec version 1.0 Section 3.4
86 typedef struct EHCIsitd
{
87 uint32_t next
; /* Standard next link pointer */
89 #define SITD_EPCHAR_IO (1 << 31)
90 #define SITD_EPCHAR_PORTNUM_MASK 0x7f000000
91 #define SITD_EPCHAR_PORTNUM_SH 24
92 #define SITD_EPCHAR_HUBADD_MASK 0x007f0000
93 #define SITD_EPCHAR_HUBADDR_SH 16
94 #define SITD_EPCHAR_EPNUM_MASK 0x00000f00
95 #define SITD_EPCHAR_EPNUM_SH 8
96 #define SITD_EPCHAR_DEVADDR_MASK 0x0000007f
99 #define SITD_UFRAME_CMASK_MASK 0x0000ff00
100 #define SITD_UFRAME_CMASK_SH 8
101 #define SITD_UFRAME_SMASK_MASK 0x000000ff
104 #define SITD_RESULTS_IOC (1 << 31)
105 #define SITD_RESULTS_PGSEL (1 << 30)
106 #define SITD_RESULTS_TBYTES_MASK 0x03ff0000
107 #define SITD_RESULTS_TYBYTES_SH 16
108 #define SITD_RESULTS_CPROGMASK_MASK 0x0000ff00
109 #define SITD_RESULTS_CPROGMASK_SH 8
110 #define SITD_RESULTS_ACTIVE (1 << 7)
111 #define SITD_RESULTS_ERR (1 << 6)
112 #define SITD_RESULTS_DBERR (1 << 5)
113 #define SITD_RESULTS_BABBLE (1 << 4)
114 #define SITD_RESULTS_XACTERR (1 << 3)
115 #define SITD_RESULTS_MISSEDUF (1 << 2)
116 #define SITD_RESULTS_SPLITXSTATE (1 << 1)
119 #define SITD_BUFPTR_MASK 0xfffff000
120 #define SITD_BUFPTR_CURROFF_MASK 0x00000fff
121 #define SITD_BUFPTR_TPOS_MASK 0x00000018
122 #define SITD_BUFPTR_TPOS_SH 3
123 #define SITD_BUFPTR_TCNT_MASK 0x00000007
125 uint32_t backptr
; /* Standard next link pointer */
128 /* EHCI spec version 1.0 Section 3.5
130 typedef struct EHCIqtd
{
131 uint32_t next
; /* Standard next link pointer */
132 uint32_t altnext
; /* Standard next link pointer */
134 #define QTD_TOKEN_DTOGGLE (1 << 31)
135 #define QTD_TOKEN_TBYTES_MASK 0x7fff0000
136 #define QTD_TOKEN_TBYTES_SH 16
137 #define QTD_TOKEN_IOC (1 << 15)
138 #define QTD_TOKEN_CPAGE_MASK 0x00007000
139 #define QTD_TOKEN_CPAGE_SH 12
140 #define QTD_TOKEN_CERR_MASK 0x00000c00
141 #define QTD_TOKEN_CERR_SH 10
142 #define QTD_TOKEN_PID_MASK 0x00000300
143 #define QTD_TOKEN_PID_SH 8
144 #define QTD_TOKEN_ACTIVE (1 << 7)
145 #define QTD_TOKEN_HALT (1 << 6)
146 #define QTD_TOKEN_DBERR (1 << 5)
147 #define QTD_TOKEN_BABBLE (1 << 4)
148 #define QTD_TOKEN_XACTERR (1 << 3)
149 #define QTD_TOKEN_MISSEDUF (1 << 2)
150 #define QTD_TOKEN_SPLITXSTATE (1 << 1)
151 #define QTD_TOKEN_PING (1 << 0)
153 uint32_t bufptr
[5]; /* Standard buffer pointer */
154 #define QTD_BUFPTR_MASK 0xfffff000
155 #define QTD_BUFPTR_SH 12
158 /* EHCI spec version 1.0 Section 3.6
160 typedef struct EHCIqh
{
161 uint32_t next
; /* Standard next link pointer */
163 /* endpoint characteristics */
165 #define QH_EPCHAR_RL_MASK 0xf0000000
166 #define QH_EPCHAR_RL_SH 28
167 #define QH_EPCHAR_C (1 << 27)
168 #define QH_EPCHAR_MPLEN_MASK 0x07FF0000
169 #define QH_EPCHAR_MPLEN_SH 16
170 #define QH_EPCHAR_H (1 << 15)
171 #define QH_EPCHAR_DTC (1 << 14)
172 #define QH_EPCHAR_EPS_MASK 0x00003000
173 #define QH_EPCHAR_EPS_SH 12
174 #define EHCI_QH_EPS_FULL 0
175 #define EHCI_QH_EPS_LOW 1
176 #define EHCI_QH_EPS_HIGH 2
177 #define EHCI_QH_EPS_RESERVED 3
179 #define QH_EPCHAR_EP_MASK 0x00000f00
180 #define QH_EPCHAR_EP_SH 8
181 #define QH_EPCHAR_I (1 << 7)
182 #define QH_EPCHAR_DEVADDR_MASK 0x0000007f
183 #define QH_EPCHAR_DEVADDR_SH 0
185 /* endpoint capabilities */
187 #define QH_EPCAP_MULT_MASK 0xc0000000
188 #define QH_EPCAP_MULT_SH 30
189 #define QH_EPCAP_PORTNUM_MASK 0x3f800000
190 #define QH_EPCAP_PORTNUM_SH 23
191 #define QH_EPCAP_HUBADDR_MASK 0x007f0000
192 #define QH_EPCAP_HUBADDR_SH 16
193 #define QH_EPCAP_CMASK_MASK 0x0000ff00
194 #define QH_EPCAP_CMASK_SH 8
195 #define QH_EPCAP_SMASK_MASK 0x000000ff
196 #define QH_EPCAP_SMASK_SH 0
198 uint32_t current_qtd
; /* Standard next link pointer */
199 uint32_t next_qtd
; /* Standard next link pointer */
200 uint32_t altnext_qtd
;
201 #define QH_ALTNEXT_NAKCNT_MASK 0x0000001e
202 #define QH_ALTNEXT_NAKCNT_SH 1
204 uint32_t token
; /* Same as QTD token */
205 uint32_t bufptr
[5]; /* Standard buffer pointer */
206 #define BUFPTR_CPROGMASK_MASK 0x000000ff
207 #define BUFPTR_FRAMETAG_MASK 0x0000001f
208 #define BUFPTR_SBYTES_MASK 0x00000fe0
209 #define BUFPTR_SBYTES_SH 5
212 /* EHCI spec version 1.0 Section 3.7
214 typedef struct EHCIfstn
{
215 uint32_t next
; /* Standard next link pointer */
216 uint32_t backptr
; /* Standard next link pointer */
221 EHCI_ASYNC_INITIALIZED
,
228 QTAILQ_ENTRY(EHCIPacket
) next
;
230 EHCIqtd qtd
; /* copy of current QTD (being worked on) */
231 uint32_t qtdaddr
; /* address QTD read from */
236 enum async_state async
;
241 QTAILQ_ENTRY(EHCIQueue
) next
;
247 /* cached data from guest - needs to be flushed
248 * when guest removes an entry (doorbell, handshake sequence)
250 EHCIqh qh
; /* copy of current QH (being worked on) */
251 uint32_t qhaddr
; /* address QH read from */
252 uint32_t qtdaddr
; /* address QTD read from */
253 int last_pid
; /* pid of last packet executed */
255 QTAILQ_HEAD(pkts_head
, EHCIPacket
) packets
;
258 typedef QTAILQ_HEAD(EHCIQueueHead
, EHCIQueue
) EHCIQueueHead
;
265 MemoryRegion mem_caps
;
266 MemoryRegion mem_opreg
;
267 MemoryRegion mem_ports
;
276 * EHCI spec version 1.0 Section 2.3
277 * Host Controller Operational Registers
279 uint8_t caps
[CAPA_SIZE
];
281 uint32_t opreg
[PORTSC_BEGIN
/sizeof(uint32_t)];
287 uint32_t ctrldssegment
;
288 uint32_t periodiclistbase
;
289 uint32_t asynclistaddr
;
294 uint32_t portsc
[NB_PORTS
];
297 * Internal states, shadow registers, etc
299 QEMUTimer
*frame_timer
;
301 uint32_t astate
; /* Current state in asynchronous schedule */
302 uint32_t pstate
; /* Current state in periodic schedule */
303 USBPort ports
[NB_PORTS
];
304 USBPort
*companion_ports
[NB_PORTS
];
305 uint32_t usbsts_pending
;
306 uint32_t usbsts_frindex
;
307 EHCIQueueHead aqueues
;
308 EHCIQueueHead pqueues
;
310 /* which address to look at next */
311 uint32_t a_fetch_addr
;
312 uint32_t p_fetch_addr
;
317 uint64_t last_run_ns
;
318 uint32_t async_stepdown
;
319 uint32_t periodic_sched_active
;
320 bool int_req_by_async
;
323 extern const VMStateDescription vmstate_ehci
;
325 void usb_ehci_init(EHCIState
*s
, DeviceState
*dev
);
326 void usb_ehci_realize(EHCIState
*s
, DeviceState
*dev
, Error
**errp
);
328 #define TYPE_PCI_EHCI "pci-ehci-usb"
329 #define PCI_EHCI(obj) OBJECT_CHECK(EHCIPCIState, (obj), TYPE_PCI_EHCI)
331 typedef struct EHCIPCIState
{
340 #define TYPE_SYS_BUS_EHCI "sysbus-ehci-usb"
341 #define TYPE_EXYNOS4210_EHCI "exynos4210-ehci-usb"
343 #define SYS_BUS_EHCI(obj) \
344 OBJECT_CHECK(EHCISysBusState, (obj), TYPE_SYS_BUS_EHCI)
345 #define SYS_BUS_EHCI_CLASS(class) \
346 OBJECT_CLASS_CHECK(SysBusEHCIClass, (class), TYPE_SYS_BUS_EHCI)
347 #define SYS_BUS_EHCI_GET_CLASS(obj) \
348 OBJECT_GET_CLASS(SysBusEHCIClass, (obj), TYPE_SYS_BUS_EHCI)
350 typedef struct EHCISysBusState
{
352 SysBusDevice parent_obj
;
358 typedef struct SysBusEHCIClass
{
360 SysBusDeviceClass parent_class
;