target/arm: Implement SVE2 integer multiply long (indexed)
[qemu/ar7.git] / tcg / sparc / tcg-target-con-str.h
blobfdb25d9313660efc4a84fafd859f1cfcbbf88463
1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Define Sparc target-specific operand constraints.
4 * Copyright (c) 2021 Linaro
5 */
7 /*
8 * Define constraint letters for register sets:
9 * REGS(letter, register_mask)
11 REGS('r', ALL_GENERAL_REGS)
12 REGS('R', ALL_GENERAL_REGS64)
13 REGS('s', ALL_QLDST_REGS)
14 REGS('S', ALL_QLDST_REGS64)
15 REGS('A', TARGET_LONG_BITS == 64 ? ALL_QLDST_REGS64 : ALL_QLDST_REGS)
18 * Define constraint letters for constants:
19 * CONST(letter, TCG_CT_CONST_* bit set)
21 CONST('I', TCG_CT_CONST_S11)
22 CONST('J', TCG_CT_CONST_S13)
23 CONST('Z', TCG_CT_CONST_ZERO)