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[qemu/ar7.git] / hw / cpu / icc_bus.c
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1 /* icc_bus.c
2 * emulate x86 ICC (Interrupt Controller Communications) bus
4 * Copyright (c) 2013 Red Hat, Inc
6 * Authors:
7 * Igor Mammedov <imammedo@redhat.com>
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2 of the License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, see <http://www.gnu.org/licenses/>
22 #include "hw/cpu/icc_bus.h"
23 #include "hw/sysbus.h"
25 /* icc-bridge implementation */
27 static void icc_bus_init(Object *obj)
29 BusState *b = BUS(obj);
31 b->allow_hotplug = true;
34 static const TypeInfo icc_bus_info = {
35 .name = TYPE_ICC_BUS,
36 .parent = TYPE_BUS,
37 .instance_size = sizeof(ICCBus),
38 .instance_init = icc_bus_init,
42 /* icc-device implementation */
44 static void icc_device_realize(DeviceState *dev, Error **errp)
46 ICCDeviceClass *idc = ICC_DEVICE_GET_CLASS(dev);
48 /* convert to QOM */
49 if (idc->realize) {
50 idc->realize(dev, errp);
55 static void icc_device_class_init(ObjectClass *oc, void *data)
57 DeviceClass *dc = DEVICE_CLASS(oc);
59 dc->realize = icc_device_realize;
60 dc->bus_type = TYPE_ICC_BUS;
63 static const TypeInfo icc_device_info = {
64 .name = TYPE_ICC_DEVICE,
65 .parent = TYPE_DEVICE,
66 .abstract = true,
67 .instance_size = sizeof(ICCDevice),
68 .class_size = sizeof(ICCDeviceClass),
69 .class_init = icc_device_class_init,
73 /* icc-bridge implementation */
75 typedef struct ICCBridgeState {
76 /*< private >*/
77 SysBusDevice parent_obj;
78 /*< public >*/
80 ICCBus icc_bus;
81 MemoryRegion apic_container;
82 } ICCBridgeState;
84 #define ICC_BRIGDE(obj) OBJECT_CHECK(ICCBridgeState, (obj), TYPE_ICC_BRIDGE)
86 static void icc_bridge_init(Object *obj)
88 ICCBridgeState *s = ICC_BRIGDE(obj);
89 SysBusDevice *sb = SYS_BUS_DEVICE(obj);
91 qbus_create_inplace(&s->icc_bus, sizeof(s->icc_bus), TYPE_ICC_BUS,
92 DEVICE(s), "icc");
94 /* Do not change order of registering regions,
95 * APIC must be first registered region, board maps it by 0 index
97 memory_region_init(&s->apic_container, obj, "icc-apic-container",
98 APIC_SPACE_SIZE);
99 sysbus_init_mmio(sb, &s->apic_container);
100 s->icc_bus.apic_address_space = &s->apic_container;
103 static void icc_bridge_class_init(ObjectClass *oc, void *data)
105 DeviceClass *dc = DEVICE_CLASS(oc);
107 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
110 static const TypeInfo icc_bridge_info = {
111 .name = TYPE_ICC_BRIDGE,
112 .parent = TYPE_SYS_BUS_DEVICE,
113 .instance_init = icc_bridge_init,
114 .instance_size = sizeof(ICCBridgeState),
115 .class_init = icc_bridge_class_init,
119 static void icc_bus_register_types(void)
121 type_register_static(&icc_bus_info);
122 type_register_static(&icc_device_info);
123 type_register_static(&icc_bridge_info);
126 type_init(icc_bus_register_types)