hw/mips/mips_r4k.c

   1 /*
   2  * QEMU/MIPS pseudo-board
   3  *
   4  * emulates a simple machine with ISA-like bus.
   5  * ISA IO space mapped to the 0x14000000 (PHYS) and
   6  * ISA memory at the 0x10000000 (PHYS, 16Mb in size).
   7  * All peripherial devices are attached to this "bus" with
   8  * the standard PC ISA addresses.
   9  */
  10
  11 #include "qemu/osdep.h"
  12 #include "qemu/units.h"
  13 #include "qapi/error.h"
  14 #include "qemu-common.h"
  15 #include "cpu.h"
  16 #include "hw/mips/mips.h"
  17 #include "hw/mips/cpudevs.h"
  18 #include "hw/i386/pc.h"
  19 #include "hw/char/serial.h"
  20 #include "hw/isa/isa.h"
  21 #include "net/net.h"
  22 #include "hw/net/ne2000-isa.h"
  23 #include "sysemu/sysemu.h"
  24 #include "hw/boards.h"
  25 #include "hw/block/flash.h"
  26 #include "qemu/log.h"
  27 #include "hw/mips/bios.h"
  28 #include "hw/ide.h"
  29 #include "hw/loader.h"
  30 #include "elf.h"
  31 #include "hw/rtc/mc146818rtc.h"
  32 #include "hw/input/i8042.h"
  33 #include "hw/timer/i8254.h"
  34 #include "exec/address-spaces.h"
  35 #include "sysemu/qtest.h"
  36 #include "sysemu/reset.h"
  37 #include "sysemu/runstate.h"
  38 #include "qemu/error-report.h"
  39
  40 #define MAX_IDE_BUS 2
  41
  42 static const int ide_iobase[2] = { 0x1f0, 0x170 };
  43 static const int ide_iobase2[2] = { 0x3f6, 0x376 };
  44 static const int ide_irq[2] = { 14, 15 };
  45
  46 static ISADevice *pit; /* PIT i8254 */
  47
  48 /* i8254 PIT is attached to the IRQ0 at PIC i8259 */
  49
  50 static struct _loaderparams {
  51     int ram_size;
  52     const char *kernel_filename;
  53     const char *kernel_cmdline;
  54     const char *initrd_filename;
  55 } loaderparams;
  56
  57 static void mips_qemu_write(void *opaque, hwaddr addr,
  58                             uint64_t val, unsigned size)
  59 {
  60     if ((addr & 0xffff) == 0 && val == 42) {
  61         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
  62     } else if ((addr & 0xffff) == 4 && val == 42) {
  63         qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
  64     }
  65 }
  66
  67 static uint64_t mips_qemu_read(void *opaque, hwaddr addr,
  68                                unsigned size)
  69 {
  70     return 0;
  71 }
  72
  73 static const MemoryRegionOps mips_qemu_ops = {
  74     .read = mips_qemu_read,
  75     .write = mips_qemu_write,
  76     .endianness = DEVICE_NATIVE_ENDIAN,
  77 };
  78
  79 typedef struct ResetData {
  80     MIPSCPU *cpu;
  81     uint64_t vector;
  82 } ResetData;
  83
  84 static int64_t load_kernel(void)
  85 {
  86     const size_t params_size = 264;
  87     int64_t entry, kernel_high, initrd_size;
  88     long kernel_size;
  89     ram_addr_t initrd_offset;
  90     uint32_t *params_buf;
  91     int big_endian;
  92
  93 #ifdef TARGET_WORDS_BIGENDIAN
  94     big_endian = 1;
  95 #else
  96     big_endian = 0;
  97 #endif
  98     kernel_size = load_elf(loaderparams.kernel_filename, NULL,
  99                            cpu_mips_kseg0_to_phys, NULL,
 100                            (uint64_t *)&entry, NULL,
 101                            (uint64_t *)&kernel_high, big_endian,
 102                            EM_MIPS, 1, 0);
 103     if (kernel_size >= 0) {
 104         if ((entry & ~0x7fffffffULL) == 0x80000000) {
 105             entry = (int32_t)entry;
 106         }
 107     } else {
 108         error_report("could not load kernel '%s': %s",
 109                      loaderparams.kernel_filename,
 110                      load_elf_strerror(kernel_size));
 111         exit(1);
 112     }
 113
 114     /* load initrd */
 115     initrd_size = 0;
 116     initrd_offset = 0;
 117     if (loaderparams.initrd_filename) {
 118         initrd_size = get_image_size(loaderparams.initrd_filename);
 119         if (initrd_size > 0) {
 120             initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) &
 121                              INITRD_PAGE_MASK;
 122             if (initrd_offset + initrd_size > ram_size) {
 123                 error_report("memory too small for initial ram disk '%s'",
 124                              loaderparams.initrd_filename);
 125                 exit(1);
 126             }
 127             initrd_size = load_image_targphys(loaderparams.initrd_filename,
 128                                               initrd_offset,
 129                                               ram_size - initrd_offset);
 130         }
 131         if (initrd_size == (target_ulong) -1) {
 132             error_report("could not load initial ram disk '%s'",
 133                          loaderparams.initrd_filename);
 134             exit(1);
 135         }
 136     }
 137
 138     /* Store command line.  */
 139     params_buf = g_malloc(params_size);
 140
 141     params_buf[0] = tswap32(ram_size);
 142     params_buf[1] = tswap32(0x12345678);
 143
 144     if (initrd_size > 0) {
 145         snprintf((char *)params_buf + 8, 256,
 146                  "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
 147                  cpu_mips_phys_to_kseg0(NULL, initrd_offset),
 148                  initrd_size, loaderparams.kernel_cmdline);
 149     } else {
 150         snprintf((char *)params_buf + 8, 256,
 151         "%s", loaderparams.kernel_cmdline);
 152     }
 153
 154     rom_add_blob_fixed("params", params_buf, params_size,
 155                        16 * MiB - params_size);
 156
 157     g_free(params_buf);
 158     return entry;
 159 }
 160
 161 static void main_cpu_reset(void *opaque)
 162 {
 163     ResetData *s = (ResetData *)opaque;
 164     CPUMIPSState *env = &s->cpu->env;
 165
 166     cpu_reset(CPU(s->cpu));
 167     env->active_tc.PC = s->vector;
 168 }
 169
 170 static const int sector_len = 32 * KiB;
 171 static
 172 void mips_r4k_init(MachineState *machine)
 173 {
 174     ram_addr_t ram_size = machine->ram_size;
 175     const char *kernel_filename = machine->kernel_filename;
 176     const char *kernel_cmdline = machine->kernel_cmdline;
 177     const char *initrd_filename = machine->initrd_filename;
 178     char *filename;
 179     MemoryRegion *address_space_mem = get_system_memory();
 180     MemoryRegion *ram = g_new(MemoryRegion, 1);
 181     MemoryRegion *bios;
 182     MemoryRegion *iomem = g_new(MemoryRegion, 1);
 183     MemoryRegion *isa_io = g_new(MemoryRegion, 1);
 184     MemoryRegion *isa_mem = g_new(MemoryRegion, 1);
 185     int bios_size;
 186     MIPSCPU *cpu;
 187     CPUMIPSState *env;
 188     ResetData *reset_info;
 189     int i;
 190     qemu_irq *i8259;
 191     ISABus *isa_bus;
 192     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
 193     DriveInfo *dinfo;
 194     int be;
 195
 196     /* init CPUs */
 197     cpu = MIPS_CPU(cpu_create(machine->cpu_type));
 198     env = &cpu->env;
 199
 200     reset_info = g_malloc0(sizeof(ResetData));
 201     reset_info->cpu = cpu;
 202     reset_info->vector = env->active_tc.PC;
 203     qemu_register_reset(main_cpu_reset, reset_info);
 204
 205     /* allocate RAM */
 206     if (ram_size > 256 * MiB) {
 207         error_report("Too much memory for this machine: %" PRId64 "MB,"
 208                      " maximum 256MB", ram_size / MiB);
 209         exit(1);
 210     }
 211     memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size);
 212
 213     memory_region_add_subregion(address_space_mem, 0, ram);
 214
 215     memory_region_init_io(iomem, NULL, &mips_qemu_ops,
 216                           NULL, "mips-qemu", 0x10000);
 217
 218     memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem);
 219
 220     /*
 221      * Try to load a BIOS image. If this fails, we continue regardless,
 222      * but initialize the hardware ourselves. When a kernel gets
 223      * preloaded we also initialize the hardware, since the BIOS wasn't
 224      * run.
 225      */
 226
 227     if (bios_name == NULL) {
 228         bios_name = BIOS_FILENAME;
 229     }
 230     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 231     if (filename) {
 232         bios_size = get_image_size(filename);
 233     } else {
 234         bios_size = -1;
 235     }
 236 #ifdef TARGET_WORDS_BIGENDIAN
 237     be = 1;
 238 #else
 239     be = 0;
 240 #endif
 241     dinfo = drive_get(IF_PFLASH, 0, 0);
 242     if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) {
 243         bios = g_new(MemoryRegion, 1);
 244         memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE,
 245                                &error_fatal);
 246         memory_region_set_readonly(bios, true);
 247         memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios);
 248
 249         load_image_targphys(filename, 0x1fc00000, BIOS_SIZE);
 250     } else if (dinfo != NULL) {
 251         uint32_t mips_rom = 0x00400000;
 252         if (!pflash_cfi01_register(0x1fc00000, "mips_r4k.bios", mips_rom,
 253                                    blk_by_legacy_dinfo(dinfo),
 254                                    sector_len, 4, 0, 0, 0, 0, be)) {
 255             fprintf(stderr, "qemu: Error registering flash memory.\n");
 256         }
 257     } else if (!qtest_enabled()) {
 258         /* not fatal */
 259         warn_report("could not load MIPS bios '%s'", bios_name);
 260     }
 261     g_free(filename);
 262
 263     if (kernel_filename) {
 264         loaderparams.ram_size = ram_size;
 265         loaderparams.kernel_filename = kernel_filename;
 266         loaderparams.kernel_cmdline = kernel_cmdline;
 267         loaderparams.initrd_filename = initrd_filename;
 268         reset_info->vector = load_kernel();
 269     }
 270
 271     /* Init CPU internal devices */
 272     cpu_mips_irq_init_cpu(cpu);
 273     cpu_mips_clock_init(cpu);
 274
 275     /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */
 276     memory_region_init_alias(isa_io, NULL, "isa-io",
 277                              get_system_io(), 0, 0x00010000);
 278     memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000);
 279     memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io);
 280     memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem);
 281     isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort);
 282
 283     /* The PIC is attached to the MIPS CPU INT0 pin */
 284     i8259 = i8259_init(isa_bus, env->irq[2]);
 285     isa_bus_irqs(isa_bus, i8259);
 286
 287     mc146818_rtc_init(isa_bus, 2000, NULL);
 288
 289     pit = i8254_pit_init(isa_bus, 0x40, 0, NULL);
 290
 291     serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS);
 292
 293     isa_vga_init(isa_bus);
 294
 295     if (nd_table[0].used) {
 296         isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]);
 297     }
 298
 299     ide_drive_get(hd, ARRAY_SIZE(hd));
 300     for (i = 0; i < MAX_IDE_BUS; i++)
 301         isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i],
 302                      hd[MAX_IDE_DEVS * i],
 303                      hd[MAX_IDE_DEVS * i + 1]);
 304
 305     isa_create_simple(isa_bus, TYPE_I8042);
 306 }
 307
 308 static void mips_machine_init(MachineClass *mc)
 309 {
 310     mc->deprecation_reason = "use malta machine type instead";
 311     mc->desc = "mips r4k platform";
 312     mc->init = mips_r4k_init;
 313     mc->block_default_type = IF_IDE;
 314 #ifdef TARGET_MIPS64
 315     mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000");
 316 #else
 317     mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf");
 318 #endif
 319
 320 }
 321
 322 DEFINE_MACHINE("mips", mips_machine_init)