exec/memory: Use struct Object typedef
[qemu/ar7.git] / hw / intc / heathrow_pic.c
blobcb97c315dac5742ee7be01ff83681981fc2ce0d4
1 /*
2  * Heathrow PIC support (OldWorld PowerMac)
3  *
4  * Copyright (c) 2005-2007 Fabrice Bellard
5  * Copyright (c) 2007 Jocelyn Mayer
6  *
7  * Permission is hereby granted, free of charge, to any person obtaining a copy
8  * of this software and associated documentation files (the "Software"), to deal
9  * in the Software without restriction, including without limitation the rights
10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11  * copies of the Software, and to permit persons to whom the Software is
12  * furnished to do so, subject to the following conditions:
13  *
14  * The above copyright notice and this permission notice shall be included in
15  * all copies or substantial portions of the Software.
16  *
17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23  * THE SOFTWARE.
24  */
26 #include "qemu/osdep.h"
27 #include "hw/ppc/mac.h"
28 #include "migration/vmstate.h"
29 #include "qemu/module.h"
30 #include "hw/intc/heathrow_pic.h"
31 #include "hw/irq.h"
32 #include "trace.h"
34 static inline int heathrow_check_irq(HeathrowPICState *pic)
36     return (pic->events | (pic->levels & pic->level_triggered)) & pic->mask;
39 /* update the CPU irq state */
40 static void heathrow_update_irq(HeathrowState *s)
42     if (heathrow_check_irq(&s->pics[0]) ||
43             heathrow_check_irq(&s->pics[1])) {
44         qemu_irq_raise(s->irqs[0]);
45     } else {
46         qemu_irq_lower(s->irqs[0]);
47     }
50 static void heathrow_write(void *opaque, hwaddr addr,
51                            uint64_t value, unsigned size)
53     HeathrowState *s = opaque;
54     HeathrowPICState *pic;
55     unsigned int n;
57     n = ((addr & 0xfff) - 0x10) >> 4;
58     trace_heathrow_write(addr, n, value);
59     if (n >= 2)
60         return;
61     pic = &s->pics[n];
62     switch(addr & 0xf) {
63     case 0x04:
64         pic->mask = value;
65         heathrow_update_irq(s);
66         break;
67     case 0x08:
68         /* do not reset level triggered IRQs */
69         value &= ~pic->level_triggered;
70         pic->events &= ~value;
71         heathrow_update_irq(s);
72         break;
73     default:
74         break;
75     }
78 static uint64_t heathrow_read(void *opaque, hwaddr addr,
79                               unsigned size)
81     HeathrowState *s = opaque;
82     HeathrowPICState *pic;
83     unsigned int n;
84     uint32_t value;
86     n = ((addr & 0xfff) - 0x10) >> 4;
87     if (n >= 2) {
88         value = 0;
89     } else {
90         pic = &s->pics[n];
91         switch(addr & 0xf) {
92         case 0x0:
93             value = pic->events;
94             break;
95         case 0x4:
96             value = pic->mask;
97             break;
98         case 0xc:
99             value = pic->levels;
100             break;
101         default:
102             value = 0;
103             break;
104         }
105     }
106     trace_heathrow_read(addr, n, value);
107     return value;
110 static const MemoryRegionOps heathrow_ops = {
111     .read = heathrow_read,
112     .write = heathrow_write,
113     .endianness = DEVICE_LITTLE_ENDIAN,
116 static void heathrow_set_irq(void *opaque, int num, int level)
118     HeathrowState *s = opaque;
119     HeathrowPICState *pic;
120     unsigned int irq_bit;
121     int last_level;
123     pic = &s->pics[1 - (num >> 5)];
124     irq_bit = 1 << (num & 0x1f);
125     last_level = (pic->levels & irq_bit) ? 1 : 0;
127     if (level) {
128         pic->events |= irq_bit & ~pic->level_triggered;
129         pic->levels |= irq_bit;
130     } else {
131         pic->levels &= ~irq_bit;
132     }
134     if (last_level != level) {
135         trace_heathrow_set_irq(num, level);
136     }
138     heathrow_update_irq(s);
141 static const VMStateDescription vmstate_heathrow_pic_one = {
142     .name = "heathrow_pic_one",
143     .version_id = 0,
144     .minimum_version_id = 0,
145     .fields = (VMStateField[]) {
146         VMSTATE_UINT32(events, HeathrowPICState),
147         VMSTATE_UINT32(mask, HeathrowPICState),
148         VMSTATE_UINT32(levels, HeathrowPICState),
149         VMSTATE_UINT32(level_triggered, HeathrowPICState),
150         VMSTATE_END_OF_LIST()
151     }
154 static const VMStateDescription vmstate_heathrow = {
155     .name = "heathrow_pic",
156     .version_id = 1,
157     .minimum_version_id = 1,
158     .fields = (VMStateField[]) {
159         VMSTATE_STRUCT_ARRAY(pics, HeathrowState, 2, 1,
160                              vmstate_heathrow_pic_one, HeathrowPICState),
161         VMSTATE_END_OF_LIST()
162     }
165 static void heathrow_reset(DeviceState *d)
167     HeathrowState *s = HEATHROW(d);
169     s->pics[0].level_triggered = 0;
170     s->pics[1].level_triggered = 0x1ff00000;
173 static void heathrow_init(Object *obj)
175     HeathrowState *s = HEATHROW(obj);
176     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
178     /* only 1 CPU */
179     qdev_init_gpio_out(DEVICE(obj), s->irqs, 1);
181     qdev_init_gpio_in(DEVICE(obj), heathrow_set_irq, HEATHROW_NUM_IRQS);
183     memory_region_init_io(&s->mem, OBJECT(s), &heathrow_ops, s,
184                           "heathrow-pic", 0x1000);
185     sysbus_init_mmio(sbd, &s->mem);
188 static void heathrow_class_init(ObjectClass *oc, void *data)
190     DeviceClass *dc = DEVICE_CLASS(oc);
192     dc->reset = heathrow_reset;
193     dc->vmsd = &vmstate_heathrow;
194     set_bit(DEVICE_CATEGORY_MISC, dc->categories);
197 static const TypeInfo heathrow_type_info = {
198     .name = TYPE_HEATHROW,
199     .parent = TYPE_SYS_BUS_DEVICE,
200     .instance_size = sizeof(HeathrowState),
201     .instance_init = heathrow_init,
202     .class_init = heathrow_class_init,
205 static void heathrow_register_types(void)
207     type_register_static(&heathrow_type_info);
210 type_init(heathrow_register_types)