?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
memory: move unassigned_mem_ops to memory.c
[qemu/ar7.git] / memory.c
blob2e4f547261b47ad6cc35f77df2c4c79d9afd3db2
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "sysemu/kvm.h"
21 #include <assert.h>
22
23 #include "exec/memory-internal.h"
24
25 //#define DEBUG_UNASSIGNED
26
27 static unsigned memory_region_transaction_depth;
28 static bool memory_region_update_pending;
29 static bool global_dirty_log = false;
30
31 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
32 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
33
34 static QTAILQ_HEAD(, AddressSpace) address_spaces
35 = QTAILQ_HEAD_INITIALIZER(address_spaces);
36
37 typedef struct AddrRange AddrRange;
38
39 /*
40 * Note using signed integers limits us to physical addresses at most
41 * 63 bits wide. They are needed for negative offsetting in aliases
42 * (large MemoryRegion::alias_offset).
43 */
44 struct AddrRange {
45 Int128 start;
46 Int128 size;
47 };
48
49 static AddrRange addrrange_make(Int128 start, Int128 size)
50 {
51 return (AddrRange) { start, size };
52 }
53
54 static bool addrrange_equal(AddrRange r1, AddrRange r2)
55 {
56 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
57 }
58
59 static Int128 addrrange_end(AddrRange r)
60 {
61 return int128_add(r.start, r.size);
62 }
63
64 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
65 {
66 int128_addto(&range.start, delta);
67 return range;
68 }
69
70 static bool addrrange_contains(AddrRange range, Int128 addr)
71 {
72 return int128_ge(addr, range.start)
73 && int128_lt(addr, addrrange_end(range));
74 }
75
76 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
77 {
78 return addrrange_contains(r1, r2.start)
79 || addrrange_contains(r2, r1.start);
80 }
81
82 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
83 {
84 Int128 start = int128_max(r1.start, r2.start);
85 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
86 return addrrange_make(start, int128_sub(end, start));
87 }
88
89 enum ListenerDirection { Forward, Reverse };
90
91 static bool memory_listener_match(MemoryListener *listener,
92 MemoryRegionSection *section)
93 {
94 return !listener->address_space_filter
95 || listener->address_space_filter == section->address_space;
96 }
97
98 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
99 do { \
100 MemoryListener *_listener; \
101 \
102 switch (_direction) { \
103 case Forward: \
104 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
105 if (_listener->_callback) { \
106 _listener->_callback(_listener, ##_args); \
107 } \
108 } \
109 break; \
110 case Reverse: \
111 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
112 memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 default: \
119 abort(); \
120 } \
121 } while (0)
122
123 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
124 do { \
125 MemoryListener *_listener; \
126 \
127 switch (_direction) { \
128 case Forward: \
129 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
130 if (_listener->_callback \
131 && memory_listener_match(_listener, _section)) { \
132 _listener->_callback(_listener, _section, ##_args); \
133 } \
134 } \
135 break; \
136 case Reverse: \
137 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
138 memory_listeners, link) { \
139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 default: \
146 abort(); \
147 } \
148 } while (0)
149
150 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
151 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
152 .mr = (fr)->mr, \
153 .address_space = (as), \
154 .offset_within_region = (fr)->offset_in_region, \
155 .size = int128_get64((fr)->addr.size), \
156 .offset_within_address_space = int128_get64((fr)->addr.start), \
157 .readonly = (fr)->readonly, \
158 }))
159
160 struct CoalescedMemoryRange {
161 AddrRange addr;
162 QTAILQ_ENTRY(CoalescedMemoryRange) link;
163 };
164
165 struct MemoryRegionIoeventfd {
166 AddrRange addr;
167 bool match_data;
168 uint64_t data;
169 EventNotifier *e;
170 };
171
172 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
173 MemoryRegionIoeventfd b)
174 {
175 if (int128_lt(a.addr.start, b.addr.start)) {
176 return true;
177 } else if (int128_gt(a.addr.start, b.addr.start)) {
178 return false;
179 } else if (int128_lt(a.addr.size, b.addr.size)) {
180 return true;
181 } else if (int128_gt(a.addr.size, b.addr.size)) {
182 return false;
183 } else if (a.match_data < b.match_data) {
184 return true;
185 } else if (a.match_data > b.match_data) {
186 return false;
187 } else if (a.match_data) {
188 if (a.data < b.data) {
189 return true;
190 } else if (a.data > b.data) {
191 return false;
192 }
193 }
194 if (a.e < b.e) {
195 return true;
196 } else if (a.e > b.e) {
197 return false;
198 }
199 return false;
200 }
201
202 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
203 MemoryRegionIoeventfd b)
204 {
205 return !memory_region_ioeventfd_before(a, b)
206 && !memory_region_ioeventfd_before(b, a);
207 }
208
209 typedef struct FlatRange FlatRange;
210 typedef struct FlatView FlatView;
211
212 /* Range of memory in the global map. Addresses are absolute. */
213 struct FlatRange {
214 MemoryRegion *mr;
215 hwaddr offset_in_region;
216 AddrRange addr;
217 uint8_t dirty_log_mask;
218 bool romd_mode;
219 bool readonly;
220 };
221
222 /* Flattened global view of current active memory hierarchy. Kept in sorted
223 * order.
224 */
225 struct FlatView {
226 FlatRange *ranges;
227 unsigned nr;
228 unsigned nr_allocated;
229 };
230
231 typedef struct AddressSpaceOps AddressSpaceOps;
232
233 #define FOR_EACH_FLAT_RANGE(var, view) \
234 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
235
236 static bool flatrange_equal(FlatRange *a, FlatRange *b)
237 {
238 return a->mr == b->mr
239 && addrrange_equal(a->addr, b->addr)
240 && a->offset_in_region == b->offset_in_region
241 && a->romd_mode == b->romd_mode
242 && a->readonly == b->readonly;
243 }
244
245 static void flatview_init(FlatView *view)
246 {
247 view->ranges = NULL;
248 view->nr = 0;
249 view->nr_allocated = 0;
250 }
251
252 /* Insert a range into a given position. Caller is responsible for maintaining
253 * sorting order.
254 */
255 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
256 {
257 if (view->nr == view->nr_allocated) {
258 view->nr_allocated = MAX(2 * view->nr, 10);
259 view->ranges = g_realloc(view->ranges,
260 view->nr_allocated * sizeof(*view->ranges));
261 }
262 memmove(view->ranges + pos + 1, view->ranges + pos,
263 (view->nr - pos) * sizeof(FlatRange));
264 view->ranges[pos] = *range;
265 ++view->nr;
266 }
267
268 static void flatview_destroy(FlatView *view)
269 {
270 g_free(view->ranges);
271 }
272
273 static bool can_merge(FlatRange *r1, FlatRange *r2)
274 {
275 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
276 && r1->mr == r2->mr
277 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
278 r1->addr.size),
279 int128_make64(r2->offset_in_region))
280 && r1->dirty_log_mask == r2->dirty_log_mask
281 && r1->romd_mode == r2->romd_mode
282 && r1->readonly == r2->readonly;
283 }
284
285 /* Attempt to simplify a view by merging ajacent ranges */
286 static void flatview_simplify(FlatView *view)
287 {
288 unsigned i, j;
289
290 i = 0;
291 while (i < view->nr) {
292 j = i + 1;
293 while (j < view->nr
294 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
295 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
296 ++j;
297 }
298 ++i;
299 memmove(&view->ranges[i], &view->ranges[j],
300 (view->nr - j) * sizeof(view->ranges[j]));
301 view->nr -= j - i;
302 }
303 }
304
305 static void memory_region_read_accessor(void *opaque,
306 hwaddr addr,
307 uint64_t *value,
308 unsigned size,
309 unsigned shift,
310 uint64_t mask)
311 {
312 MemoryRegion *mr = opaque;
313 uint64_t tmp;
314
315 if (mr->flush_coalesced_mmio) {
316 qemu_flush_coalesced_mmio_buffer();
317 }
318 tmp = mr->ops->read(mr->opaque, addr, size);
319 *value |= (tmp & mask) << shift;
320 }
321
322 static void memory_region_write_accessor(void *opaque,
323 hwaddr addr,
324 uint64_t *value,
325 unsigned size,
326 unsigned shift,
327 uint64_t mask)
328 {
329 MemoryRegion *mr = opaque;
330 uint64_t tmp;
331
332 if (mr->flush_coalesced_mmio) {
333 qemu_flush_coalesced_mmio_buffer();
334 }
335 tmp = (*value >> shift) & mask;
336 mr->ops->write(mr->opaque, addr, tmp, size);
337 }
338
339 static void access_with_adjusted_size(hwaddr addr,
340 uint64_t *value,
341 unsigned size,
342 unsigned access_size_min,
343 unsigned access_size_max,
344 void (*access)(void *opaque,
345 hwaddr addr,
346 uint64_t *value,
347 unsigned size,
348 unsigned shift,
349 uint64_t mask),
350 void *opaque)
351 {
352 uint64_t access_mask;
353 unsigned access_size;
354 unsigned i;
355
356 if (!access_size_min) {
357 access_size_min = 1;
358 }
359 if (!access_size_max) {
360 access_size_max = 4;
361 }
362 access_size = MAX(MIN(size, access_size_max), access_size_min);
363 access_mask = -1ULL >> (64 - access_size * 8);
364 for (i = 0; i < size; i += access_size) {
365 /* FIXME: big-endian support */
366 access(opaque, addr + i, value, access_size, i * 8, access_mask);
367 }
368 }
369
370 static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
371 unsigned width, bool write)
372 {
373 const MemoryRegionPortio *mrp;
374
375 for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
376 if (offset >= mrp->offset && offset < mrp->offset + mrp->len
377 && width == mrp->size
378 && (write ? (bool)mrp->write : (bool)mrp->read)) {
379 return mrp;
380 }
381 }
382 return NULL;
383 }
384
385 static void memory_region_iorange_read(IORange *iorange,
386 uint64_t offset,
387 unsigned width,
388 uint64_t *data)
389 {
390 MemoryRegionIORange *mrio
391 = container_of(iorange, MemoryRegionIORange, iorange);
392 MemoryRegion *mr = mrio->mr;
393
394 offset += mrio->offset;
395 if (mr->ops->old_portio) {
396 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
397 width, false);
398
399 *data = ((uint64_t)1 << (width * 8)) - 1;
400 if (mrp) {
401 *data = mrp->read(mr->opaque, offset);
402 } else if (width == 2) {
403 mrp = find_portio(mr, offset - mrio->offset, 1, false);
404 assert(mrp);
405 *data = mrp->read(mr->opaque, offset) |
406 (mrp->read(mr->opaque, offset + 1) << 8);
407 }
408 return;
409 }
410 *data = 0;
411 access_with_adjusted_size(offset, data, width,
412 mr->ops->impl.min_access_size,
413 mr->ops->impl.max_access_size,
414 memory_region_read_accessor, mr);
415 }
416
417 static void memory_region_iorange_write(IORange *iorange,
418 uint64_t offset,
419 unsigned width,
420 uint64_t data)
421 {
422 MemoryRegionIORange *mrio
423 = container_of(iorange, MemoryRegionIORange, iorange);
424 MemoryRegion *mr = mrio->mr;
425
426 offset += mrio->offset;
427 if (mr->ops->old_portio) {
428 const MemoryRegionPortio *mrp = find_portio(mr, offset - mrio->offset,
429 width, true);
430
431 if (mrp) {
432 mrp->write(mr->opaque, offset, data);
433 } else if (width == 2) {
434 mrp = find_portio(mr, offset - mrio->offset, 1, true);
435 assert(mrp);
436 mrp->write(mr->opaque, offset, data & 0xff);
437 mrp->write(mr->opaque, offset + 1, data >> 8);
438 }
439 return;
440 }
441 access_with_adjusted_size(offset, &data, width,
442 mr->ops->impl.min_access_size,
443 mr->ops->impl.max_access_size,
444 memory_region_write_accessor, mr);
445 }
446
447 static void memory_region_iorange_destructor(IORange *iorange)
448 {
449 g_free(container_of(iorange, MemoryRegionIORange, iorange));
450 }
451
452 const IORangeOps memory_region_iorange_ops = {
453 .read = memory_region_iorange_read,
454 .write = memory_region_iorange_write,
455 .destructor = memory_region_iorange_destructor,
456 };
457
458 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
459 {
460 AddressSpace *as;
461
462 while (mr->parent) {
463 mr = mr->parent;
464 }
465 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
466 if (mr == as->root) {
467 return as;
468 }
469 }
470 abort();
471 }
472
473 /* Render a memory region into the global view. Ranges in @view obscure
474 * ranges in @mr.
475 */
476 static void render_memory_region(FlatView *view,
477 MemoryRegion *mr,
478 Int128 base,
479 AddrRange clip,
480 bool readonly)
481 {
482 MemoryRegion *subregion;
483 unsigned i;
484 hwaddr offset_in_region;
485 Int128 remain;
486 Int128 now;
487 FlatRange fr;
488 AddrRange tmp;
489
490 if (!mr->enabled) {
491 return;
492 }
493
494 int128_addto(&base, int128_make64(mr->addr));
495 readonly |= mr->readonly;
496
497 tmp = addrrange_make(base, mr->size);
498
499 if (!addrrange_intersects(tmp, clip)) {
500 return;
501 }
502
503 clip = addrrange_intersection(tmp, clip);
504
505 if (mr->alias) {
506 int128_subfrom(&base, int128_make64(mr->alias->addr));
507 int128_subfrom(&base, int128_make64(mr->alias_offset));
508 render_memory_region(view, mr->alias, base, clip, readonly);
509 return;
510 }
511
512 /* Render subregions in priority order. */
513 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
514 render_memory_region(view, subregion, base, clip, readonly);
515 }
516
517 if (!mr->terminates) {
518 return;
519 }
520
521 offset_in_region = int128_get64(int128_sub(clip.start, base));
522 base = clip.start;
523 remain = clip.size;
524
525 /* Render the region itself into any gaps left by the current view. */
526 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
527 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
528 continue;
529 }
530 if (int128_lt(base, view->ranges[i].addr.start)) {
531 now = int128_min(remain,
532 int128_sub(view->ranges[i].addr.start, base));
533 fr.mr = mr;
534 fr.offset_in_region = offset_in_region;
535 fr.addr = addrrange_make(base, now);
536 fr.dirty_log_mask = mr->dirty_log_mask;
537 fr.romd_mode = mr->romd_mode;
538 fr.readonly = readonly;
539 flatview_insert(view, i, &fr);
540 ++i;
541 int128_addto(&base, now);
542 offset_in_region += int128_get64(now);
543 int128_subfrom(&remain, now);
544 }
545 now = int128_sub(int128_min(int128_add(base, remain),
546 addrrange_end(view->ranges[i].addr)),
547 base);
548 int128_addto(&base, now);
549 offset_in_region += int128_get64(now);
550 int128_subfrom(&remain, now);
551 }
552 if (int128_nz(remain)) {
553 fr.mr = mr;
554 fr.offset_in_region = offset_in_region;
555 fr.addr = addrrange_make(base, remain);
556 fr.dirty_log_mask = mr->dirty_log_mask;
557 fr.romd_mode = mr->romd_mode;
558 fr.readonly = readonly;
559 flatview_insert(view, i, &fr);
560 }
561 }
562
563 /* Render a memory topology into a list of disjoint absolute ranges. */
564 static FlatView generate_memory_topology(MemoryRegion *mr)
565 {
566 FlatView view;
567
568 flatview_init(&view);
569
570 if (mr) {
571 render_memory_region(&view, mr, int128_zero(),
572 addrrange_make(int128_zero(), int128_2_64()), false);
573 }
574 flatview_simplify(&view);
575
576 return view;
577 }
578
579 static void address_space_add_del_ioeventfds(AddressSpace *as,
580 MemoryRegionIoeventfd *fds_new,
581 unsigned fds_new_nb,
582 MemoryRegionIoeventfd *fds_old,
583 unsigned fds_old_nb)
584 {
585 unsigned iold, inew;
586 MemoryRegionIoeventfd *fd;
587 MemoryRegionSection section;
588
589 /* Generate a symmetric difference of the old and new fd sets, adding
590 * and deleting as necessary.
591 */
592
593 iold = inew = 0;
594 while (iold < fds_old_nb || inew < fds_new_nb) {
595 if (iold < fds_old_nb
596 && (inew == fds_new_nb
597 || memory_region_ioeventfd_before(fds_old[iold],
598 fds_new[inew]))) {
599 fd = &fds_old[iold];
600 section = (MemoryRegionSection) {
601 .address_space = as,
602 .offset_within_address_space = int128_get64(fd->addr.start),
603 .size = int128_get64(fd->addr.size),
604 };
605 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
606 fd->match_data, fd->data, fd->e);
607 ++iold;
608 } else if (inew < fds_new_nb
609 && (iold == fds_old_nb
610 || memory_region_ioeventfd_before(fds_new[inew],
611 fds_old[iold]))) {
612 fd = &fds_new[inew];
613 section = (MemoryRegionSection) {
614 .address_space = as,
615 .offset_within_address_space = int128_get64(fd->addr.start),
616 .size = int128_get64(fd->addr.size),
617 };
618 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
619 fd->match_data, fd->data, fd->e);
620 ++inew;
621 } else {
622 ++iold;
623 ++inew;
624 }
625 }
626 }
627
628 static void address_space_update_ioeventfds(AddressSpace *as)
629 {
630 FlatRange *fr;
631 unsigned ioeventfd_nb = 0;
632 MemoryRegionIoeventfd *ioeventfds = NULL;
633 AddrRange tmp;
634 unsigned i;
635
636 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
637 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
638 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
639 int128_sub(fr->addr.start,
640 int128_make64(fr->offset_in_region)));
641 if (addrrange_intersects(fr->addr, tmp)) {
642 ++ioeventfd_nb;
643 ioeventfds = g_realloc(ioeventfds,
644 ioeventfd_nb * sizeof(*ioeventfds));
645 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
646 ioeventfds[ioeventfd_nb-1].addr = tmp;
647 }
648 }
649 }
650
651 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
652 as->ioeventfds, as->ioeventfd_nb);
653
654 g_free(as->ioeventfds);
655 as->ioeventfds = ioeventfds;
656 as->ioeventfd_nb = ioeventfd_nb;
657 }
658
659 static void address_space_update_topology_pass(AddressSpace *as,
660 FlatView old_view,
661 FlatView new_view,
662 bool adding)
663 {
664 unsigned iold, inew;
665 FlatRange *frold, *frnew;
666
667 /* Generate a symmetric difference of the old and new memory maps.
668 * Kill ranges in the old map, and instantiate ranges in the new map.
669 */
670 iold = inew = 0;
671 while (iold < old_view.nr || inew < new_view.nr) {
672 if (iold < old_view.nr) {
673 frold = &old_view.ranges[iold];
674 } else {
675 frold = NULL;
676 }
677 if (inew < new_view.nr) {
678 frnew = &new_view.ranges[inew];
679 } else {
680 frnew = NULL;
681 }
682
683 if (frold
684 && (!frnew
685 || int128_lt(frold->addr.start, frnew->addr.start)
686 || (int128_eq(frold->addr.start, frnew->addr.start)
687 && !flatrange_equal(frold, frnew)))) {
688 /* In old, but (not in new, or in new but attributes changed). */
689
690 if (!adding) {
691 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
692 }
693
694 ++iold;
695 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
696 /* In both (logging may have changed) */
697
698 if (adding) {
699 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
700 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
701 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
702 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
703 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
704 }
705 }
706
707 ++iold;
708 ++inew;
709 } else {
710 /* In new */
711
712 if (adding) {
713 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
714 }
715
716 ++inew;
717 }
718 }
719 }
720
721
722 static void address_space_update_topology(AddressSpace *as)
723 {
724 FlatView old_view = *as->current_map;
725 FlatView new_view = generate_memory_topology(as->root);
726
727 address_space_update_topology_pass(as, old_view, new_view, false);
728 address_space_update_topology_pass(as, old_view, new_view, true);
729
730 *as->current_map = new_view;
731 flatview_destroy(&old_view);
732 address_space_update_ioeventfds(as);
733 }
734
735 void memory_region_transaction_begin(void)
736 {
737 qemu_flush_coalesced_mmio_buffer();
738 ++memory_region_transaction_depth;
739 }
740
741 void memory_region_transaction_commit(void)
742 {
743 AddressSpace *as;
744
745 assert(memory_region_transaction_depth);
746 --memory_region_transaction_depth;
747 if (!memory_region_transaction_depth && memory_region_update_pending) {
748 memory_region_update_pending = false;
749 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
750
751 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
752 address_space_update_topology(as);
753 }
754
755 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
756 }
757 }
758
759 static void memory_region_destructor_none(MemoryRegion *mr)
760 {
761 }
762
763 static void memory_region_destructor_ram(MemoryRegion *mr)
764 {
765 qemu_ram_free(mr->ram_addr);
766 }
767
768 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
769 {
770 qemu_ram_free_from_ptr(mr->ram_addr);
771 }
772
773 static void memory_region_destructor_rom_device(MemoryRegion *mr)
774 {
775 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
776 }
777
778 static bool memory_region_wrong_endianness(MemoryRegion *mr)
779 {
780 #ifdef TARGET_WORDS_BIGENDIAN
781 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
782 #else
783 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
784 #endif
785 }
786
787 void memory_region_init(MemoryRegion *mr,
788 const char *name,
789 uint64_t size)
790 {
791 mr->ops = NULL;
792 mr->parent = NULL;
793 mr->size = int128_make64(size);
794 if (size == UINT64_MAX) {
795 mr->size = int128_2_64();
796 }
797 mr->addr = 0;
798 mr->subpage = false;
799 mr->enabled = true;
800 mr->terminates = false;
801 mr->ram = false;
802 mr->romd_mode = true;
803 mr->readonly = false;
804 mr->rom_device = false;
805 mr->destructor = memory_region_destructor_none;
806 mr->priority = 0;
807 mr->may_overlap = false;
808 mr->alias = NULL;
809 QTAILQ_INIT(&mr->subregions);
810 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
811 QTAILQ_INIT(&mr->coalesced);
812 mr->name = g_strdup(name);
813 mr->dirty_log_mask = 0;
814 mr->ioeventfd_nb = 0;
815 mr->ioeventfds = NULL;
816 mr->flush_coalesced_mmio = false;
817 }
818
819 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
820 unsigned size)
821 {
822 #ifdef DEBUG_UNASSIGNED
823 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
824 #endif
825 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
826 cpu_unassigned_access(cpu_single_env, addr, 0, 0, 0, size);
827 #endif
828 return 0;
829 }
830
831 static void unassigned_mem_write(void *opaque, hwaddr addr,
832 uint64_t val, unsigned size)
833 {
834 #ifdef DEBUG_UNASSIGNED
835 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
836 #endif
837 #if defined(TARGET_ALPHA) || defined(TARGET_SPARC) || defined(TARGET_MICROBLAZE)
838 cpu_unassigned_access(cpu_single_env, addr, 1, 0, 0, size);
839 #endif
840 }
841
842 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
843 unsigned size, bool is_write)
844 {
845 return false;
846 }
847
848 const MemoryRegionOps unassigned_mem_ops = {
849 .valid.accepts = unassigned_mem_accepts,
850 .endianness = DEVICE_NATIVE_ENDIAN,
851 };
852
853 static bool memory_region_access_valid(MemoryRegion *mr,
854 hwaddr addr,
855 unsigned size,
856 bool is_write)
857 {
858 if (mr->ops->valid.accepts
859 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write)) {
860 return false;
861 }
862
863 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
864 return false;
865 }
866
867 /* Treat zero as compatibility all valid */
868 if (!mr->ops->valid.max_access_size) {
869 return true;
870 }
871
872 if (size > mr->ops->valid.max_access_size
873 || size < mr->ops->valid.min_access_size) {
874 return false;
875 }
876 return true;
877 }
878
879 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
880 hwaddr addr,
881 unsigned size)
882 {
883 uint64_t data = 0;
884
885 if (!memory_region_access_valid(mr, addr, size, false)) {
886 return unassigned_mem_read(mr, addr, size);
887 }
888
889 if (!mr->ops->read) {
890 return mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
891 }
892
893 /* FIXME: support unaligned access */
894 access_with_adjusted_size(addr, &data, size,
895 mr->ops->impl.min_access_size,
896 mr->ops->impl.max_access_size,
897 memory_region_read_accessor, mr);
898
899 return data;
900 }
901
902 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
903 {
904 if (memory_region_wrong_endianness(mr)) {
905 switch (size) {
906 case 1:
907 break;
908 case 2:
909 *data = bswap16(*data);
910 break;
911 case 4:
912 *data = bswap32(*data);
913 break;
914 default:
915 abort();
916 }
917 }
918 }
919
920 static uint64_t memory_region_dispatch_read(MemoryRegion *mr,
921 hwaddr addr,
922 unsigned size)
923 {
924 uint64_t ret;
925
926 ret = memory_region_dispatch_read1(mr, addr, size);
927 adjust_endianness(mr, &ret, size);
928 return ret;
929 }
930
931 static void memory_region_dispatch_write(MemoryRegion *mr,
932 hwaddr addr,
933 uint64_t data,
934 unsigned size)
935 {
936 if (!memory_region_access_valid(mr, addr, size, true)) {
937 unassigned_mem_write(mr, addr, data, size);
938 return;
939 }
940
941 adjust_endianness(mr, &data, size);
942
943 if (!mr->ops->write) {
944 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, data);
945 return;
946 }
947
948 /* FIXME: support unaligned access */
949 access_with_adjusted_size(addr, &data, size,
950 mr->ops->impl.min_access_size,
951 mr->ops->impl.max_access_size,
952 memory_region_write_accessor, mr);
953 }
954
955 void memory_region_init_io(MemoryRegion *mr,
956 const MemoryRegionOps *ops,
957 void *opaque,
958 const char *name,
959 uint64_t size)
960 {
961 memory_region_init(mr, name, size);
962 mr->ops = ops;
963 mr->opaque = opaque;
964 mr->terminates = true;
965 mr->ram_addr = ~(ram_addr_t)0;
966 }
967
968 void memory_region_init_ram(MemoryRegion *mr,
969 const char *name,
970 uint64_t size)
971 {
972 memory_region_init(mr, name, size);
973 mr->ram = true;
974 mr->terminates = true;
975 mr->destructor = memory_region_destructor_ram;
976 mr->ram_addr = qemu_ram_alloc(size, mr);
977 }
978
979 void memory_region_init_ram_ptr(MemoryRegion *mr,
980 const char *name,
981 uint64_t size,
982 void *ptr)
983 {
984 memory_region_init(mr, name, size);
985 mr->ram = true;
986 mr->terminates = true;
987 mr->destructor = memory_region_destructor_ram_from_ptr;
988 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
989 }
990
991 void memory_region_init_alias(MemoryRegion *mr,
992 const char *name,
993 MemoryRegion *orig,
994 hwaddr offset,
995 uint64_t size)
996 {
997 memory_region_init(mr, name, size);
998 mr->alias = orig;
999 mr->alias_offset = offset;
1000 }
1001
1002 void memory_region_init_rom_device(MemoryRegion *mr,
1003 const MemoryRegionOps *ops,
1004 void *opaque,
1005 const char *name,
1006 uint64_t size)
1007 {
1008 memory_region_init(mr, name, size);
1009 mr->ops = ops;
1010 mr->opaque = opaque;
1011 mr->terminates = true;
1012 mr->rom_device = true;
1013 mr->destructor = memory_region_destructor_rom_device;
1014 mr->ram_addr = qemu_ram_alloc(size, mr);
1015 }
1016
1017 void memory_region_init_reservation(MemoryRegion *mr,
1018 const char *name,
1019 uint64_t size)
1020 {
1021 memory_region_init_io(mr, &unassigned_mem_ops, mr, name, size);
1022 }
1023
1024 void memory_region_destroy(MemoryRegion *mr)
1025 {
1026 assert(QTAILQ_EMPTY(&mr->subregions));
1027 assert(memory_region_transaction_depth == 0);
1028 mr->destructor(mr);
1029 memory_region_clear_coalescing(mr);
1030 g_free((char *)mr->name);
1031 g_free(mr->ioeventfds);
1032 }
1033
1034 uint64_t memory_region_size(MemoryRegion *mr)
1035 {
1036 if (int128_eq(mr->size, int128_2_64())) {
1037 return UINT64_MAX;
1038 }
1039 return int128_get64(mr->size);
1040 }
1041
1042 const char *memory_region_name(MemoryRegion *mr)
1043 {
1044 return mr->name;
1045 }
1046
1047 bool memory_region_is_ram(MemoryRegion *mr)
1048 {
1049 return mr->ram;
1050 }
1051
1052 bool memory_region_is_logging(MemoryRegion *mr)
1053 {
1054 return mr->dirty_log_mask;
1055 }
1056
1057 bool memory_region_is_rom(MemoryRegion *mr)
1058 {
1059 return mr->ram && mr->readonly;
1060 }
1061
1062 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1063 {
1064 uint8_t mask = 1 << client;
1065
1066 memory_region_transaction_begin();
1067 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1068 memory_region_update_pending |= mr->enabled;
1069 memory_region_transaction_commit();
1070 }
1071
1072 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1073 hwaddr size, unsigned client)
1074 {
1075 assert(mr->terminates);
1076 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1077 1 << client);
1078 }
1079
1080 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1081 hwaddr size)
1082 {
1083 assert(mr->terminates);
1084 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1085 }
1086
1087 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1088 hwaddr size, unsigned client)
1089 {
1090 bool ret;
1091 assert(mr->terminates);
1092 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1093 1 << client);
1094 if (ret) {
1095 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1096 mr->ram_addr + addr + size,
1097 1 << client);
1098 }
1099 return ret;
1100 }
1101
1102
1103 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1104 {
1105 AddressSpace *as;
1106 FlatRange *fr;
1107
1108 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1109 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1110 if (fr->mr == mr) {
1111 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1112 }
1113 }
1114 }
1115 }
1116
1117 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1118 {
1119 if (mr->readonly != readonly) {
1120 memory_region_transaction_begin();
1121 mr->readonly = readonly;
1122 memory_region_update_pending |= mr->enabled;
1123 memory_region_transaction_commit();
1124 }
1125 }
1126
1127 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1128 {
1129 if (mr->romd_mode != romd_mode) {
1130 memory_region_transaction_begin();
1131 mr->romd_mode = romd_mode;
1132 memory_region_update_pending |= mr->enabled;
1133 memory_region_transaction_commit();
1134 }
1135 }
1136
1137 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1138 hwaddr size, unsigned client)
1139 {
1140 assert(mr->terminates);
1141 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1142 mr->ram_addr + addr + size,
1143 1 << client);
1144 }
1145
1146 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1147 {
1148 if (mr->alias) {
1149 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1150 }
1151
1152 assert(mr->terminates);
1153
1154 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1155 }
1156
1157 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1158 {
1159 FlatRange *fr;
1160 CoalescedMemoryRange *cmr;
1161 AddrRange tmp;
1162 MemoryRegionSection section;
1163
1164 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1165 if (fr->mr == mr) {
1166 section = (MemoryRegionSection) {
1167 .address_space = as,
1168 .offset_within_address_space = int128_get64(fr->addr.start),
1169 .size = int128_get64(fr->addr.size),
1170 };
1171
1172 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1173 int128_get64(fr->addr.start),
1174 int128_get64(fr->addr.size));
1175 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1176 tmp = addrrange_shift(cmr->addr,
1177 int128_sub(fr->addr.start,
1178 int128_make64(fr->offset_in_region)));
1179 if (!addrrange_intersects(tmp, fr->addr)) {
1180 continue;
1181 }
1182 tmp = addrrange_intersection(tmp, fr->addr);
1183 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1184 int128_get64(tmp.start),
1185 int128_get64(tmp.size));
1186 }
1187 }
1188 }
1189 }
1190
1191 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1192 {
1193 AddressSpace *as;
1194
1195 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1196 memory_region_update_coalesced_range_as(mr, as);
1197 }
1198 }
1199
1200 void memory_region_set_coalescing(MemoryRegion *mr)
1201 {
1202 memory_region_clear_coalescing(mr);
1203 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1204 }
1205
1206 void memory_region_add_coalescing(MemoryRegion *mr,
1207 hwaddr offset,
1208 uint64_t size)
1209 {
1210 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1211
1212 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1213 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1214 memory_region_update_coalesced_range(mr);
1215 memory_region_set_flush_coalesced(mr);
1216 }
1217
1218 void memory_region_clear_coalescing(MemoryRegion *mr)
1219 {
1220 CoalescedMemoryRange *cmr;
1221
1222 qemu_flush_coalesced_mmio_buffer();
1223 mr->flush_coalesced_mmio = false;
1224
1225 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1226 cmr = QTAILQ_FIRST(&mr->coalesced);
1227 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1228 g_free(cmr);
1229 }
1230 memory_region_update_coalesced_range(mr);
1231 }
1232
1233 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1234 {
1235 mr->flush_coalesced_mmio = true;
1236 }
1237
1238 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1239 {
1240 qemu_flush_coalesced_mmio_buffer();
1241 if (QTAILQ_EMPTY(&mr->coalesced)) {
1242 mr->flush_coalesced_mmio = false;
1243 }
1244 }
1245
1246 void memory_region_add_eventfd(MemoryRegion *mr,
1247 hwaddr addr,
1248 unsigned size,
1249 bool match_data,
1250 uint64_t data,
1251 EventNotifier *e)
1252 {
1253 MemoryRegionIoeventfd mrfd = {
1254 .addr.start = int128_make64(addr),
1255 .addr.size = int128_make64(size),
1256 .match_data = match_data,
1257 .data = data,
1258 .e = e,
1259 };
1260 unsigned i;
1261
1262 adjust_endianness(mr, &mrfd.data, size);
1263 memory_region_transaction_begin();
1264 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1265 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1266 break;
1267 }
1268 }
1269 ++mr->ioeventfd_nb;
1270 mr->ioeventfds = g_realloc(mr->ioeventfds,
1271 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1272 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1273 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1274 mr->ioeventfds[i] = mrfd;
1275 memory_region_update_pending |= mr->enabled;
1276 memory_region_transaction_commit();
1277 }
1278
1279 void memory_region_del_eventfd(MemoryRegion *mr,
1280 hwaddr addr,
1281 unsigned size,
1282 bool match_data,
1283 uint64_t data,
1284 EventNotifier *e)
1285 {
1286 MemoryRegionIoeventfd mrfd = {
1287 .addr.start = int128_make64(addr),
1288 .addr.size = int128_make64(size),
1289 .match_data = match_data,
1290 .data = data,
1291 .e = e,
1292 };
1293 unsigned i;
1294
1295 adjust_endianness(mr, &mrfd.data, size);
1296 memory_region_transaction_begin();
1297 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1298 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1299 break;
1300 }
1301 }
1302 assert(i != mr->ioeventfd_nb);
1303 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1304 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1305 --mr->ioeventfd_nb;
1306 mr->ioeventfds = g_realloc(mr->ioeventfds,
1307 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1308 memory_region_update_pending |= mr->enabled;
1309 memory_region_transaction_commit();
1310 }
1311
1312 static void memory_region_add_subregion_common(MemoryRegion *mr,
1313 hwaddr offset,
1314 MemoryRegion *subregion)
1315 {
1316 MemoryRegion *other;
1317
1318 memory_region_transaction_begin();
1319
1320 assert(!subregion->parent);
1321 subregion->parent = mr;
1322 subregion->addr = offset;
1323 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1324 if (subregion->may_overlap || other->may_overlap) {
1325 continue;
1326 }
1327 if (int128_ge(int128_make64(offset),
1328 int128_add(int128_make64(other->addr), other->size))
1329 || int128_le(int128_add(int128_make64(offset), subregion->size),
1330 int128_make64(other->addr))) {
1331 continue;
1332 }
1333 #if 0
1334 printf("warning: subregion collision %llx/%llx (%s) "
1335 "vs %llx/%llx (%s)\n",
1336 (unsigned long long)offset,
1337 (unsigned long long)int128_get64(subregion->size),
1338 subregion->name,
1339 (unsigned long long)other->addr,
1340 (unsigned long long)int128_get64(other->size),
1341 other->name);
1342 #endif
1343 }
1344 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1345 if (subregion->priority >= other->priority) {
1346 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1347 goto done;
1348 }
1349 }
1350 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1351 done:
1352 memory_region_update_pending |= mr->enabled && subregion->enabled;
1353 memory_region_transaction_commit();
1354 }
1355
1356
1357 void memory_region_add_subregion(MemoryRegion *mr,
1358 hwaddr offset,
1359 MemoryRegion *subregion)
1360 {
1361 subregion->may_overlap = false;
1362 subregion->priority = 0;
1363 memory_region_add_subregion_common(mr, offset, subregion);
1364 }
1365
1366 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1367 hwaddr offset,
1368 MemoryRegion *subregion,
1369 unsigned priority)
1370 {
1371 subregion->may_overlap = true;
1372 subregion->priority = priority;
1373 memory_region_add_subregion_common(mr, offset, subregion);
1374 }
1375
1376 void memory_region_del_subregion(MemoryRegion *mr,
1377 MemoryRegion *subregion)
1378 {
1379 memory_region_transaction_begin();
1380 assert(subregion->parent == mr);
1381 subregion->parent = NULL;
1382 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1383 memory_region_update_pending |= mr->enabled && subregion->enabled;
1384 memory_region_transaction_commit();
1385 }
1386
1387 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1388 {
1389 if (enabled == mr->enabled) {
1390 return;
1391 }
1392 memory_region_transaction_begin();
1393 mr->enabled = enabled;
1394 memory_region_update_pending = true;
1395 memory_region_transaction_commit();
1396 }
1397
1398 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1399 {
1400 MemoryRegion *parent = mr->parent;
1401 unsigned priority = mr->priority;
1402 bool may_overlap = mr->may_overlap;
1403
1404 if (addr == mr->addr || !parent) {
1405 mr->addr = addr;
1406 return;
1407 }
1408
1409 memory_region_transaction_begin();
1410 memory_region_del_subregion(parent, mr);
1411 if (may_overlap) {
1412 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1413 } else {
1414 memory_region_add_subregion(parent, addr, mr);
1415 }
1416 memory_region_transaction_commit();
1417 }
1418
1419 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1420 {
1421 assert(mr->alias);
1422
1423 if (offset == mr->alias_offset) {
1424 return;
1425 }
1426
1427 memory_region_transaction_begin();
1428 mr->alias_offset = offset;
1429 memory_region_update_pending |= mr->enabled;
1430 memory_region_transaction_commit();
1431 }
1432
1433 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1434 {
1435 return mr->ram_addr;
1436 }
1437
1438 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1439 {
1440 const AddrRange *addr = addr_;
1441 const FlatRange *fr = fr_;
1442
1443 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1444 return -1;
1445 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1446 return 1;
1447 }
1448 return 0;
1449 }
1450
1451 static FlatRange *address_space_lookup(AddressSpace *as, AddrRange addr)
1452 {
1453 return bsearch(&addr, as->current_map->ranges, as->current_map->nr,
1454 sizeof(FlatRange), cmp_flatrange_addr);
1455 }
1456
1457 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1458 hwaddr addr, uint64_t size)
1459 {
1460 MemoryRegionSection ret = { .mr = NULL, .size = 0 };
1461 MemoryRegion *root;
1462 AddressSpace *as;
1463 AddrRange range;
1464 FlatRange *fr;
1465
1466 addr += mr->addr;
1467 for (root = mr; root->parent; ) {
1468 root = root->parent;
1469 addr += root->addr;
1470 }
1471
1472 as = memory_region_to_address_space(root);
1473 range = addrrange_make(int128_make64(addr), int128_make64(size));
1474 fr = address_space_lookup(as, range);
1475 if (!fr) {
1476 return ret;
1477 }
1478
1479 while (fr > as->current_map->ranges
1480 && addrrange_intersects(fr[-1].addr, range)) {
1481 --fr;
1482 }
1483
1484 ret.mr = fr->mr;
1485 ret.address_space = as;
1486 range = addrrange_intersection(range, fr->addr);
1487 ret.offset_within_region = fr->offset_in_region;
1488 ret.offset_within_region += int128_get64(int128_sub(range.start,
1489 fr->addr.start));
1490 ret.size = int128_get64(range.size);
1491 ret.offset_within_address_space = int128_get64(range.start);
1492 ret.readonly = fr->readonly;
1493 return ret;
1494 }
1495
1496 void address_space_sync_dirty_bitmap(AddressSpace *as)
1497 {
1498 FlatRange *fr;
1499
1500 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1501 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1502 }
1503 }
1504
1505 void memory_global_dirty_log_start(void)
1506 {
1507 global_dirty_log = true;
1508 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1509 }
1510
1511 void memory_global_dirty_log_stop(void)
1512 {
1513 global_dirty_log = false;
1514 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1515 }
1516
1517 static void listener_add_address_space(MemoryListener *listener,
1518 AddressSpace *as)
1519 {
1520 FlatRange *fr;
1521
1522 if (listener->address_space_filter
1523 && listener->address_space_filter != as) {
1524 return;
1525 }
1526
1527 if (global_dirty_log) {
1528 if (listener->log_global_start) {
1529 listener->log_global_start(listener);
1530 }
1531 }
1532
1533 FOR_EACH_FLAT_RANGE(fr, as->current_map) {
1534 MemoryRegionSection section = {
1535 .mr = fr->mr,
1536 .address_space = as,
1537 .offset_within_region = fr->offset_in_region,
1538 .size = int128_get64(fr->addr.size),
1539 .offset_within_address_space = int128_get64(fr->addr.start),
1540 .readonly = fr->readonly,
1541 };
1542 if (listener->region_add) {
1543 listener->region_add(listener, &section);
1544 }
1545 }
1546 }
1547
1548 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1549 {
1550 MemoryListener *other = NULL;
1551 AddressSpace *as;
1552
1553 listener->address_space_filter = filter;
1554 if (QTAILQ_EMPTY(&memory_listeners)
1555 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1556 memory_listeners)->priority) {
1557 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1558 } else {
1559 QTAILQ_FOREACH(other, &memory_listeners, link) {
1560 if (listener->priority < other->priority) {
1561 break;
1562 }
1563 }
1564 QTAILQ_INSERT_BEFORE(other, listener, link);
1565 }
1566
1567 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1568 listener_add_address_space(listener, as);
1569 }
1570 }
1571
1572 void memory_listener_unregister(MemoryListener *listener)
1573 {
1574 QTAILQ_REMOVE(&memory_listeners, listener, link);
1575 }
1576
1577 void address_space_init(AddressSpace *as, MemoryRegion *root)
1578 {
1579 memory_region_transaction_begin();
1580 as->root = root;
1581 as->current_map = g_new(FlatView, 1);
1582 flatview_init(as->current_map);
1583 as->ioeventfd_nb = 0;
1584 as->ioeventfds = NULL;
1585 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1586 as->name = NULL;
1587 address_space_init_dispatch(as);
1588 memory_region_update_pending |= root->enabled;
1589 memory_region_transaction_commit();
1590 }
1591
1592 void address_space_destroy(AddressSpace *as)
1593 {
1594 /* Flush out anything from MemoryListeners listening in on this */
1595 memory_region_transaction_begin();
1596 as->root = NULL;
1597 memory_region_transaction_commit();
1598 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1599 address_space_destroy_dispatch(as);
1600 flatview_destroy(as->current_map);
1601 g_free(as->current_map);
1602 g_free(as->ioeventfds);
1603 }
1604
1605 uint64_t io_mem_read(MemoryRegion *mr, hwaddr addr, unsigned size)
1606 {
1607 return memory_region_dispatch_read(mr, addr, size);
1608 }
1609
1610 void io_mem_write(MemoryRegion *mr, hwaddr addr,
1611 uint64_t val, unsigned size)
1612 {
1613 memory_region_dispatch_write(mr, addr, val, size);
1614 }
1615
1616 typedef struct MemoryRegionList MemoryRegionList;
1617
1618 struct MemoryRegionList {
1619 const MemoryRegion *mr;
1620 bool printed;
1621 QTAILQ_ENTRY(MemoryRegionList) queue;
1622 };
1623
1624 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1625
1626 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1627 const MemoryRegion *mr, unsigned int level,
1628 hwaddr base,
1629 MemoryRegionListHead *alias_print_queue)
1630 {
1631 MemoryRegionList *new_ml, *ml, *next_ml;
1632 MemoryRegionListHead submr_print_queue;
1633 const MemoryRegion *submr;
1634 unsigned int i;
1635
1636 if (!mr || !mr->enabled) {
1637 return;
1638 }
1639
1640 for (i = 0; i < level; i++) {
1641 mon_printf(f, " ");
1642 }
1643
1644 if (mr->alias) {
1645 MemoryRegionList *ml;
1646 bool found = false;
1647
1648 /* check if the alias is already in the queue */
1649 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1650 if (ml->mr == mr->alias && !ml->printed) {
1651 found = true;
1652 }
1653 }
1654
1655 if (!found) {
1656 ml = g_new(MemoryRegionList, 1);
1657 ml->mr = mr->alias;
1658 ml->printed = false;
1659 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1660 }
1661 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1662 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1663 "-" TARGET_FMT_plx "\n",
1664 base + mr->addr,
1665 base + mr->addr
1666 + (hwaddr)int128_get64(mr->size) - 1,
1667 mr->priority,
1668 mr->romd_mode ? 'R' : '-',
1669 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1670 : '-',
1671 mr->name,
1672 mr->alias->name,
1673 mr->alias_offset,
1674 mr->alias_offset
1675 + (hwaddr)int128_get64(mr->size) - 1);
1676 } else {
1677 mon_printf(f,
1678 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1679 base + mr->addr,
1680 base + mr->addr
1681 + (hwaddr)int128_get64(mr->size) - 1,
1682 mr->priority,
1683 mr->romd_mode ? 'R' : '-',
1684 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1685 : '-',
1686 mr->name);
1687 }
1688
1689 QTAILQ_INIT(&submr_print_queue);
1690
1691 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1692 new_ml = g_new(MemoryRegionList, 1);
1693 new_ml->mr = submr;
1694 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1695 if (new_ml->mr->addr < ml->mr->addr ||
1696 (new_ml->mr->addr == ml->mr->addr &&
1697 new_ml->mr->priority > ml->mr->priority)) {
1698 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1699 new_ml = NULL;
1700 break;
1701 }
1702 }
1703 if (new_ml) {
1704 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1705 }
1706 }
1707
1708 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1709 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1710 alias_print_queue);
1711 }
1712
1713 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1714 g_free(ml);
1715 }
1716 }
1717
1718 void mtree_info(fprintf_function mon_printf, void *f)
1719 {
1720 MemoryRegionListHead ml_head;
1721 MemoryRegionList *ml, *ml2;
1722 AddressSpace *as;
1723
1724 QTAILQ_INIT(&ml_head);
1725
1726 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1727 if (!as->name) {
1728 continue;
1729 }
1730 mon_printf(f, "%s\n", as->name);
1731 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1732 }
1733
1734 mon_printf(f, "aliases\n");
1735 /* print aliased regions */
1736 QTAILQ_FOREACH(ml, &ml_head, queue) {
1737 if (!ml->printed) {
1738 mon_printf(f, "%s\n", ml->mr->name);
1739 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1740 }
1741 }
1742
1743 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1744 g_free(ml);
1745 }
1746 }
AR7 emulation for QEMU