4 * Copyright (c) 2006 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License version 2 as published by the Free Software Foundation.
10 * This library is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * Lesser General Public License for more details.
15 * You should have received a copy of the GNU Lesser General Public
16 * License along with this library; if not, see <http://www.gnu.org/licenses/>
18 * Contributions after 2012-01-13 are licensed under the terms of the
19 * GNU GPL, version 2 or (at your option) any later version.
22 #include "qemu/osdep.h"
23 #include "hw/i386/pc.h"
25 #include "hw/isa/apm.h"
26 #include "hw/i2c/pm_smbus.h"
27 #include "hw/pci/pci.h"
28 #include "hw/qdev-properties.h"
29 #include "hw/acpi/acpi.h"
30 #include "sysemu/runstate.h"
31 #include "sysemu/sysemu.h"
32 #include "qapi/error.h"
33 #include "qemu/range.h"
34 #include "exec/address-spaces.h"
35 #include "hw/acpi/piix4.h"
36 #include "hw/acpi/pcihp.h"
37 #include "hw/acpi/cpu_hotplug.h"
38 #include "hw/acpi/cpu.h"
39 #include "hw/hotplug.h"
40 #include "hw/mem/pc-dimm.h"
41 #include "hw/acpi/memory_hotplug.h"
42 #include "hw/acpi/acpi_dev_interface.h"
43 #include "hw/xen/xen.h"
44 #include "migration/qemu-file-types.h"
45 #include "migration/vmstate.h"
46 #include "hw/core/cpu.h"
49 #define GPE_BASE 0xafe0
53 uint32_t up
; /* deprecated, maintained for migration compatibility */
57 typedef struct PIIX4PMState
{
76 Notifier machine_ready
;
77 Notifier powerdown_notifier
;
79 AcpiPciHpState acpi_pci_hotplug
;
80 bool use_acpi_pci_hotplug
;
86 bool cpu_hotplug_legacy
;
87 AcpiCpuHotplug gpe_cpu
;
88 CPUHotplugState cpuhp_state
;
90 MemHotplugState acpi_memory_hotplug
;
93 #define PIIX4_PM(obj) \
94 OBJECT_CHECK(PIIX4PMState, (obj), TYPE_PIIX4_PM)
96 static void piix4_acpi_system_hot_add_init(MemoryRegion
*parent
,
97 PCIBus
*bus
, PIIX4PMState
*s
);
99 #define ACPI_ENABLE 0xf1
100 #define ACPI_DISABLE 0xf0
102 static void pm_tmr_timer(ACPIREGS
*ar
)
104 PIIX4PMState
*s
= container_of(ar
, PIIX4PMState
, ar
);
105 acpi_update_sci(&s
->ar
, s
->irq
);
108 static void apm_ctrl_changed(uint32_t val
, void *arg
)
110 PIIX4PMState
*s
= arg
;
111 PCIDevice
*d
= PCI_DEVICE(s
);
113 /* ACPI specs 3.0, 4.7.2.5 */
114 acpi_pm1_cnt_update(&s
->ar
, val
== ACPI_ENABLE
, val
== ACPI_DISABLE
);
115 if (val
== ACPI_ENABLE
|| val
== ACPI_DISABLE
) {
119 if (d
->config
[0x5b] & (1 << 1)) {
121 qemu_irq_raise(s
->smi_irq
);
126 static void pm_io_space_update(PIIX4PMState
*s
)
128 PCIDevice
*d
= PCI_DEVICE(s
);
130 s
->io_base
= le32_to_cpu(*(uint32_t *)(d
->config
+ 0x40));
131 s
->io_base
&= 0xffc0;
133 memory_region_transaction_begin();
134 memory_region_set_enabled(&s
->io
, d
->config
[0x80] & 1);
135 memory_region_set_address(&s
->io
, s
->io_base
);
136 memory_region_transaction_commit();
139 static void smbus_io_space_update(PIIX4PMState
*s
)
141 PCIDevice
*d
= PCI_DEVICE(s
);
143 s
->smb_io_base
= le32_to_cpu(*(uint32_t *)(d
->config
+ 0x90));
144 s
->smb_io_base
&= 0xffc0;
146 memory_region_transaction_begin();
147 memory_region_set_enabled(&s
->smb
.io
, d
->config
[0xd2] & 1);
148 memory_region_set_address(&s
->smb
.io
, s
->smb_io_base
);
149 memory_region_transaction_commit();
152 static void pm_write_config(PCIDevice
*d
,
153 uint32_t address
, uint32_t val
, int len
)
155 pci_default_write_config(d
, address
, val
, len
);
156 if (range_covers_byte(address
, len
, 0x80) ||
157 ranges_overlap(address
, len
, 0x40, 4)) {
158 pm_io_space_update((PIIX4PMState
*)d
);
160 if (range_covers_byte(address
, len
, 0xd2) ||
161 ranges_overlap(address
, len
, 0x90, 4)) {
162 smbus_io_space_update((PIIX4PMState
*)d
);
166 static int vmstate_acpi_post_load(void *opaque
, int version_id
)
168 PIIX4PMState
*s
= opaque
;
170 pm_io_space_update(s
);
171 smbus_io_space_update(s
);
175 #define VMSTATE_GPE_ARRAY(_field, _state) \
177 .name = (stringify(_field)), \
179 .info = &vmstate_info_uint16, \
180 .size = sizeof(uint16_t), \
181 .flags = VMS_SINGLE | VMS_POINTER, \
182 .offset = vmstate_offset_pointer(_state, _field, uint8_t), \
185 static const VMStateDescription vmstate_gpe
= {
188 .minimum_version_id
= 1,
189 .fields
= (VMStateField
[]) {
190 VMSTATE_GPE_ARRAY(sts
, ACPIGPE
),
191 VMSTATE_GPE_ARRAY(en
, ACPIGPE
),
192 VMSTATE_END_OF_LIST()
196 static const VMStateDescription vmstate_pci_status
= {
197 .name
= "pci_status",
199 .minimum_version_id
= 1,
200 .fields
= (VMStateField
[]) {
201 VMSTATE_UINT32(up
, struct AcpiPciHpPciStatus
),
202 VMSTATE_UINT32(down
, struct AcpiPciHpPciStatus
),
203 VMSTATE_END_OF_LIST()
207 static int acpi_load_old(QEMUFile
*f
, void *opaque
, int version_id
)
209 PIIX4PMState
*s
= opaque
;
213 ret
= pci_device_load(PCI_DEVICE(s
), f
);
217 qemu_get_be16s(f
, &s
->ar
.pm1
.evt
.sts
);
218 qemu_get_be16s(f
, &s
->ar
.pm1
.evt
.en
);
219 qemu_get_be16s(f
, &s
->ar
.pm1
.cnt
.cnt
);
221 ret
= vmstate_load_state(f
, &vmstate_apm
, &s
->apm
, 1);
226 timer_get(f
, s
->ar
.tmr
.timer
);
227 qemu_get_sbe64s(f
, &s
->ar
.tmr
.overflow_time
);
229 qemu_get_be16s(f
, (uint16_t *)s
->ar
.gpe
.sts
);
230 for (i
= 0; i
< 3; i
++) {
231 qemu_get_be16s(f
, &temp
);
234 qemu_get_be16s(f
, (uint16_t *)s
->ar
.gpe
.en
);
235 for (i
= 0; i
< 3; i
++) {
236 qemu_get_be16s(f
, &temp
);
239 ret
= vmstate_load_state(f
, &vmstate_pci_status
,
240 &s
->acpi_pci_hotplug
.acpi_pcihp_pci_status
[ACPI_PCIHP_BSEL_DEFAULT
], 1);
244 static bool vmstate_test_use_acpi_pci_hotplug(void *opaque
, int version_id
)
246 PIIX4PMState
*s
= opaque
;
247 return s
->use_acpi_pci_hotplug
;
250 static bool vmstate_test_no_use_acpi_pci_hotplug(void *opaque
, int version_id
)
252 PIIX4PMState
*s
= opaque
;
253 return !s
->use_acpi_pci_hotplug
;
256 static bool vmstate_test_use_memhp(void *opaque
)
258 PIIX4PMState
*s
= opaque
;
259 return s
->acpi_memory_hotplug
.is_enabled
;
262 static const VMStateDescription vmstate_memhp_state
= {
263 .name
= "piix4_pm/memhp",
265 .minimum_version_id
= 1,
266 .minimum_version_id_old
= 1,
267 .needed
= vmstate_test_use_memhp
,
268 .fields
= (VMStateField
[]) {
269 VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug
, PIIX4PMState
),
270 VMSTATE_END_OF_LIST()
274 static bool vmstate_test_use_cpuhp(void *opaque
)
276 PIIX4PMState
*s
= opaque
;
277 return !s
->cpu_hotplug_legacy
;
280 static int vmstate_cpuhp_pre_load(void *opaque
)
282 Object
*obj
= OBJECT(opaque
);
283 object_property_set_bool(obj
, false, "cpu-hotplug-legacy", &error_abort
);
287 static const VMStateDescription vmstate_cpuhp_state
= {
288 .name
= "piix4_pm/cpuhp",
290 .minimum_version_id
= 1,
291 .minimum_version_id_old
= 1,
292 .needed
= vmstate_test_use_cpuhp
,
293 .pre_load
= vmstate_cpuhp_pre_load
,
294 .fields
= (VMStateField
[]) {
295 VMSTATE_CPU_HOTPLUG(cpuhp_state
, PIIX4PMState
),
296 VMSTATE_END_OF_LIST()
300 static bool piix4_vmstate_need_smbus(void *opaque
, int version_id
)
302 return pm_smbus_vmstate_needed();
305 /* qemu-kvm 1.2 uses version 3 but advertised as 2
306 * To support incoming qemu-kvm 1.2 migration, change version_id
307 * and minimum_version_id to 2 below (which breaks migration from
311 static const VMStateDescription vmstate_acpi
= {
314 .minimum_version_id
= 3,
315 .minimum_version_id_old
= 1,
316 .load_state_old
= acpi_load_old
,
317 .post_load
= vmstate_acpi_post_load
,
318 .fields
= (VMStateField
[]) {
319 VMSTATE_PCI_DEVICE(parent_obj
, PIIX4PMState
),
320 VMSTATE_UINT16(ar
.pm1
.evt
.sts
, PIIX4PMState
),
321 VMSTATE_UINT16(ar
.pm1
.evt
.en
, PIIX4PMState
),
322 VMSTATE_UINT16(ar
.pm1
.cnt
.cnt
, PIIX4PMState
),
323 VMSTATE_STRUCT(apm
, PIIX4PMState
, 0, vmstate_apm
, APMState
),
324 VMSTATE_STRUCT_TEST(smb
, PIIX4PMState
, piix4_vmstate_need_smbus
, 3,
325 pmsmb_vmstate
, PMSMBus
),
326 VMSTATE_TIMER_PTR(ar
.tmr
.timer
, PIIX4PMState
),
327 VMSTATE_INT64(ar
.tmr
.overflow_time
, PIIX4PMState
),
328 VMSTATE_STRUCT(ar
.gpe
, PIIX4PMState
, 2, vmstate_gpe
, ACPIGPE
),
330 acpi_pci_hotplug
.acpi_pcihp_pci_status
[ACPI_PCIHP_BSEL_DEFAULT
],
332 vmstate_test_no_use_acpi_pci_hotplug
,
333 2, vmstate_pci_status
,
334 struct AcpiPciHpPciStatus
),
335 VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug
, PIIX4PMState
,
336 vmstate_test_use_acpi_pci_hotplug
),
337 VMSTATE_END_OF_LIST()
339 .subsections
= (const VMStateDescription
*[]) {
340 &vmstate_memhp_state
,
341 &vmstate_cpuhp_state
,
346 static void piix4_pm_reset(DeviceState
*dev
)
348 PIIX4PMState
*s
= PIIX4_PM(dev
);
349 PCIDevice
*d
= PCI_DEVICE(s
);
350 uint8_t *pci_conf
= d
->config
;
357 pci_conf
[0x40] = 0x01; /* PM io base read only bit */
360 if (!s
->smm_enabled
) {
361 /* Mark SMM as already inited (until KVM supports SMM). */
362 pci_conf
[0x5B] = 0x02;
364 pm_io_space_update(s
);
365 acpi_pcihp_reset(&s
->acpi_pci_hotplug
);
368 static void piix4_pm_powerdown_req(Notifier
*n
, void *opaque
)
370 PIIX4PMState
*s
= container_of(n
, PIIX4PMState
, powerdown_notifier
);
373 acpi_pm1_evt_power_down(&s
->ar
);
376 static void piix4_device_pre_plug_cb(HotplugHandler
*hotplug_dev
,
377 DeviceState
*dev
, Error
**errp
)
379 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
381 if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
382 acpi_pcihp_device_pre_plug_cb(hotplug_dev
, dev
, errp
);
383 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
384 if (!s
->acpi_memory_hotplug
.is_enabled
) {
386 "memory hotplug is not enabled: %s.memory-hotplug-support "
387 "is not set", object_get_typename(OBJECT(s
)));
390 !object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
391 error_setg(errp
, "acpi: device pre plug request for not supported"
392 " device type: %s", object_get_typename(OBJECT(dev
)));
396 static void piix4_device_plug_cb(HotplugHandler
*hotplug_dev
,
397 DeviceState
*dev
, Error
**errp
)
399 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
401 if (object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
402 if (object_dynamic_cast(OBJECT(dev
), TYPE_NVDIMM
)) {
403 nvdimm_acpi_plug_cb(hotplug_dev
, dev
);
405 acpi_memory_plug_cb(hotplug_dev
, &s
->acpi_memory_hotplug
,
408 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
409 acpi_pcihp_device_plug_cb(hotplug_dev
, &s
->acpi_pci_hotplug
, dev
, errp
);
410 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
)) {
411 if (s
->cpu_hotplug_legacy
) {
412 legacy_acpi_cpu_plug_cb(hotplug_dev
, &s
->gpe_cpu
, dev
, errp
);
414 acpi_cpu_plug_cb(hotplug_dev
, &s
->cpuhp_state
, dev
, errp
);
417 g_assert_not_reached();
421 static void piix4_device_unplug_request_cb(HotplugHandler
*hotplug_dev
,
422 DeviceState
*dev
, Error
**errp
)
424 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
426 if (s
->acpi_memory_hotplug
.is_enabled
&&
427 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
428 acpi_memory_unplug_request_cb(hotplug_dev
, &s
->acpi_memory_hotplug
,
430 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
431 acpi_pcihp_device_unplug_request_cb(hotplug_dev
, &s
->acpi_pci_hotplug
,
433 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
) &&
434 !s
->cpu_hotplug_legacy
) {
435 acpi_cpu_unplug_request_cb(hotplug_dev
, &s
->cpuhp_state
, dev
, errp
);
437 error_setg(errp
, "acpi: device unplug request for not supported device"
438 " type: %s", object_get_typename(OBJECT(dev
)));
442 static void piix4_device_unplug_cb(HotplugHandler
*hotplug_dev
,
443 DeviceState
*dev
, Error
**errp
)
445 PIIX4PMState
*s
= PIIX4_PM(hotplug_dev
);
447 if (s
->acpi_memory_hotplug
.is_enabled
&&
448 object_dynamic_cast(OBJECT(dev
), TYPE_PC_DIMM
)) {
449 acpi_memory_unplug_cb(&s
->acpi_memory_hotplug
, dev
, errp
);
450 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_PCI_DEVICE
)) {
451 acpi_pcihp_device_unplug_cb(hotplug_dev
, &s
->acpi_pci_hotplug
, dev
,
453 } else if (object_dynamic_cast(OBJECT(dev
), TYPE_CPU
) &&
454 !s
->cpu_hotplug_legacy
) {
455 acpi_cpu_unplug_cb(&s
->cpuhp_state
, dev
, errp
);
457 error_setg(errp
, "acpi: device unplug for not supported device"
458 " type: %s", object_get_typename(OBJECT(dev
)));
462 static void piix4_pm_machine_ready(Notifier
*n
, void *opaque
)
464 PIIX4PMState
*s
= container_of(n
, PIIX4PMState
, machine_ready
);
465 PCIDevice
*d
= PCI_DEVICE(s
);
466 MemoryRegion
*io_as
= pci_address_space_io(d
);
469 pci_conf
= d
->config
;
470 pci_conf
[0x5f] = 0x10 |
471 (memory_region_present(io_as
, 0x378) ? 0x80 : 0);
472 pci_conf
[0x63] = 0x60;
473 pci_conf
[0x67] = (memory_region_present(io_as
, 0x3f8) ? 0x08 : 0) |
474 (memory_region_present(io_as
, 0x2f8) ? 0x90 : 0);
477 static void piix4_pm_add_propeties(PIIX4PMState
*s
)
479 static const uint8_t acpi_enable_cmd
= ACPI_ENABLE
;
480 static const uint8_t acpi_disable_cmd
= ACPI_DISABLE
;
481 static const uint32_t gpe0_blk
= GPE_BASE
;
482 static const uint32_t gpe0_blk_len
= GPE_LEN
;
483 static const uint16_t sci_int
= 9;
485 object_property_add_uint8_ptr(OBJECT(s
), ACPI_PM_PROP_ACPI_ENABLE_CMD
,
486 &acpi_enable_cmd
, NULL
);
487 object_property_add_uint8_ptr(OBJECT(s
), ACPI_PM_PROP_ACPI_DISABLE_CMD
,
488 &acpi_disable_cmd
, NULL
);
489 object_property_add_uint32_ptr(OBJECT(s
), ACPI_PM_PROP_GPE0_BLK
,
491 object_property_add_uint32_ptr(OBJECT(s
), ACPI_PM_PROP_GPE0_BLK_LEN
,
492 &gpe0_blk_len
, NULL
);
493 object_property_add_uint16_ptr(OBJECT(s
), ACPI_PM_PROP_SCI_INT
,
495 object_property_add_uint32_ptr(OBJECT(s
), ACPI_PM_PROP_PM_IO_BASE
,
499 static void piix4_pm_realize(PCIDevice
*dev
, Error
**errp
)
501 PIIX4PMState
*s
= PIIX4_PM(dev
);
504 pci_conf
= dev
->config
;
505 pci_conf
[0x06] = 0x80;
506 pci_conf
[0x07] = 0x02;
507 pci_conf
[0x09] = 0x00;
508 pci_conf
[0x3d] = 0x01; // interrupt pin 1
511 apm_init(dev
, &s
->apm
, apm_ctrl_changed
, s
);
513 if (!s
->smm_enabled
) {
514 /* Mark SMM as already inited to prevent SMM from running. KVM does not
515 * support SMM mode. */
516 pci_conf
[0x5B] = 0x02;
519 /* XXX: which specification is used ? The i82731AB has different
521 pci_conf
[0x90] = s
->smb_io_base
| 1;
522 pci_conf
[0x91] = s
->smb_io_base
>> 8;
523 pci_conf
[0xd2] = 0x09;
524 pm_smbus_init(DEVICE(dev
), &s
->smb
, true);
525 memory_region_set_enabled(&s
->smb
.io
, pci_conf
[0xd2] & 1);
526 memory_region_add_subregion(pci_address_space_io(dev
),
527 s
->smb_io_base
, &s
->smb
.io
);
529 memory_region_init(&s
->io
, OBJECT(s
), "piix4-pm", 64);
530 memory_region_set_enabled(&s
->io
, false);
531 memory_region_add_subregion(pci_address_space_io(dev
),
534 acpi_pm_tmr_init(&s
->ar
, pm_tmr_timer
, &s
->io
);
535 acpi_pm1_evt_init(&s
->ar
, pm_tmr_timer
, &s
->io
);
536 acpi_pm1_cnt_init(&s
->ar
, &s
->io
, s
->disable_s3
, s
->disable_s4
, s
->s4_val
);
537 acpi_gpe_init(&s
->ar
, GPE_LEN
);
539 s
->powerdown_notifier
.notify
= piix4_pm_powerdown_req
;
540 qemu_register_powerdown_notifier(&s
->powerdown_notifier
);
542 s
->machine_ready
.notify
= piix4_pm_machine_ready
;
543 qemu_add_machine_init_done_notifier(&s
->machine_ready
);
545 piix4_acpi_system_hot_add_init(pci_address_space_io(dev
),
546 pci_get_bus(dev
), s
);
547 qbus_set_hotplug_handler(BUS(pci_get_bus(dev
)), OBJECT(s
), &error_abort
);
549 piix4_pm_add_propeties(s
);
552 I2CBus
*piix4_pm_init(PCIBus
*bus
, int devfn
, uint32_t smb_io_base
,
553 qemu_irq sci_irq
, qemu_irq smi_irq
,
554 int smm_enabled
, DeviceState
**piix4_pm
)
559 dev
= DEVICE(pci_create(bus
, devfn
, TYPE_PIIX4_PM
));
560 qdev_prop_set_uint32(dev
, "smb_io_base", smb_io_base
);
567 s
->smi_irq
= smi_irq
;
568 s
->smm_enabled
= smm_enabled
;
570 s
->use_acpi_pci_hotplug
= false;
573 qdev_init_nofail(dev
);
578 static uint64_t gpe_readb(void *opaque
, hwaddr addr
, unsigned width
)
580 PIIX4PMState
*s
= opaque
;
581 uint32_t val
= acpi_gpe_ioport_readb(&s
->ar
, addr
);
583 trace_piix4_gpe_readb(addr
, width
, val
);
587 static void gpe_writeb(void *opaque
, hwaddr addr
, uint64_t val
,
590 PIIX4PMState
*s
= opaque
;
592 trace_piix4_gpe_writeb(addr
, width
, val
);
593 acpi_gpe_ioport_writeb(&s
->ar
, addr
, val
);
594 acpi_update_sci(&s
->ar
, s
->irq
);
597 static const MemoryRegionOps piix4_gpe_ops
= {
600 .valid
.min_access_size
= 1,
601 .valid
.max_access_size
= 4,
602 .impl
.min_access_size
= 1,
603 .impl
.max_access_size
= 1,
604 .endianness
= DEVICE_LITTLE_ENDIAN
,
608 static bool piix4_get_cpu_hotplug_legacy(Object
*obj
, Error
**errp
)
610 PIIX4PMState
*s
= PIIX4_PM(obj
);
612 return s
->cpu_hotplug_legacy
;
615 static void piix4_set_cpu_hotplug_legacy(Object
*obj
, bool value
, Error
**errp
)
617 PIIX4PMState
*s
= PIIX4_PM(obj
);
620 if (s
->cpu_hotplug_legacy
&& value
== false) {
621 acpi_switch_to_modern_cphp(&s
->gpe_cpu
, &s
->cpuhp_state
,
622 PIIX4_CPU_HOTPLUG_IO_BASE
);
624 s
->cpu_hotplug_legacy
= value
;
627 static void piix4_acpi_system_hot_add_init(MemoryRegion
*parent
,
628 PCIBus
*bus
, PIIX4PMState
*s
)
630 memory_region_init_io(&s
->io_gpe
, OBJECT(s
), &piix4_gpe_ops
, s
,
631 "acpi-gpe0", GPE_LEN
);
632 memory_region_add_subregion(parent
, GPE_BASE
, &s
->io_gpe
);
634 acpi_pcihp_init(OBJECT(s
), &s
->acpi_pci_hotplug
, bus
, parent
,
635 s
->use_acpi_pci_hotplug
);
637 s
->cpu_hotplug_legacy
= true;
638 object_property_add_bool(OBJECT(s
), "cpu-hotplug-legacy",
639 piix4_get_cpu_hotplug_legacy
,
640 piix4_set_cpu_hotplug_legacy
,
642 legacy_acpi_cpu_hotplug_init(parent
, OBJECT(s
), &s
->gpe_cpu
,
643 PIIX4_CPU_HOTPLUG_IO_BASE
);
645 if (s
->acpi_memory_hotplug
.is_enabled
) {
646 acpi_memory_hotplug_init(parent
, OBJECT(s
), &s
->acpi_memory_hotplug
,
647 ACPI_MEMORY_HOTPLUG_BASE
);
651 static void piix4_ospm_status(AcpiDeviceIf
*adev
, ACPIOSTInfoList
***list
)
653 PIIX4PMState
*s
= PIIX4_PM(adev
);
655 acpi_memory_ospm_status(&s
->acpi_memory_hotplug
, list
);
656 if (!s
->cpu_hotplug_legacy
) {
657 acpi_cpu_ospm_status(&s
->cpuhp_state
, list
);
661 static void piix4_send_gpe(AcpiDeviceIf
*adev
, AcpiEventStatusBits ev
)
663 PIIX4PMState
*s
= PIIX4_PM(adev
);
665 acpi_send_gpe_event(&s
->ar
, s
->irq
, ev
);
668 static Property piix4_pm_properties
[] = {
669 DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState
, smb_io_base
, 0),
670 DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED
, PIIX4PMState
, disable_s3
, 0),
671 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED
, PIIX4PMState
, disable_s4
, 0),
672 DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL
, PIIX4PMState
, s4_val
, 2),
673 DEFINE_PROP_BOOL("acpi-pci-hotplug-with-bridge-support", PIIX4PMState
,
674 use_acpi_pci_hotplug
, true),
675 DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState
,
676 acpi_memory_hotplug
.is_enabled
, true),
677 DEFINE_PROP_END_OF_LIST(),
680 static void piix4_pm_class_init(ObjectClass
*klass
, void *data
)
682 DeviceClass
*dc
= DEVICE_CLASS(klass
);
683 PCIDeviceClass
*k
= PCI_DEVICE_CLASS(klass
);
684 HotplugHandlerClass
*hc
= HOTPLUG_HANDLER_CLASS(klass
);
685 AcpiDeviceIfClass
*adevc
= ACPI_DEVICE_IF_CLASS(klass
);
687 k
->realize
= piix4_pm_realize
;
688 k
->config_write
= pm_write_config
;
689 k
->vendor_id
= PCI_VENDOR_ID_INTEL
;
690 k
->device_id
= PCI_DEVICE_ID_INTEL_82371AB_3
;
692 k
->class_id
= PCI_CLASS_BRIDGE_OTHER
;
693 dc
->reset
= piix4_pm_reset
;
695 dc
->vmsd
= &vmstate_acpi
;
696 dc
->props
= piix4_pm_properties
;
698 * Reason: part of PIIX4 southbridge, needs to be wired up,
699 * e.g. by mips_malta_init()
701 dc
->user_creatable
= false;
702 dc
->hotpluggable
= false;
703 hc
->pre_plug
= piix4_device_pre_plug_cb
;
704 hc
->plug
= piix4_device_plug_cb
;
705 hc
->unplug_request
= piix4_device_unplug_request_cb
;
706 hc
->unplug
= piix4_device_unplug_cb
;
707 adevc
->ospm_status
= piix4_ospm_status
;
708 adevc
->send_event
= piix4_send_gpe
;
709 adevc
->madt_cpu
= pc_madt_cpu_entry
;
712 static const TypeInfo piix4_pm_info
= {
713 .name
= TYPE_PIIX4_PM
,
714 .parent
= TYPE_PCI_DEVICE
,
715 .instance_size
= sizeof(PIIX4PMState
),
716 .class_init
= piix4_pm_class_init
,
717 .interfaces
= (InterfaceInfo
[]) {
718 { TYPE_HOTPLUG_HANDLER
},
719 { TYPE_ACPI_DEVICE_IF
},
720 { INTERFACE_CONVENTIONAL_PCI_DEVICE
},
725 static void piix4_pm_register_types(void)
727 type_register_static(&piix4_pm_info
);
730 type_init(piix4_pm_register_types
)