include/hw/i386/pc.h

   1 #ifndef HW_PC_H
   2 #define HW_PC_H
   3
   4 #include "qemu/notify.h"
   5 #include "qapi/qapi-types-common.h"
   6 #include "qemu/uuid.h"
   7 #include "hw/boards.h"
   8 #include "hw/block/fdc.h"
   9 #include "hw/block/flash.h"
  10 #include "hw/i386/x86.h"
  11
  12 #include "hw/acpi/acpi_dev_interface.h"
  13 #include "hw/hotplug.h"
  14 #include "qom/object.h"
  15
  16 #define HPET_INTCAP "hpet-intcap"
  17
  18 /**
  19  * PCMachineState:
  20  * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
  21  * @boot_cpus: number of present VCPUs
  22  * @smp_dies: number of dies per one package
  23  */
  24 typedef struct PCMachineState {
  25     /*< private >*/
  26     X86MachineState parent_obj;
  27
  28     /* <public> */
  29
  30     /* State for other subsystems/APIs: */
  31     Notifier machine_done;
  32
  33     /* Pointers to devices and objects: */
  34     PCIBus *bus;
  35     I2CBus *smbus;
  36     PFlashCFI01 *flash[2];
  37     ISADevice *pcspk;
  38
  39     /* Configuration options: */
  40     uint64_t max_ram_below_4g;
  41     OnOffAuto vmport;
  42
  43     bool acpi_build_enabled;
  44     bool smbus_enabled;
  45     bool sata_enabled;
  46     bool pit_enabled;
  47     bool hpet_enabled;
  48     uint64_t max_fw_size;
  49
  50     /* NUMA information: */
  51     uint64_t numa_nodes;
  52     uint64_t *node_mem;
  53
  54     /* ACPI Memory hotplug IO base address */
  55     hwaddr memhp_io_base;
  56 } PCMachineState;
  57
  58 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
  59 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
  60 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
  61 #define PC_MACHINE_VMPORT           "vmport"
  62 #define PC_MACHINE_SMBUS            "smbus"
  63 #define PC_MACHINE_SATA             "sata"
  64 #define PC_MACHINE_PIT              "pit"
  65 #define PC_MACHINE_MAX_FW_SIZE      "max-fw-size"
  66 /**
  67  * PCMachineClass:
  68  *
  69  * Compat fields:
  70  *
  71  * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
  72  *                        backend's alignment value if provided
  73  * @acpi_data_size: Size of the chunk of memory at the top of RAM
  74  *                  for the BIOS ACPI tables and other BIOS
  75  *                  datastructures.
  76  * @gigabyte_align: Make sure that guest addresses aligned at
  77  *                  1Gbyte boundaries get mapped to host
  78  *                  addresses aligned at 1Gbyte boundaries. This
  79  *                  way we can use 1GByte pages in the host.
  80  *
  81  */
  82 struct PCMachineClass {
  83     /*< private >*/
  84     X86MachineClass parent_class;
  85
  86     /*< public >*/
  87
  88     /* Device configuration: */
  89     bool pci_enabled;
  90     bool kvmclock_enabled;
  91     const char *default_nic_model;
  92
  93     /* Compat options: */
  94
  95     /* Default CPU model version.  See x86_cpu_set_default_version(). */
  96     int default_cpu_version;
  97
  98     /* ACPI compat: */
  99     bool has_acpi_build;
 100     bool rsdp_in_ram;
 101     int legacy_acpi_table_size;
 102     unsigned acpi_data_size;
 103     bool do_not_add_smb_acpi;
 104     int pci_root_uid;
 105
 106     /* SMBIOS compat: */
 107     bool smbios_defaults;
 108     bool smbios_legacy_mode;
 109     bool smbios_uuid_encoded;
 110
 111     /* RAM / address space compat: */
 112     bool gigabyte_align;
 113     bool has_reserved_memory;
 114     bool enforce_aligned_dimm;
 115     bool broken_reserved_end;
 116
 117     /* generate legacy CPU hotplug AML */
 118     bool legacy_cpu_hotplug;
 119
 120     /* use DMA capable linuxboot option rom */
 121     bool linuxboot_dma_enabled;
 122
 123     /* use PVH to load kernels that support this feature */
 124     bool pvh_enabled;
 125
 126     /* create kvmclock device even when KVM PV features are not exposed */
 127     bool kvmclock_create_always;
 128 };
 129
 130 #define TYPE_PC_MACHINE "generic-pc-machine"
 131 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
 132
 133 /* ioapic.c */
 134
 135 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
 136
 137 /* pc.c */
 138 extern int fd_bootchk;
 139
 140 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
 141
 142 void pc_smp_parse(MachineState *ms, QemuOpts *opts);
 143
 144 void pc_guest_info_init(PCMachineState *pcms);
 145
 146 #define PCI_HOST_PROP_PCI_HOLE_START   "pci-hole-start"
 147 #define PCI_HOST_PROP_PCI_HOLE_END     "pci-hole-end"
 148 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
 149 #define PCI_HOST_PROP_PCI_HOLE64_END   "pci-hole64-end"
 150 #define PCI_HOST_PROP_PCI_HOLE64_SIZE  "pci-hole64-size"
 151 #define PCI_HOST_BELOW_4G_MEM_SIZE     "below-4g-mem-size"
 152 #define PCI_HOST_ABOVE_4G_MEM_SIZE     "above-4g-mem-size"
 153
 154
 155 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
 156                             MemoryRegion *pci_address_space);
 157
 158 void xen_load_linux(PCMachineState *pcms);
 159 void pc_memory_init(PCMachineState *pcms,
 160                     MemoryRegion *system_memory,
 161                     MemoryRegion *rom_memory,
 162                     MemoryRegion **ram_memory);
 163 uint64_t pc_pci_hole64_start(void);
 164 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
 165 void pc_basic_device_init(struct PCMachineState *pcms,
 166                           ISABus *isa_bus, qemu_irq *gsi,
 167                           ISADevice **rtc_state,
 168                           bool create_fdctrl,
 169                           uint32_t hpet_irqs);
 170 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd);
 171 void pc_cmos_init(PCMachineState *pcms,
 172                   BusState *ide0, BusState *ide1,
 173                   ISADevice *s);
 174 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
 175 void pc_pci_device_init(PCIBus *pci_bus);
 176
 177 typedef void (*cpu_set_smm_t)(int smm, void *arg);
 178
 179 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
 180
 181 ISADevice *pc_find_fdc0(void);
 182
 183 /* port92.c */
 184 #define PORT92_A20_LINE "a20"
 185
 186 #define TYPE_PORT92 "port92"
 187
 188 /* pc_sysfw.c */
 189 void pc_system_flash_create(PCMachineState *pcms);
 190 void pc_system_flash_cleanup_unused(PCMachineState *pcms);
 191 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
 192 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
 193                                int *data_len);
 194
 195
 196 /* acpi-build.c */
 197 void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
 198                        const CPUArchIdList *apic_ids, GArray *entry);
 199
 200 extern GlobalProperty pc_compat_5_2[];
 201 extern const size_t pc_compat_5_2_len;
 202
 203 extern GlobalProperty pc_compat_5_1[];
 204 extern const size_t pc_compat_5_1_len;
 205
 206 extern GlobalProperty pc_compat_5_0[];
 207 extern const size_t pc_compat_5_0_len;
 208
 209 extern GlobalProperty pc_compat_4_2[];
 210 extern const size_t pc_compat_4_2_len;
 211
 212 extern GlobalProperty pc_compat_4_1[];
 213 extern const size_t pc_compat_4_1_len;
 214
 215 extern GlobalProperty pc_compat_4_0[];
 216 extern const size_t pc_compat_4_0_len;
 217
 218 extern GlobalProperty pc_compat_3_1[];
 219 extern const size_t pc_compat_3_1_len;
 220
 221 extern GlobalProperty pc_compat_3_0[];
 222 extern const size_t pc_compat_3_0_len;
 223
 224 extern GlobalProperty pc_compat_2_12[];
 225 extern const size_t pc_compat_2_12_len;
 226
 227 extern GlobalProperty pc_compat_2_11[];
 228 extern const size_t pc_compat_2_11_len;
 229
 230 extern GlobalProperty pc_compat_2_10[];
 231 extern const size_t pc_compat_2_10_len;
 232
 233 extern GlobalProperty pc_compat_2_9[];
 234 extern const size_t pc_compat_2_9_len;
 235
 236 extern GlobalProperty pc_compat_2_8[];
 237 extern const size_t pc_compat_2_8_len;
 238
 239 extern GlobalProperty pc_compat_2_7[];
 240 extern const size_t pc_compat_2_7_len;
 241
 242 extern GlobalProperty pc_compat_2_6[];
 243 extern const size_t pc_compat_2_6_len;
 244
 245 extern GlobalProperty pc_compat_2_5[];
 246 extern const size_t pc_compat_2_5_len;
 247
 248 extern GlobalProperty pc_compat_2_4[];
 249 extern const size_t pc_compat_2_4_len;
 250
 251 extern GlobalProperty pc_compat_2_3[];
 252 extern const size_t pc_compat_2_3_len;
 253
 254 extern GlobalProperty pc_compat_2_2[];
 255 extern const size_t pc_compat_2_2_len;
 256
 257 extern GlobalProperty pc_compat_2_1[];
 258 extern const size_t pc_compat_2_1_len;
 259
 260 extern GlobalProperty pc_compat_2_0[];
 261 extern const size_t pc_compat_2_0_len;
 262
 263 extern GlobalProperty pc_compat_1_7[];
 264 extern const size_t pc_compat_1_7_len;
 265
 266 extern GlobalProperty pc_compat_1_6[];
 267 extern const size_t pc_compat_1_6_len;
 268
 269 extern GlobalProperty pc_compat_1_5[];
 270 extern const size_t pc_compat_1_5_len;
 271
 272 extern GlobalProperty pc_compat_1_4[];
 273 extern const size_t pc_compat_1_4_len;
 274
 275 /* Helper for setting model-id for CPU models that changed model-id
 276  * depending on QEMU versions up to QEMU 2.4.
 277  */
 278 #define PC_CPU_MODEL_IDS(v) \
 279     { "qemu32-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
 280     { "qemu64-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },\
 281     { "athlon-" TYPE_X86_CPU, "model-id", "QEMU Virtual CPU version " v, },
 282
 283 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
 284     static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
 285     { \
 286         MachineClass *mc = MACHINE_CLASS(oc); \
 287         optsfn(mc); \
 288         mc->init = initfn; \
 289     } \
 290     static const TypeInfo pc_machine_type_##suffix = { \
 291         .name       = namestr TYPE_MACHINE_SUFFIX, \
 292         .parent     = TYPE_PC_MACHINE, \
 293         .class_init = pc_machine_##suffix##_class_init, \
 294     }; \
 295     static void pc_machine_init_##suffix(void) \
 296     { \
 297         type_register(&pc_machine_type_##suffix); \
 298     } \
 299     type_init(pc_machine_init_##suffix)
 300
 301 extern void igd_passthrough_isa_bridge_create(PCIBus *bus, uint16_t gpu_dev_id);
 302 #endif