hw/arm/xlnx-zcu102.c

   1 /*
   2  * Xilinx ZynqMP ZCU102 board
   3  *
   4  * Copyright (C) 2015 Xilinx Inc
   5  * Written by Peter Crosthwaite <peter.crosthwaite@xilinx.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License as published by the
   9  * Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful, but WITHOUT
  13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  15  * for more details.
  16  */
  17
  18 #include "qemu/osdep.h"
  19 #include "qapi/error.h"
  20 #include "qemu-common.h"
  21 #include "cpu.h"
  22 #include "hw/arm/xlnx-zynqmp.h"
  23 #include "hw/boards.h"
  24 #include "qemu/error-report.h"
  25 #include "qemu/log.h"
  26 #include "sysemu/qtest.h"
  27
  28 typedef struct XlnxZCU102 {
  29     MachineState parent_obj;
  30
  31     XlnxZynqMPState soc;
  32     MemoryRegion ddr_ram;
  33
  34     bool secure;
  35     bool virt;
  36 } XlnxZCU102;
  37
  38 #define TYPE_ZCU102_MACHINE   MACHINE_TYPE_NAME("xlnx-zcu102")
  39 #define ZCU102_MACHINE(obj) \
  40     OBJECT_CHECK(XlnxZCU102, (obj), TYPE_ZCU102_MACHINE)
  41
  42 static struct arm_boot_info xlnx_zcu102_binfo;
  43
  44 static bool zcu102_get_secure(Object *obj, Error **errp)
  45 {
  46     XlnxZCU102 *s = ZCU102_MACHINE(obj);
  47
  48     return s->secure;
  49 }
  50
  51 static void zcu102_set_secure(Object *obj, bool value, Error **errp)
  52 {
  53     XlnxZCU102 *s = ZCU102_MACHINE(obj);
  54
  55     s->secure = value;
  56 }
  57
  58 static bool zcu102_get_virt(Object *obj, Error **errp)
  59 {
  60     XlnxZCU102 *s = ZCU102_MACHINE(obj);
  61
  62     return s->virt;
  63 }
  64
  65 static void zcu102_set_virt(Object *obj, bool value, Error **errp)
  66 {
  67     XlnxZCU102 *s = ZCU102_MACHINE(obj);
  68
  69     s->virt = value;
  70 }
  71
  72 static void xlnx_zcu102_init(MachineState *machine)
  73 {
  74     XlnxZCU102 *s = ZCU102_MACHINE(machine);
  75     int i;
  76     uint64_t ram_size = machine->ram_size;
  77
  78     /* Create the memory region to pass to the SoC */
  79     if (ram_size > XLNX_ZYNQMP_MAX_RAM_SIZE) {
  80         error_report("ERROR: RAM size 0x%" PRIx64 " above max supported of "
  81                      "0x%llx", ram_size,
  82                      XLNX_ZYNQMP_MAX_RAM_SIZE);
  83         exit(1);
  84     }
  85
  86     if (ram_size < 0x08000000) {
  87         qemu_log("WARNING: RAM size 0x%" PRIx64 " is small for ZCU102",
  88                  ram_size);
  89     }
  90
  91     memory_region_allocate_system_memory(&s->ddr_ram, NULL, "ddr-ram",
  92                                          ram_size);
  93
  94     object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
  95                             TYPE_XLNX_ZYNQMP, &error_abort, NULL);
  96
  97     object_property_set_link(OBJECT(&s->soc), OBJECT(&s->ddr_ram),
  98                          "ddr-ram", &error_abort);
  99     object_property_set_bool(OBJECT(&s->soc), s->secure, "secure",
 100                              &error_fatal);
 101     object_property_set_bool(OBJECT(&s->soc), s->virt, "virtualization",
 102                              &error_fatal);
 103
 104     object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
 105
 106     /* Create and plug in the SD cards */
 107     for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) {
 108         BusState *bus;
 109         DriveInfo *di = drive_get_next(IF_SD);
 110         BlockBackend *blk = di ? blk_by_legacy_dinfo(di) : NULL;
 111         DeviceState *carddev;
 112         char *bus_name;
 113
 114         bus_name = g_strdup_printf("sd-bus%d", i);
 115         bus = qdev_get_child_bus(DEVICE(&s->soc), bus_name);
 116         g_free(bus_name);
 117         if (!bus) {
 118             error_report("No SD bus found for SD card %d", i);
 119             exit(1);
 120         }
 121         carddev = qdev_create(bus, TYPE_SD_CARD);
 122         qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
 123         object_property_set_bool(OBJECT(carddev), true, "realized",
 124                                  &error_fatal);
 125     }
 126
 127     for (i = 0; i < XLNX_ZYNQMP_NUM_SPIS; i++) {
 128         SSIBus *spi_bus;
 129         DeviceState *flash_dev;
 130         qemu_irq cs_line;
 131         DriveInfo *dinfo = drive_get_next(IF_MTD);
 132         gchar *bus_name = g_strdup_printf("spi%d", i);
 133
 134         spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
 135         g_free(bus_name);
 136
 137         flash_dev = ssi_create_slave_no_init(spi_bus, "sst25wf080");
 138         if (dinfo) {
 139             qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
 140                                 &error_fatal);
 141         }
 142         qdev_init_nofail(flash_dev);
 143
 144         cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
 145
 146         sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.spi[i]), 1, cs_line);
 147     }
 148
 149     for (i = 0; i < XLNX_ZYNQMP_NUM_QSPI_FLASH; i++) {
 150         SSIBus *spi_bus;
 151         DeviceState *flash_dev;
 152         qemu_irq cs_line;
 153         DriveInfo *dinfo = drive_get_next(IF_MTD);
 154         int bus = i / XLNX_ZYNQMP_NUM_QSPI_BUS_CS;
 155         gchar *bus_name = g_strdup_printf("qspi%d", bus);
 156
 157         spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(&s->soc), bus_name);
 158         g_free(bus_name);
 159
 160         flash_dev = ssi_create_slave_no_init(spi_bus, "n25q512a11");
 161         if (dinfo) {
 162             qdev_prop_set_drive(flash_dev, "drive", blk_by_legacy_dinfo(dinfo),
 163                                 &error_fatal);
 164         }
 165         qdev_init_nofail(flash_dev);
 166
 167         cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
 168
 169         sysbus_connect_irq(SYS_BUS_DEVICE(&s->soc.qspi), i + 1, cs_line);
 170     }
 171
 172     /* TODO create and connect IDE devices for ide_drive_get() */
 173
 174     xlnx_zcu102_binfo.ram_size = ram_size;
 175     xlnx_zcu102_binfo.kernel_filename = machine->kernel_filename;
 176     xlnx_zcu102_binfo.kernel_cmdline = machine->kernel_cmdline;
 177     xlnx_zcu102_binfo.initrd_filename = machine->initrd_filename;
 178     xlnx_zcu102_binfo.loader_start = 0;
 179     arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
 180 }
 181
 182 static void xlnx_zcu102_machine_instance_init(Object *obj)
 183 {
 184     XlnxZCU102 *s = ZCU102_MACHINE(obj);
 185
 186     /* Default to secure mode being disabled */
 187     s->secure = false;
 188     object_property_add_bool(obj, "secure", zcu102_get_secure,
 189                              zcu102_set_secure, NULL);
 190     object_property_set_description(obj, "secure",
 191                                     "Set on/off to enable/disable the ARM "
 192                                     "Security Extensions (TrustZone)",
 193                                     NULL);
 194
 195     /* Default to virt (EL2) being disabled */
 196     s->virt = false;
 197     object_property_add_bool(obj, "virtualization", zcu102_get_virt,
 198                              zcu102_set_virt, NULL);
 199     object_property_set_description(obj, "virtualization",
 200                                     "Set on/off to enable/disable emulating a "
 201                                     "guest CPU which implements the ARM "
 202                                     "Virtualization Extensions",
 203                                     NULL);
 204 }
 205
 206 static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
 207 {
 208     MachineClass *mc = MACHINE_CLASS(oc);
 209
 210     mc->desc = "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5Fs based on " \
 211                "the value of smp";
 212     mc->init = xlnx_zcu102_init;
 213     mc->block_default_type = IF_IDE;
 214     mc->units_per_default_bus = 1;
 215     mc->ignore_memory_transaction_failures = true;
 216     mc->max_cpus = XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS;
 217     mc->default_cpus = XLNX_ZYNQMP_NUM_APU_CPUS;
 218 }
 219
 220 static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
 221     .name       = MACHINE_TYPE_NAME("xlnx-zcu102"),
 222     .parent     = TYPE_MACHINE,
 223     .class_init = xlnx_zcu102_machine_class_init,
 224     .instance_init = xlnx_zcu102_machine_instance_init,
 225     .instance_size = sizeof(XlnxZCU102),
 226 };
 227
 228 static void xlnx_zcu102_machine_init_register_types(void)
 229 {
 230     type_register_static(&xlnx_zcu102_machine_init_typeinfo);
 231 }
 232
 233 type_init(xlnx_zcu102_machine_init_register_types)