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ssdt-tpm: add generated hex file to git
[qemu/ar7.git] / memory.c
blob42317a216d0e8c55881eb9219ec3be280a337a9e
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qom/object.h"
22 #include "trace.h"
23 #include <assert.h>
24
25 #include "exec/memory-internal.h"
26 #include "exec/ram_addr.h"
27 #include "sysemu/sysemu.h"
28
29 //#define DEBUG_UNASSIGNED
30
31 static unsigned memory_region_transaction_depth;
32 static bool memory_region_update_pending;
33 static bool ioeventfd_update_pending;
34 static bool global_dirty_log = false;
35
36 /* flat_view_mutex is taken around reading as->current_map; the critical
37 * section is extremely short, so I'm using a single mutex for every AS.
38 * We could also RCU for the read-side.
39 *
40 * The BQL is taken around transaction commits, hence both locks are taken
41 * while writing to as->current_map (with the BQL taken outside).
42 */
43 static QemuMutex flat_view_mutex;
44
45 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static void memory_init(void)
52 {
53 qemu_mutex_init(&flat_view_mutex);
54 }
55
56 typedef struct AddrRange AddrRange;
57
58 /*
59 * Note that signed integers are needed for negative offsetting in aliases
60 * (large MemoryRegion::alias_offset).
61 */
62 struct AddrRange {
63 Int128 start;
64 Int128 size;
65 };
66
67 static AddrRange addrrange_make(Int128 start, Int128 size)
68 {
69 return (AddrRange) { start, size };
70 }
71
72 static bool addrrange_equal(AddrRange r1, AddrRange r2)
73 {
74 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
75 }
76
77 static Int128 addrrange_end(AddrRange r)
78 {
79 return int128_add(r.start, r.size);
80 }
81
82 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
83 {
84 int128_addto(&range.start, delta);
85 return range;
86 }
87
88 static bool addrrange_contains(AddrRange range, Int128 addr)
89 {
90 return int128_ge(addr, range.start)
91 && int128_lt(addr, addrrange_end(range));
92 }
93
94 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
95 {
96 return addrrange_contains(r1, r2.start)
97 || addrrange_contains(r2, r1.start);
98 }
99
100 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
101 {
102 Int128 start = int128_max(r1.start, r2.start);
103 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
104 return addrrange_make(start, int128_sub(end, start));
105 }
106
107 enum ListenerDirection { Forward, Reverse };
108
109 static bool memory_listener_match(MemoryListener *listener,
110 MemoryRegionSection *section)
111 {
112 return !listener->address_space_filter
113 || listener->address_space_filter == section->address_space;
114 }
115
116 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
117 do { \
118 MemoryListener *_listener; \
119 \
120 switch (_direction) { \
121 case Forward: \
122 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
123 if (_listener->_callback) { \
124 _listener->_callback(_listener, ##_args); \
125 } \
126 } \
127 break; \
128 case Reverse: \
129 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
130 memory_listeners, link) { \
131 if (_listener->_callback) { \
132 _listener->_callback(_listener, ##_args); \
133 } \
134 } \
135 break; \
136 default: \
137 abort(); \
138 } \
139 } while (0)
140
141 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
142 do { \
143 MemoryListener *_listener; \
144 \
145 switch (_direction) { \
146 case Forward: \
147 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
148 if (_listener->_callback \
149 && memory_listener_match(_listener, _section)) { \
150 _listener->_callback(_listener, _section, ##_args); \
151 } \
152 } \
153 break; \
154 case Reverse: \
155 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
156 memory_listeners, link) { \
157 if (_listener->_callback \
158 && memory_listener_match(_listener, _section)) { \
159 _listener->_callback(_listener, _section, ##_args); \
160 } \
161 } \
162 break; \
163 default: \
164 abort(); \
165 } \
166 } while (0)
167
168 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
169 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
170 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
171 .mr = (fr)->mr, \
172 .address_space = (as), \
173 .offset_within_region = (fr)->offset_in_region, \
174 .size = (fr)->addr.size, \
175 .offset_within_address_space = int128_get64((fr)->addr.start), \
176 .readonly = (fr)->readonly, \
177 }))
178
179 struct CoalescedMemoryRange {
180 AddrRange addr;
181 QTAILQ_ENTRY(CoalescedMemoryRange) link;
182 };
183
184 struct MemoryRegionIoeventfd {
185 AddrRange addr;
186 bool match_data;
187 uint64_t data;
188 EventNotifier *e;
189 };
190
191 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
192 MemoryRegionIoeventfd b)
193 {
194 if (int128_lt(a.addr.start, b.addr.start)) {
195 return true;
196 } else if (int128_gt(a.addr.start, b.addr.start)) {
197 return false;
198 } else if (int128_lt(a.addr.size, b.addr.size)) {
199 return true;
200 } else if (int128_gt(a.addr.size, b.addr.size)) {
201 return false;
202 } else if (a.match_data < b.match_data) {
203 return true;
204 } else if (a.match_data > b.match_data) {
205 return false;
206 } else if (a.match_data) {
207 if (a.data < b.data) {
208 return true;
209 } else if (a.data > b.data) {
210 return false;
211 }
212 }
213 if (a.e < b.e) {
214 return true;
215 } else if (a.e > b.e) {
216 return false;
217 }
218 return false;
219 }
220
221 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
222 MemoryRegionIoeventfd b)
223 {
224 return !memory_region_ioeventfd_before(a, b)
225 && !memory_region_ioeventfd_before(b, a);
226 }
227
228 typedef struct FlatRange FlatRange;
229 typedef struct FlatView FlatView;
230
231 /* Range of memory in the global map. Addresses are absolute. */
232 struct FlatRange {
233 MemoryRegion *mr;
234 hwaddr offset_in_region;
235 AddrRange addr;
236 uint8_t dirty_log_mask;
237 bool romd_mode;
238 bool readonly;
239 };
240
241 /* Flattened global view of current active memory hierarchy. Kept in sorted
242 * order.
243 */
244 struct FlatView {
245 unsigned ref;
246 FlatRange *ranges;
247 unsigned nr;
248 unsigned nr_allocated;
249 };
250
251 typedef struct AddressSpaceOps AddressSpaceOps;
252
253 #define FOR_EACH_FLAT_RANGE(var, view) \
254 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
255
256 static bool flatrange_equal(FlatRange *a, FlatRange *b)
257 {
258 return a->mr == b->mr
259 && addrrange_equal(a->addr, b->addr)
260 && a->offset_in_region == b->offset_in_region
261 && a->romd_mode == b->romd_mode
262 && a->readonly == b->readonly;
263 }
264
265 static void flatview_init(FlatView *view)
266 {
267 view->ref = 1;
268 view->ranges = NULL;
269 view->nr = 0;
270 view->nr_allocated = 0;
271 }
272
273 /* Insert a range into a given position. Caller is responsible for maintaining
274 * sorting order.
275 */
276 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
277 {
278 if (view->nr == view->nr_allocated) {
279 view->nr_allocated = MAX(2 * view->nr, 10);
280 view->ranges = g_realloc(view->ranges,
281 view->nr_allocated * sizeof(*view->ranges));
282 }
283 memmove(view->ranges + pos + 1, view->ranges + pos,
284 (view->nr - pos) * sizeof(FlatRange));
285 view->ranges[pos] = *range;
286 memory_region_ref(range->mr);
287 ++view->nr;
288 }
289
290 static void flatview_destroy(FlatView *view)
291 {
292 int i;
293
294 for (i = 0; i < view->nr; i++) {
295 memory_region_unref(view->ranges[i].mr);
296 }
297 g_free(view->ranges);
298 g_free(view);
299 }
300
301 static void flatview_ref(FlatView *view)
302 {
303 atomic_inc(&view->ref);
304 }
305
306 static void flatview_unref(FlatView *view)
307 {
308 if (atomic_fetch_dec(&view->ref) == 1) {
309 flatview_destroy(view);
310 }
311 }
312
313 static bool can_merge(FlatRange *r1, FlatRange *r2)
314 {
315 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
316 && r1->mr == r2->mr
317 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
318 r1->addr.size),
319 int128_make64(r2->offset_in_region))
320 && r1->dirty_log_mask == r2->dirty_log_mask
321 && r1->romd_mode == r2->romd_mode
322 && r1->readonly == r2->readonly;
323 }
324
325 /* Attempt to simplify a view by merging adjacent ranges */
326 static void flatview_simplify(FlatView *view)
327 {
328 unsigned i, j;
329
330 i = 0;
331 while (i < view->nr) {
332 j = i + 1;
333 while (j < view->nr
334 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
335 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
336 ++j;
337 }
338 ++i;
339 memmove(&view->ranges[i], &view->ranges[j],
340 (view->nr - j) * sizeof(view->ranges[j]));
341 view->nr -= j - i;
342 }
343 }
344
345 static bool memory_region_big_endian(MemoryRegion *mr)
346 {
347 #ifdef TARGET_WORDS_BIGENDIAN
348 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
349 #else
350 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
351 #endif
352 }
353
354 static bool memory_region_wrong_endianness(MemoryRegion *mr)
355 {
356 #ifdef TARGET_WORDS_BIGENDIAN
357 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
358 #else
359 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
360 #endif
361 }
362
363 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
364 {
365 if (memory_region_wrong_endianness(mr)) {
366 switch (size) {
367 case 1:
368 break;
369 case 2:
370 *data = bswap16(*data);
371 break;
372 case 4:
373 *data = bswap32(*data);
374 break;
375 case 8:
376 *data = bswap64(*data);
377 break;
378 default:
379 abort();
380 }
381 }
382 }
383
384 static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
385 hwaddr addr,
386 uint64_t *value,
387 unsigned size,
388 unsigned shift,
389 uint64_t mask)
390 {
391 uint64_t tmp;
392
393 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
394 trace_memory_region_ops_read(mr, addr, tmp, size);
395 *value |= (tmp & mask) << shift;
396 }
397
398 static void memory_region_read_accessor(MemoryRegion *mr,
399 hwaddr addr,
400 uint64_t *value,
401 unsigned size,
402 unsigned shift,
403 uint64_t mask)
404 {
405 uint64_t tmp;
406
407 if (mr->flush_coalesced_mmio) {
408 qemu_flush_coalesced_mmio_buffer();
409 }
410 tmp = mr->ops->read(mr->opaque, addr, size);
411 trace_memory_region_ops_read(mr, addr, tmp, size);
412 *value |= (tmp & mask) << shift;
413 }
414
415 static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
416 hwaddr addr,
417 uint64_t *value,
418 unsigned size,
419 unsigned shift,
420 uint64_t mask)
421 {
422 uint64_t tmp;
423
424 tmp = (*value >> shift) & mask;
425 trace_memory_region_ops_write(mr, addr, tmp, size);
426 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
427 }
428
429 static void memory_region_write_accessor(MemoryRegion *mr,
430 hwaddr addr,
431 uint64_t *value,
432 unsigned size,
433 unsigned shift,
434 uint64_t mask)
435 {
436 uint64_t tmp;
437
438 if (mr->flush_coalesced_mmio) {
439 qemu_flush_coalesced_mmio_buffer();
440 }
441 tmp = (*value >> shift) & mask;
442 trace_memory_region_ops_write(mr, addr, tmp, size);
443 mr->ops->write(mr->opaque, addr, tmp, size);
444 }
445
446 static void access_with_adjusted_size(hwaddr addr,
447 uint64_t *value,
448 unsigned size,
449 unsigned access_size_min,
450 unsigned access_size_max,
451 void (*access)(MemoryRegion *mr,
452 hwaddr addr,
453 uint64_t *value,
454 unsigned size,
455 unsigned shift,
456 uint64_t mask),
457 MemoryRegion *mr)
458 {
459 uint64_t access_mask;
460 unsigned access_size;
461 unsigned i;
462
463 if (!access_size_min) {
464 access_size_min = 1;
465 }
466 if (!access_size_max) {
467 access_size_max = 4;
468 }
469
470 /* FIXME: support unaligned access? */
471 access_size = MAX(MIN(size, access_size_max), access_size_min);
472 access_mask = -1ULL >> (64 - access_size * 8);
473 if (memory_region_big_endian(mr)) {
474 for (i = 0; i < size; i += access_size) {
475 access(mr, addr + i, value, access_size,
476 (size - access_size - i) * 8, access_mask);
477 }
478 } else {
479 for (i = 0; i < size; i += access_size) {
480 access(mr, addr + i, value, access_size, i * 8, access_mask);
481 }
482 }
483 }
484
485 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
486 {
487 AddressSpace *as;
488
489 while (mr->container) {
490 mr = mr->container;
491 }
492 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
493 if (mr == as->root) {
494 return as;
495 }
496 }
497 return NULL;
498 }
499
500 /* Render a memory region into the global view. Ranges in @view obscure
501 * ranges in @mr.
502 */
503 static void render_memory_region(FlatView *view,
504 MemoryRegion *mr,
505 Int128 base,
506 AddrRange clip,
507 bool readonly)
508 {
509 MemoryRegion *subregion;
510 unsigned i;
511 hwaddr offset_in_region;
512 Int128 remain;
513 Int128 now;
514 FlatRange fr;
515 AddrRange tmp;
516
517 if (!mr->enabled) {
518 return;
519 }
520
521 int128_addto(&base, int128_make64(mr->addr));
522 readonly |= mr->readonly;
523
524 tmp = addrrange_make(base, mr->size);
525
526 if (!addrrange_intersects(tmp, clip)) {
527 return;
528 }
529
530 clip = addrrange_intersection(tmp, clip);
531
532 if (mr->alias) {
533 int128_subfrom(&base, int128_make64(mr->alias->addr));
534 int128_subfrom(&base, int128_make64(mr->alias_offset));
535 render_memory_region(view, mr->alias, base, clip, readonly);
536 return;
537 }
538
539 /* Render subregions in priority order. */
540 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
541 render_memory_region(view, subregion, base, clip, readonly);
542 }
543
544 if (!mr->terminates) {
545 return;
546 }
547
548 offset_in_region = int128_get64(int128_sub(clip.start, base));
549 base = clip.start;
550 remain = clip.size;
551
552 fr.mr = mr;
553 fr.dirty_log_mask = mr->dirty_log_mask;
554 fr.romd_mode = mr->romd_mode;
555 fr.readonly = readonly;
556
557 /* Render the region itself into any gaps left by the current view. */
558 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
559 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
560 continue;
561 }
562 if (int128_lt(base, view->ranges[i].addr.start)) {
563 now = int128_min(remain,
564 int128_sub(view->ranges[i].addr.start, base));
565 fr.offset_in_region = offset_in_region;
566 fr.addr = addrrange_make(base, now);
567 flatview_insert(view, i, &fr);
568 ++i;
569 int128_addto(&base, now);
570 offset_in_region += int128_get64(now);
571 int128_subfrom(&remain, now);
572 }
573 now = int128_sub(int128_min(int128_add(base, remain),
574 addrrange_end(view->ranges[i].addr)),
575 base);
576 int128_addto(&base, now);
577 offset_in_region += int128_get64(now);
578 int128_subfrom(&remain, now);
579 }
580 if (int128_nz(remain)) {
581 fr.offset_in_region = offset_in_region;
582 fr.addr = addrrange_make(base, remain);
583 flatview_insert(view, i, &fr);
584 }
585 }
586
587 /* Render a memory topology into a list of disjoint absolute ranges. */
588 static FlatView *generate_memory_topology(MemoryRegion *mr)
589 {
590 FlatView *view;
591
592 view = g_new(FlatView, 1);
593 flatview_init(view);
594
595 if (mr) {
596 render_memory_region(view, mr, int128_zero(),
597 addrrange_make(int128_zero(), int128_2_64()), false);
598 }
599 flatview_simplify(view);
600
601 return view;
602 }
603
604 static void address_space_add_del_ioeventfds(AddressSpace *as,
605 MemoryRegionIoeventfd *fds_new,
606 unsigned fds_new_nb,
607 MemoryRegionIoeventfd *fds_old,
608 unsigned fds_old_nb)
609 {
610 unsigned iold, inew;
611 MemoryRegionIoeventfd *fd;
612 MemoryRegionSection section;
613
614 /* Generate a symmetric difference of the old and new fd sets, adding
615 * and deleting as necessary.
616 */
617
618 iold = inew = 0;
619 while (iold < fds_old_nb || inew < fds_new_nb) {
620 if (iold < fds_old_nb
621 && (inew == fds_new_nb
622 || memory_region_ioeventfd_before(fds_old[iold],
623 fds_new[inew]))) {
624 fd = &fds_old[iold];
625 section = (MemoryRegionSection) {
626 .address_space = as,
627 .offset_within_address_space = int128_get64(fd->addr.start),
628 .size = fd->addr.size,
629 };
630 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
631 fd->match_data, fd->data, fd->e);
632 ++iold;
633 } else if (inew < fds_new_nb
634 && (iold == fds_old_nb
635 || memory_region_ioeventfd_before(fds_new[inew],
636 fds_old[iold]))) {
637 fd = &fds_new[inew];
638 section = (MemoryRegionSection) {
639 .address_space = as,
640 .offset_within_address_space = int128_get64(fd->addr.start),
641 .size = fd->addr.size,
642 };
643 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
644 fd->match_data, fd->data, fd->e);
645 ++inew;
646 } else {
647 ++iold;
648 ++inew;
649 }
650 }
651 }
652
653 static FlatView *address_space_get_flatview(AddressSpace *as)
654 {
655 FlatView *view;
656
657 qemu_mutex_lock(&flat_view_mutex);
658 view = as->current_map;
659 flatview_ref(view);
660 qemu_mutex_unlock(&flat_view_mutex);
661 return view;
662 }
663
664 static void address_space_update_ioeventfds(AddressSpace *as)
665 {
666 FlatView *view;
667 FlatRange *fr;
668 unsigned ioeventfd_nb = 0;
669 MemoryRegionIoeventfd *ioeventfds = NULL;
670 AddrRange tmp;
671 unsigned i;
672
673 view = address_space_get_flatview(as);
674 FOR_EACH_FLAT_RANGE(fr, view) {
675 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
676 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
677 int128_sub(fr->addr.start,
678 int128_make64(fr->offset_in_region)));
679 if (addrrange_intersects(fr->addr, tmp)) {
680 ++ioeventfd_nb;
681 ioeventfds = g_realloc(ioeventfds,
682 ioeventfd_nb * sizeof(*ioeventfds));
683 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
684 ioeventfds[ioeventfd_nb-1].addr = tmp;
685 }
686 }
687 }
688
689 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
690 as->ioeventfds, as->ioeventfd_nb);
691
692 g_free(as->ioeventfds);
693 as->ioeventfds = ioeventfds;
694 as->ioeventfd_nb = ioeventfd_nb;
695 flatview_unref(view);
696 }
697
698 static void address_space_update_topology_pass(AddressSpace *as,
699 const FlatView *old_view,
700 const FlatView *new_view,
701 bool adding)
702 {
703 unsigned iold, inew;
704 FlatRange *frold, *frnew;
705
706 /* Generate a symmetric difference of the old and new memory maps.
707 * Kill ranges in the old map, and instantiate ranges in the new map.
708 */
709 iold = inew = 0;
710 while (iold < old_view->nr || inew < new_view->nr) {
711 if (iold < old_view->nr) {
712 frold = &old_view->ranges[iold];
713 } else {
714 frold = NULL;
715 }
716 if (inew < new_view->nr) {
717 frnew = &new_view->ranges[inew];
718 } else {
719 frnew = NULL;
720 }
721
722 if (frold
723 && (!frnew
724 || int128_lt(frold->addr.start, frnew->addr.start)
725 || (int128_eq(frold->addr.start, frnew->addr.start)
726 && !flatrange_equal(frold, frnew)))) {
727 /* In old but not in new, or in both but attributes changed. */
728
729 if (!adding) {
730 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
731 }
732
733 ++iold;
734 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
735 /* In both and unchanged (except logging may have changed) */
736
737 if (adding) {
738 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
739 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
740 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
741 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
742 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
743 }
744 }
745
746 ++iold;
747 ++inew;
748 } else {
749 /* In new */
750
751 if (adding) {
752 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
753 }
754
755 ++inew;
756 }
757 }
758 }
759
760
761 static void address_space_update_topology(AddressSpace *as)
762 {
763 FlatView *old_view = address_space_get_flatview(as);
764 FlatView *new_view = generate_memory_topology(as->root);
765
766 address_space_update_topology_pass(as, old_view, new_view, false);
767 address_space_update_topology_pass(as, old_view, new_view, true);
768
769 qemu_mutex_lock(&flat_view_mutex);
770 flatview_unref(as->current_map);
771 as->current_map = new_view;
772 qemu_mutex_unlock(&flat_view_mutex);
773
774 /* Note that all the old MemoryRegions are still alive up to this
775 * point. This relieves most MemoryListeners from the need to
776 * ref/unref the MemoryRegions they get---unless they use them
777 * outside the iothread mutex, in which case precise reference
778 * counting is necessary.
779 */
780 flatview_unref(old_view);
781
782 address_space_update_ioeventfds(as);
783 }
784
785 void memory_region_transaction_begin(void)
786 {
787 qemu_flush_coalesced_mmio_buffer();
788 ++memory_region_transaction_depth;
789 }
790
791 static void memory_region_clear_pending(void)
792 {
793 memory_region_update_pending = false;
794 ioeventfd_update_pending = false;
795 }
796
797 void memory_region_transaction_commit(void)
798 {
799 AddressSpace *as;
800
801 assert(memory_region_transaction_depth);
802 --memory_region_transaction_depth;
803 if (!memory_region_transaction_depth) {
804 if (memory_region_update_pending) {
805 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
806
807 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
808 address_space_update_topology(as);
809 }
810
811 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
812 } else if (ioeventfd_update_pending) {
813 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
814 address_space_update_ioeventfds(as);
815 }
816 }
817 memory_region_clear_pending();
818 }
819 }
820
821 static void memory_region_destructor_none(MemoryRegion *mr)
822 {
823 }
824
825 static void memory_region_destructor_ram(MemoryRegion *mr)
826 {
827 qemu_ram_free(mr->ram_addr);
828 }
829
830 static void memory_region_destructor_alias(MemoryRegion *mr)
831 {
832 memory_region_unref(mr->alias);
833 }
834
835 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
836 {
837 qemu_ram_free_from_ptr(mr->ram_addr);
838 }
839
840 static void memory_region_destructor_rom_device(MemoryRegion *mr)
841 {
842 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
843 }
844
845 static bool memory_region_need_escape(char c)
846 {
847 return c == '/' || c == '[' || c == '\\' || c == ']';
848 }
849
850 static char *memory_region_escape_name(const char *name)
851 {
852 const char *p;
853 char *escaped, *q;
854 uint8_t c;
855 size_t bytes = 0;
856
857 for (p = name; *p; p++) {
858 bytes += memory_region_need_escape(*p) ? 4 : 1;
859 }
860 if (bytes == p - name) {
861 return g_memdup(name, bytes + 1);
862 }
863
864 escaped = g_malloc(bytes + 1);
865 for (p = name, q = escaped; *p; p++) {
866 c = *p;
867 if (unlikely(memory_region_need_escape(c))) {
868 *q++ = '\\';
869 *q++ = 'x';
870 *q++ = "0123456789abcdef"[c >> 4];
871 c = "0123456789abcdef"[c & 15];
872 }
873 *q++ = c;
874 }
875 *q = 0;
876 return escaped;
877 }
878
879 static void object_property_add_child_array(Object *owner,
880 const char *name,
881 Object *child)
882 {
883 int i;
884 char *base_name = memory_region_escape_name(name);
885
886 for (i = 0; ; i++) {
887 char *full_name = g_strdup_printf("%s[%d]", base_name, i);
888 Error *local_err = NULL;
889
890 object_property_add_child(owner, full_name, child, &local_err);
891 g_free(full_name);
892 if (!local_err) {
893 break;
894 }
895
896 error_free(local_err);
897 }
898
899 g_free(base_name);
900 }
901
902
903 void memory_region_init(MemoryRegion *mr,
904 Object *owner,
905 const char *name,
906 uint64_t size)
907 {
908 if (!owner) {
909 owner = qdev_get_machine();
910 }
911
912 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
913 mr->size = int128_make64(size);
914 if (size == UINT64_MAX) {
915 mr->size = int128_2_64();
916 }
917 mr->name = g_strdup(name);
918
919 if (name) {
920 object_property_add_child_array(owner, name, OBJECT(mr));
921 object_unref(OBJECT(mr));
922 }
923 }
924
925 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
926 const char *name, Error **errp)
927 {
928 MemoryRegion *mr = MEMORY_REGION(obj);
929 uint64_t value = mr->addr;
930
931 visit_type_uint64(v, &value, name, errp);
932 }
933
934 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
935 const char *name, Error **errp)
936 {
937 MemoryRegion *mr = MEMORY_REGION(obj);
938 gchar *path = (gchar *)"";
939
940 if (mr->container) {
941 path = object_get_canonical_path(OBJECT(mr->container));
942 }
943 visit_type_str(v, &path, name, errp);
944 if (mr->container) {
945 g_free(path);
946 }
947 }
948
949 static Object *memory_region_resolve_container(Object *obj, void *opaque,
950 const char *part)
951 {
952 MemoryRegion *mr = MEMORY_REGION(obj);
953
954 return OBJECT(mr->container);
955 }
956
957 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
958 const char *name, Error **errp)
959 {
960 MemoryRegion *mr = MEMORY_REGION(obj);
961 int32_t value = mr->priority;
962
963 visit_type_int32(v, &value, name, errp);
964 }
965
966 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
967 {
968 MemoryRegion *mr = MEMORY_REGION(obj);
969
970 return mr->may_overlap;
971 }
972
973 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
974 const char *name, Error **errp)
975 {
976 MemoryRegion *mr = MEMORY_REGION(obj);
977 uint64_t value = memory_region_size(mr);
978
979 visit_type_uint64(v, &value, name, errp);
980 }
981
982 static void memory_region_initfn(Object *obj)
983 {
984 MemoryRegion *mr = MEMORY_REGION(obj);
985 ObjectProperty *op;
986
987 mr->ops = &unassigned_mem_ops;
988 mr->enabled = true;
989 mr->romd_mode = true;
990 mr->destructor = memory_region_destructor_none;
991 QTAILQ_INIT(&mr->subregions);
992 QTAILQ_INIT(&mr->coalesced);
993
994 op = object_property_add(OBJECT(mr), "container",
995 "link<" TYPE_MEMORY_REGION ">",
996 memory_region_get_container,
997 NULL, /* memory_region_set_container */
998 NULL, NULL, &error_abort);
999 op->resolve = memory_region_resolve_container;
1000
1001 object_property_add(OBJECT(mr), "addr", "uint64",
1002 memory_region_get_addr,
1003 NULL, /* memory_region_set_addr */
1004 NULL, NULL, &error_abort);
1005 object_property_add(OBJECT(mr), "priority", "uint32",
1006 memory_region_get_priority,
1007 NULL, /* memory_region_set_priority */
1008 NULL, NULL, &error_abort);
1009 object_property_add_bool(OBJECT(mr), "may-overlap",
1010 memory_region_get_may_overlap,
1011 NULL, /* memory_region_set_may_overlap */
1012 &error_abort);
1013 object_property_add(OBJECT(mr), "size", "uint64",
1014 memory_region_get_size,
1015 NULL, /* memory_region_set_size, */
1016 NULL, NULL, &error_abort);
1017 }
1018
1019 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1020 unsigned size)
1021 {
1022 #ifdef DEBUG_UNASSIGNED
1023 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1024 #endif
1025 if (current_cpu != NULL) {
1026 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1027 }
1028 return 0;
1029 }
1030
1031 static void unassigned_mem_write(void *opaque, hwaddr addr,
1032 uint64_t val, unsigned size)
1033 {
1034 #ifdef DEBUG_UNASSIGNED
1035 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1036 #endif
1037 if (current_cpu != NULL) {
1038 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1039 }
1040 }
1041
1042 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1043 unsigned size, bool is_write)
1044 {
1045 return false;
1046 }
1047
1048 const MemoryRegionOps unassigned_mem_ops = {
1049 .valid.accepts = unassigned_mem_accepts,
1050 .endianness = DEVICE_NATIVE_ENDIAN,
1051 };
1052
1053 bool memory_region_access_valid(MemoryRegion *mr,
1054 hwaddr addr,
1055 unsigned size,
1056 bool is_write)
1057 {
1058 int access_size_min, access_size_max;
1059 int access_size, i;
1060
1061 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1062 return false;
1063 }
1064
1065 if (!mr->ops->valid.accepts) {
1066 return true;
1067 }
1068
1069 access_size_min = mr->ops->valid.min_access_size;
1070 if (!mr->ops->valid.min_access_size) {
1071 access_size_min = 1;
1072 }
1073
1074 access_size_max = mr->ops->valid.max_access_size;
1075 if (!mr->ops->valid.max_access_size) {
1076 access_size_max = 4;
1077 }
1078
1079 access_size = MAX(MIN(size, access_size_max), access_size_min);
1080 for (i = 0; i < size; i += access_size) {
1081 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1082 is_write)) {
1083 return false;
1084 }
1085 }
1086
1087 return true;
1088 }
1089
1090 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
1091 hwaddr addr,
1092 unsigned size)
1093 {
1094 uint64_t data = 0;
1095
1096 if (mr->ops->read) {
1097 access_with_adjusted_size(addr, &data, size,
1098 mr->ops->impl.min_access_size,
1099 mr->ops->impl.max_access_size,
1100 memory_region_read_accessor, mr);
1101 } else {
1102 access_with_adjusted_size(addr, &data, size, 1, 4,
1103 memory_region_oldmmio_read_accessor, mr);
1104 }
1105
1106 return data;
1107 }
1108
1109 static bool memory_region_dispatch_read(MemoryRegion *mr,
1110 hwaddr addr,
1111 uint64_t *pval,
1112 unsigned size)
1113 {
1114 if (!memory_region_access_valid(mr, addr, size, false)) {
1115 *pval = unassigned_mem_read(mr, addr, size);
1116 return true;
1117 }
1118
1119 *pval = memory_region_dispatch_read1(mr, addr, size);
1120 adjust_endianness(mr, pval, size);
1121 return false;
1122 }
1123
1124 static bool memory_region_dispatch_write(MemoryRegion *mr,
1125 hwaddr addr,
1126 uint64_t data,
1127 unsigned size)
1128 {
1129 if (!memory_region_access_valid(mr, addr, size, true)) {
1130 unassigned_mem_write(mr, addr, data, size);
1131 return true;
1132 }
1133
1134 adjust_endianness(mr, &data, size);
1135
1136 if (mr->ops->write) {
1137 access_with_adjusted_size(addr, &data, size,
1138 mr->ops->impl.min_access_size,
1139 mr->ops->impl.max_access_size,
1140 memory_region_write_accessor, mr);
1141 } else {
1142 access_with_adjusted_size(addr, &data, size, 1, 4,
1143 memory_region_oldmmio_write_accessor, mr);
1144 }
1145 return false;
1146 }
1147
1148 void memory_region_init_io(MemoryRegion *mr,
1149 Object *owner,
1150 const MemoryRegionOps *ops,
1151 void *opaque,
1152 const char *name,
1153 uint64_t size)
1154 {
1155 memory_region_init(mr, owner, name, size);
1156 mr->ops = ops;
1157 mr->opaque = opaque;
1158 mr->terminates = true;
1159 mr->ram_addr = ~(ram_addr_t)0;
1160 }
1161
1162 void memory_region_init_ram(MemoryRegion *mr,
1163 Object *owner,
1164 const char *name,
1165 uint64_t size)
1166 {
1167 memory_region_init(mr, owner, name, size);
1168 mr->ram = true;
1169 mr->terminates = true;
1170 mr->destructor = memory_region_destructor_ram;
1171 mr->ram_addr = qemu_ram_alloc(size, mr);
1172 }
1173
1174 #ifdef __linux__
1175 void memory_region_init_ram_from_file(MemoryRegion *mr,
1176 struct Object *owner,
1177 const char *name,
1178 uint64_t size,
1179 bool share,
1180 const char *path,
1181 Error **errp)
1182 {
1183 memory_region_init(mr, owner, name, size);
1184 mr->ram = true;
1185 mr->terminates = true;
1186 mr->destructor = memory_region_destructor_ram;
1187 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1188 }
1189 #endif
1190
1191 void memory_region_init_ram_ptr(MemoryRegion *mr,
1192 Object *owner,
1193 const char *name,
1194 uint64_t size,
1195 void *ptr)
1196 {
1197 memory_region_init(mr, owner, name, size);
1198 mr->ram = true;
1199 mr->terminates = true;
1200 mr->destructor = memory_region_destructor_ram_from_ptr;
1201 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1202 }
1203
1204 void memory_region_init_alias(MemoryRegion *mr,
1205 Object *owner,
1206 const char *name,
1207 MemoryRegion *orig,
1208 hwaddr offset,
1209 uint64_t size)
1210 {
1211 memory_region_init(mr, owner, name, size);
1212 memory_region_ref(orig);
1213 mr->destructor = memory_region_destructor_alias;
1214 mr->alias = orig;
1215 mr->alias_offset = offset;
1216 }
1217
1218 void memory_region_init_rom_device(MemoryRegion *mr,
1219 Object *owner,
1220 const MemoryRegionOps *ops,
1221 void *opaque,
1222 const char *name,
1223 uint64_t size)
1224 {
1225 memory_region_init(mr, owner, name, size);
1226 mr->ops = ops;
1227 mr->opaque = opaque;
1228 mr->terminates = true;
1229 mr->rom_device = true;
1230 mr->destructor = memory_region_destructor_rom_device;
1231 mr->ram_addr = qemu_ram_alloc(size, mr);
1232 }
1233
1234 void memory_region_init_iommu(MemoryRegion *mr,
1235 Object *owner,
1236 const MemoryRegionIOMMUOps *ops,
1237 const char *name,
1238 uint64_t size)
1239 {
1240 memory_region_init(mr, owner, name, size);
1241 mr->iommu_ops = ops,
1242 mr->terminates = true; /* then re-forwards */
1243 notifier_list_init(&mr->iommu_notify);
1244 }
1245
1246 void memory_region_init_reservation(MemoryRegion *mr,
1247 Object *owner,
1248 const char *name,
1249 uint64_t size)
1250 {
1251 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1252 }
1253
1254 static void memory_region_finalize(Object *obj)
1255 {
1256 MemoryRegion *mr = MEMORY_REGION(obj);
1257
1258 assert(QTAILQ_EMPTY(&mr->subregions));
1259 assert(memory_region_transaction_depth == 0);
1260 mr->destructor(mr);
1261 memory_region_clear_coalescing(mr);
1262 g_free((char *)mr->name);
1263 g_free(mr->ioeventfds);
1264 }
1265
1266 Object *memory_region_owner(MemoryRegion *mr)
1267 {
1268 Object *obj = OBJECT(mr);
1269 return obj->parent;
1270 }
1271
1272 void memory_region_ref(MemoryRegion *mr)
1273 {
1274 /* MMIO callbacks most likely will access data that belongs
1275 * to the owner, hence the need to ref/unref the owner whenever
1276 * the memory region is in use.
1277 *
1278 * The memory region is a child of its owner. As long as the
1279 * owner doesn't call unparent itself on the memory region,
1280 * ref-ing the owner will also keep the memory region alive.
1281 * Memory regions without an owner are supposed to never go away,
1282 * but we still ref/unref them for debugging purposes.
1283 */
1284 Object *obj = OBJECT(mr);
1285 if (obj && obj->parent) {
1286 object_ref(obj->parent);
1287 } else {
1288 object_ref(obj);
1289 }
1290 }
1291
1292 void memory_region_unref(MemoryRegion *mr)
1293 {
1294 Object *obj = OBJECT(mr);
1295 if (obj && obj->parent) {
1296 object_unref(obj->parent);
1297 } else {
1298 object_unref(obj);
1299 }
1300 }
1301
1302 uint64_t memory_region_size(MemoryRegion *mr)
1303 {
1304 if (int128_eq(mr->size, int128_2_64())) {
1305 return UINT64_MAX;
1306 }
1307 return int128_get64(mr->size);
1308 }
1309
1310 const char *memory_region_name(const MemoryRegion *mr)
1311 {
1312 return mr->name;
1313 }
1314
1315 bool memory_region_is_ram(MemoryRegion *mr)
1316 {
1317 return mr->ram;
1318 }
1319
1320 bool memory_region_is_logging(MemoryRegion *mr)
1321 {
1322 return mr->dirty_log_mask;
1323 }
1324
1325 bool memory_region_is_rom(MemoryRegion *mr)
1326 {
1327 return mr->ram && mr->readonly;
1328 }
1329
1330 bool memory_region_is_iommu(MemoryRegion *mr)
1331 {
1332 return mr->iommu_ops;
1333 }
1334
1335 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1336 {
1337 notifier_list_add(&mr->iommu_notify, n);
1338 }
1339
1340 void memory_region_unregister_iommu_notifier(Notifier *n)
1341 {
1342 notifier_remove(n);
1343 }
1344
1345 void memory_region_notify_iommu(MemoryRegion *mr,
1346 IOMMUTLBEntry entry)
1347 {
1348 assert(memory_region_is_iommu(mr));
1349 notifier_list_notify(&mr->iommu_notify, &entry);
1350 }
1351
1352 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1353 {
1354 uint8_t mask = 1 << client;
1355
1356 memory_region_transaction_begin();
1357 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1358 memory_region_update_pending |= mr->enabled;
1359 memory_region_transaction_commit();
1360 }
1361
1362 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1363 hwaddr size, unsigned client)
1364 {
1365 assert(mr->terminates);
1366 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1367 }
1368
1369 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1370 hwaddr size)
1371 {
1372 assert(mr->terminates);
1373 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size);
1374 }
1375
1376 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1377 hwaddr size, unsigned client)
1378 {
1379 bool ret;
1380 assert(mr->terminates);
1381 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1382 if (ret) {
1383 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1384 }
1385 return ret;
1386 }
1387
1388
1389 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1390 {
1391 AddressSpace *as;
1392 FlatRange *fr;
1393
1394 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1395 FlatView *view = address_space_get_flatview(as);
1396 FOR_EACH_FLAT_RANGE(fr, view) {
1397 if (fr->mr == mr) {
1398 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1399 }
1400 }
1401 flatview_unref(view);
1402 }
1403 }
1404
1405 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1406 {
1407 if (mr->readonly != readonly) {
1408 memory_region_transaction_begin();
1409 mr->readonly = readonly;
1410 memory_region_update_pending |= mr->enabled;
1411 memory_region_transaction_commit();
1412 }
1413 }
1414
1415 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1416 {
1417 if (mr->romd_mode != romd_mode) {
1418 memory_region_transaction_begin();
1419 mr->romd_mode = romd_mode;
1420 memory_region_update_pending |= mr->enabled;
1421 memory_region_transaction_commit();
1422 }
1423 }
1424
1425 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1426 hwaddr size, unsigned client)
1427 {
1428 assert(mr->terminates);
1429 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1430 }
1431
1432 int memory_region_get_fd(MemoryRegion *mr)
1433 {
1434 if (mr->alias) {
1435 return memory_region_get_fd(mr->alias);
1436 }
1437
1438 assert(mr->terminates);
1439
1440 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1441 }
1442
1443 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1444 {
1445 if (mr->alias) {
1446 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1447 }
1448
1449 assert(mr->terminates);
1450
1451 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1452 }
1453
1454 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1455 {
1456 FlatView *view;
1457 FlatRange *fr;
1458 CoalescedMemoryRange *cmr;
1459 AddrRange tmp;
1460 MemoryRegionSection section;
1461
1462 view = address_space_get_flatview(as);
1463 FOR_EACH_FLAT_RANGE(fr, view) {
1464 if (fr->mr == mr) {
1465 section = (MemoryRegionSection) {
1466 .address_space = as,
1467 .offset_within_address_space = int128_get64(fr->addr.start),
1468 .size = fr->addr.size,
1469 };
1470
1471 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1472 int128_get64(fr->addr.start),
1473 int128_get64(fr->addr.size));
1474 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1475 tmp = addrrange_shift(cmr->addr,
1476 int128_sub(fr->addr.start,
1477 int128_make64(fr->offset_in_region)));
1478 if (!addrrange_intersects(tmp, fr->addr)) {
1479 continue;
1480 }
1481 tmp = addrrange_intersection(tmp, fr->addr);
1482 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1483 int128_get64(tmp.start),
1484 int128_get64(tmp.size));
1485 }
1486 }
1487 }
1488 flatview_unref(view);
1489 }
1490
1491 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1492 {
1493 AddressSpace *as;
1494
1495 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1496 memory_region_update_coalesced_range_as(mr, as);
1497 }
1498 }
1499
1500 void memory_region_set_coalescing(MemoryRegion *mr)
1501 {
1502 memory_region_clear_coalescing(mr);
1503 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1504 }
1505
1506 void memory_region_add_coalescing(MemoryRegion *mr,
1507 hwaddr offset,
1508 uint64_t size)
1509 {
1510 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1511
1512 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1513 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1514 memory_region_update_coalesced_range(mr);
1515 memory_region_set_flush_coalesced(mr);
1516 }
1517
1518 void memory_region_clear_coalescing(MemoryRegion *mr)
1519 {
1520 CoalescedMemoryRange *cmr;
1521 bool updated = false;
1522
1523 qemu_flush_coalesced_mmio_buffer();
1524 mr->flush_coalesced_mmio = false;
1525
1526 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1527 cmr = QTAILQ_FIRST(&mr->coalesced);
1528 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1529 g_free(cmr);
1530 updated = true;
1531 }
1532
1533 if (updated) {
1534 memory_region_update_coalesced_range(mr);
1535 }
1536 }
1537
1538 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1539 {
1540 mr->flush_coalesced_mmio = true;
1541 }
1542
1543 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1544 {
1545 qemu_flush_coalesced_mmio_buffer();
1546 if (QTAILQ_EMPTY(&mr->coalesced)) {
1547 mr->flush_coalesced_mmio = false;
1548 }
1549 }
1550
1551 void memory_region_add_eventfd(MemoryRegion *mr,
1552 hwaddr addr,
1553 unsigned size,
1554 bool match_data,
1555 uint64_t data,
1556 EventNotifier *e)
1557 {
1558 MemoryRegionIoeventfd mrfd = {
1559 .addr.start = int128_make64(addr),
1560 .addr.size = int128_make64(size),
1561 .match_data = match_data,
1562 .data = data,
1563 .e = e,
1564 };
1565 unsigned i;
1566
1567 adjust_endianness(mr, &mrfd.data, size);
1568 memory_region_transaction_begin();
1569 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1570 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1571 break;
1572 }
1573 }
1574 ++mr->ioeventfd_nb;
1575 mr->ioeventfds = g_realloc(mr->ioeventfds,
1576 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1577 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1578 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1579 mr->ioeventfds[i] = mrfd;
1580 ioeventfd_update_pending |= mr->enabled;
1581 memory_region_transaction_commit();
1582 }
1583
1584 void memory_region_del_eventfd(MemoryRegion *mr,
1585 hwaddr addr,
1586 unsigned size,
1587 bool match_data,
1588 uint64_t data,
1589 EventNotifier *e)
1590 {
1591 MemoryRegionIoeventfd mrfd = {
1592 .addr.start = int128_make64(addr),
1593 .addr.size = int128_make64(size),
1594 .match_data = match_data,
1595 .data = data,
1596 .e = e,
1597 };
1598 unsigned i;
1599
1600 adjust_endianness(mr, &mrfd.data, size);
1601 memory_region_transaction_begin();
1602 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1603 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1604 break;
1605 }
1606 }
1607 assert(i != mr->ioeventfd_nb);
1608 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1609 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1610 --mr->ioeventfd_nb;
1611 mr->ioeventfds = g_realloc(mr->ioeventfds,
1612 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1613 ioeventfd_update_pending |= mr->enabled;
1614 memory_region_transaction_commit();
1615 }
1616
1617 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1618 {
1619 hwaddr offset = subregion->addr;
1620 MemoryRegion *mr = subregion->container;
1621 MemoryRegion *other;
1622
1623 memory_region_transaction_begin();
1624
1625 memory_region_ref(subregion);
1626 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1627 if (subregion->may_overlap || other->may_overlap) {
1628 continue;
1629 }
1630 if (int128_ge(int128_make64(offset),
1631 int128_add(int128_make64(other->addr), other->size))
1632 || int128_le(int128_add(int128_make64(offset), subregion->size),
1633 int128_make64(other->addr))) {
1634 continue;
1635 }
1636 #if 0
1637 printf("warning: subregion collision %llx/%llx (%s) "
1638 "vs %llx/%llx (%s)\n",
1639 (unsigned long long)offset,
1640 (unsigned long long)int128_get64(subregion->size),
1641 subregion->name,
1642 (unsigned long long)other->addr,
1643 (unsigned long long)int128_get64(other->size),
1644 other->name);
1645 #endif
1646 }
1647 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1648 if (subregion->priority >= other->priority) {
1649 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1650 goto done;
1651 }
1652 }
1653 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1654 done:
1655 memory_region_update_pending |= mr->enabled && subregion->enabled;
1656 memory_region_transaction_commit();
1657 }
1658
1659 static void memory_region_add_subregion_common(MemoryRegion *mr,
1660 hwaddr offset,
1661 MemoryRegion *subregion)
1662 {
1663 assert(!subregion->container);
1664 subregion->container = mr;
1665 subregion->addr = offset;
1666 memory_region_update_container_subregions(subregion);
1667 }
1668
1669 void memory_region_add_subregion(MemoryRegion *mr,
1670 hwaddr offset,
1671 MemoryRegion *subregion)
1672 {
1673 subregion->may_overlap = false;
1674 subregion->priority = 0;
1675 memory_region_add_subregion_common(mr, offset, subregion);
1676 }
1677
1678 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1679 hwaddr offset,
1680 MemoryRegion *subregion,
1681 int priority)
1682 {
1683 subregion->may_overlap = true;
1684 subregion->priority = priority;
1685 memory_region_add_subregion_common(mr, offset, subregion);
1686 }
1687
1688 void memory_region_del_subregion(MemoryRegion *mr,
1689 MemoryRegion *subregion)
1690 {
1691 memory_region_transaction_begin();
1692 assert(subregion->container == mr);
1693 subregion->container = NULL;
1694 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1695 memory_region_unref(subregion);
1696 memory_region_update_pending |= mr->enabled && subregion->enabled;
1697 memory_region_transaction_commit();
1698 }
1699
1700 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1701 {
1702 if (enabled == mr->enabled) {
1703 return;
1704 }
1705 memory_region_transaction_begin();
1706 mr->enabled = enabled;
1707 memory_region_update_pending = true;
1708 memory_region_transaction_commit();
1709 }
1710
1711 static void memory_region_readd_subregion(MemoryRegion *mr)
1712 {
1713 MemoryRegion *container = mr->container;
1714
1715 if (container) {
1716 memory_region_transaction_begin();
1717 memory_region_ref(mr);
1718 memory_region_del_subregion(container, mr);
1719 mr->container = container;
1720 memory_region_update_container_subregions(mr);
1721 memory_region_unref(mr);
1722 memory_region_transaction_commit();
1723 }
1724 }
1725
1726 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1727 {
1728 if (addr != mr->addr) {
1729 mr->addr = addr;
1730 memory_region_readd_subregion(mr);
1731 }
1732 }
1733
1734 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1735 {
1736 assert(mr->alias);
1737
1738 if (offset == mr->alias_offset) {
1739 return;
1740 }
1741
1742 memory_region_transaction_begin();
1743 mr->alias_offset = offset;
1744 memory_region_update_pending |= mr->enabled;
1745 memory_region_transaction_commit();
1746 }
1747
1748 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1749 {
1750 return mr->ram_addr;
1751 }
1752
1753 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1754 {
1755 const AddrRange *addr = addr_;
1756 const FlatRange *fr = fr_;
1757
1758 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1759 return -1;
1760 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1761 return 1;
1762 }
1763 return 0;
1764 }
1765
1766 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1767 {
1768 return bsearch(&addr, view->ranges, view->nr,
1769 sizeof(FlatRange), cmp_flatrange_addr);
1770 }
1771
1772 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1773 {
1774 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1775 if (!mr || (mr == container)) {
1776 return false;
1777 }
1778 memory_region_unref(mr);
1779 return true;
1780 }
1781
1782 bool memory_region_is_mapped(MemoryRegion *mr)
1783 {
1784 return mr->container ? true : false;
1785 }
1786
1787 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1788 hwaddr addr, uint64_t size)
1789 {
1790 MemoryRegionSection ret = { .mr = NULL };
1791 MemoryRegion *root;
1792 AddressSpace *as;
1793 AddrRange range;
1794 FlatView *view;
1795 FlatRange *fr;
1796
1797 addr += mr->addr;
1798 for (root = mr; root->container; ) {
1799 root = root->container;
1800 addr += root->addr;
1801 }
1802
1803 as = memory_region_to_address_space(root);
1804 if (!as) {
1805 return ret;
1806 }
1807 range = addrrange_make(int128_make64(addr), int128_make64(size));
1808
1809 view = address_space_get_flatview(as);
1810 fr = flatview_lookup(view, range);
1811 if (!fr) {
1812 flatview_unref(view);
1813 return ret;
1814 }
1815
1816 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1817 --fr;
1818 }
1819
1820 ret.mr = fr->mr;
1821 ret.address_space = as;
1822 range = addrrange_intersection(range, fr->addr);
1823 ret.offset_within_region = fr->offset_in_region;
1824 ret.offset_within_region += int128_get64(int128_sub(range.start,
1825 fr->addr.start));
1826 ret.size = range.size;
1827 ret.offset_within_address_space = int128_get64(range.start);
1828 ret.readonly = fr->readonly;
1829 memory_region_ref(ret.mr);
1830
1831 flatview_unref(view);
1832 return ret;
1833 }
1834
1835 void address_space_sync_dirty_bitmap(AddressSpace *as)
1836 {
1837 FlatView *view;
1838 FlatRange *fr;
1839
1840 view = address_space_get_flatview(as);
1841 FOR_EACH_FLAT_RANGE(fr, view) {
1842 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1843 }
1844 flatview_unref(view);
1845 }
1846
1847 void memory_global_dirty_log_start(void)
1848 {
1849 global_dirty_log = true;
1850 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1851 }
1852
1853 void memory_global_dirty_log_stop(void)
1854 {
1855 global_dirty_log = false;
1856 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1857 }
1858
1859 static void listener_add_address_space(MemoryListener *listener,
1860 AddressSpace *as)
1861 {
1862 FlatView *view;
1863 FlatRange *fr;
1864
1865 if (listener->address_space_filter
1866 && listener->address_space_filter != as) {
1867 return;
1868 }
1869
1870 if (global_dirty_log) {
1871 if (listener->log_global_start) {
1872 listener->log_global_start(listener);
1873 }
1874 }
1875
1876 view = address_space_get_flatview(as);
1877 FOR_EACH_FLAT_RANGE(fr, view) {
1878 MemoryRegionSection section = {
1879 .mr = fr->mr,
1880 .address_space = as,
1881 .offset_within_region = fr->offset_in_region,
1882 .size = fr->addr.size,
1883 .offset_within_address_space = int128_get64(fr->addr.start),
1884 .readonly = fr->readonly,
1885 };
1886 if (listener->region_add) {
1887 listener->region_add(listener, &section);
1888 }
1889 }
1890 flatview_unref(view);
1891 }
1892
1893 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1894 {
1895 MemoryListener *other = NULL;
1896 AddressSpace *as;
1897
1898 listener->address_space_filter = filter;
1899 if (QTAILQ_EMPTY(&memory_listeners)
1900 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1901 memory_listeners)->priority) {
1902 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1903 } else {
1904 QTAILQ_FOREACH(other, &memory_listeners, link) {
1905 if (listener->priority < other->priority) {
1906 break;
1907 }
1908 }
1909 QTAILQ_INSERT_BEFORE(other, listener, link);
1910 }
1911
1912 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1913 listener_add_address_space(listener, as);
1914 }
1915 }
1916
1917 void memory_listener_unregister(MemoryListener *listener)
1918 {
1919 QTAILQ_REMOVE(&memory_listeners, listener, link);
1920 }
1921
1922 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1923 {
1924 if (QTAILQ_EMPTY(&address_spaces)) {
1925 memory_init();
1926 }
1927
1928 memory_region_transaction_begin();
1929 as->root = root;
1930 as->current_map = g_new(FlatView, 1);
1931 flatview_init(as->current_map);
1932 as->ioeventfd_nb = 0;
1933 as->ioeventfds = NULL;
1934 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1935 as->name = g_strdup(name ? name : "anonymous");
1936 address_space_init_dispatch(as);
1937 memory_region_update_pending |= root->enabled;
1938 memory_region_transaction_commit();
1939 }
1940
1941 void address_space_destroy(AddressSpace *as)
1942 {
1943 MemoryListener *listener;
1944
1945 /* Flush out anything from MemoryListeners listening in on this */
1946 memory_region_transaction_begin();
1947 as->root = NULL;
1948 memory_region_transaction_commit();
1949 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1950 address_space_destroy_dispatch(as);
1951
1952 QTAILQ_FOREACH(listener, &memory_listeners, link) {
1953 assert(listener->address_space_filter != as);
1954 }
1955
1956 flatview_unref(as->current_map);
1957 g_free(as->name);
1958 g_free(as->ioeventfds);
1959 }
1960
1961 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1962 {
1963 return memory_region_dispatch_read(mr, addr, pval, size);
1964 }
1965
1966 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1967 uint64_t val, unsigned size)
1968 {
1969 return memory_region_dispatch_write(mr, addr, val, size);
1970 }
1971
1972 typedef struct MemoryRegionList MemoryRegionList;
1973
1974 struct MemoryRegionList {
1975 const MemoryRegion *mr;
1976 QTAILQ_ENTRY(MemoryRegionList) queue;
1977 };
1978
1979 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1980
1981 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1982 const MemoryRegion *mr, unsigned int level,
1983 hwaddr base,
1984 MemoryRegionListHead *alias_print_queue)
1985 {
1986 MemoryRegionList *new_ml, *ml, *next_ml;
1987 MemoryRegionListHead submr_print_queue;
1988 const MemoryRegion *submr;
1989 unsigned int i;
1990
1991 if (!mr || !mr->enabled) {
1992 return;
1993 }
1994
1995 for (i = 0; i < level; i++) {
1996 mon_printf(f, " ");
1997 }
1998
1999 if (mr->alias) {
2000 MemoryRegionList *ml;
2001 bool found = false;
2002
2003 /* check if the alias is already in the queue */
2004 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2005 if (ml->mr == mr->alias) {
2006 found = true;
2007 }
2008 }
2009
2010 if (!found) {
2011 ml = g_new(MemoryRegionList, 1);
2012 ml->mr = mr->alias;
2013 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2014 }
2015 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2016 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2017 "-" TARGET_FMT_plx "\n",
2018 base + mr->addr,
2019 base + mr->addr
2020 + (int128_nz(mr->size) ?
2021 (hwaddr)int128_get64(int128_sub(mr->size,
2022 int128_one())) : 0),
2023 mr->priority,
2024 mr->romd_mode ? 'R' : '-',
2025 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2026 : '-',
2027 memory_region_name(mr),
2028 memory_region_name(mr->alias),
2029 mr->alias_offset,
2030 mr->alias_offset
2031 + (int128_nz(mr->size) ?
2032 (hwaddr)int128_get64(int128_sub(mr->size,
2033 int128_one())) : 0));
2034 } else {
2035 mon_printf(f,
2036 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
2037 base + mr->addr,
2038 base + mr->addr
2039 + (int128_nz(mr->size) ?
2040 (hwaddr)int128_get64(int128_sub(mr->size,
2041 int128_one())) : 0),
2042 mr->priority,
2043 mr->romd_mode ? 'R' : '-',
2044 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2045 : '-',
2046 memory_region_name(mr));
2047 }
2048
2049 QTAILQ_INIT(&submr_print_queue);
2050
2051 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2052 new_ml = g_new(MemoryRegionList, 1);
2053 new_ml->mr = submr;
2054 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2055 if (new_ml->mr->addr < ml->mr->addr ||
2056 (new_ml->mr->addr == ml->mr->addr &&
2057 new_ml->mr->priority > ml->mr->priority)) {
2058 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2059 new_ml = NULL;
2060 break;
2061 }
2062 }
2063 if (new_ml) {
2064 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2065 }
2066 }
2067
2068 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2069 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2070 alias_print_queue);
2071 }
2072
2073 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2074 g_free(ml);
2075 }
2076 }
2077
2078 void mtree_info(fprintf_function mon_printf, void *f)
2079 {
2080 MemoryRegionListHead ml_head;
2081 MemoryRegionList *ml, *ml2;
2082 AddressSpace *as;
2083
2084 QTAILQ_INIT(&ml_head);
2085
2086 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2087 mon_printf(f, "%s\n", as->name);
2088 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
2089 }
2090
2091 mon_printf(f, "aliases\n");
2092 /* print aliased regions */
2093 QTAILQ_FOREACH(ml, &ml_head, queue) {
2094 mon_printf(f, "%s\n", memory_region_name(ml->mr));
2095 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
2096 }
2097
2098 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2099 g_free(ml);
2100 }
2101 }
2102
2103 static const TypeInfo memory_region_info = {
2104 .parent = TYPE_OBJECT,
2105 .name = TYPE_MEMORY_REGION,
2106 .instance_size = sizeof(MemoryRegion),
2107 .instance_init = memory_region_initfn,
2108 .instance_finalize = memory_region_finalize,
2109 };
2110
2111 static void memory_register_types(void)
2112 {
2113 type_register_static(&memory_region_info);
2114 }
2115
2116 type_init(memory_register_types)
AR7 emulation for QEMU