include/hw/pci/pcie_host.h

   1 /*
   2  * pcie_host.h
   3  *
   4  * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
   5  *                    VA Linux Systems Japan K.K.
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16
  17  * You should have received a copy of the GNU General Public License along
  18  * with this program; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #ifndef PCIE_HOST_H
  22 #define PCIE_HOST_H
  23
  24 #include "hw/pci/pci_host.h"
  25 #include "exec/memory.h"
  26
  27 #define TYPE_PCIE_HOST_BRIDGE "pcie-host-bridge"
  28 #define PCIE_HOST_BRIDGE(obj) \
  29     OBJECT_CHECK(PCIExpressHost, (obj), TYPE_PCIE_HOST_BRIDGE)
  30
  31 #define PCIE_HOST_MCFG_BASE "MCFG"
  32 #define PCIE_HOST_MCFG_SIZE "mcfg_size"
  33
  34 /* pcie_host::base_addr == PCIE_BASE_ADDR_UNMAPPED when it isn't mapped. */
  35 #define PCIE_BASE_ADDR_UNMAPPED  ((hwaddr)-1ULL)
  36
  37 struct PCIExpressHost {
  38     PCIHostState pci;
  39
  40     /* express part */
  41
  42     /* base address where MMCONFIG area is mapped. */
  43     hwaddr  base_addr;
  44
  45     /* the size of MMCONFIG area. It's host bridge dependent */
  46     hwaddr  size;
  47
  48     /* MMCONFIG mmio area */
  49     MemoryRegion mmio;
  50 };
  51
  52 void pcie_host_mmcfg_unmap(PCIExpressHost *e);
  53 void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size);
  54 void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr, uint32_t size);
  55 void pcie_host_mmcfg_update(PCIExpressHost *e,
  56                             int enable,
  57                             hwaddr addr,
  58                             uint32_t size);
  59
  60 /*
  61  * PCI express ECAM (Enhanced Configuration Address Mapping) format.
  62  * AKA mmcfg address
  63  * bit 20 - 28: bus number
  64  * bit 15 - 19: device number
  65  * bit 12 - 14: function number
  66  * bit  0 - 11: offset in configuration space of a given device
  67  */
  68 #define PCIE_MMCFG_SIZE_MAX             (1ULL << 28)
  69 #define PCIE_MMCFG_SIZE_MIN             (1ULL << 20)
  70 #define PCIE_MMCFG_BUS_BIT              20
  71 #define PCIE_MMCFG_BUS_MASK             0x1ff
  72 #define PCIE_MMCFG_DEVFN_BIT            12
  73 #define PCIE_MMCFG_DEVFN_MASK           0xff
  74 #define PCIE_MMCFG_CONFOFFSET_MASK      0xfff
  75 #define PCIE_MMCFG_BUS(addr)            (((addr) >> PCIE_MMCFG_BUS_BIT) & \
  76                                          PCIE_MMCFG_BUS_MASK)
  77 #define PCIE_MMCFG_DEVFN(addr)          (((addr) >> PCIE_MMCFG_DEVFN_BIT) & \
  78                                          PCIE_MMCFG_DEVFN_MASK)
  79 #define PCIE_MMCFG_CONFOFFSET(addr)     ((addr) & PCIE_MMCFG_CONFOFFSET_MASK)
  80
  81 #endif /* PCIE_HOST_H */