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migration: set file error on subsection loading
[qemu/ar7.git] / system / memory.c
blob4928f2525de12afbc55231d3b230f239dedbbf07
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "qemu/osdep.h"
17 #include "qemu/log.h"
18 #include "qapi/error.h"
19 #include "exec/memory.h"
20 #include "qapi/visitor.h"
21 #include "qemu/bitops.h"
22 #include "qemu/error-report.h"
23 #include "qemu/main-loop.h"
24 #include "qemu/qemu-print.h"
25 #include "qom/object.h"
26 #include "trace.h"
27
28 #include "exec/memory-internal.h"
29 #include "exec/ram_addr.h"
30 #include "sysemu/kvm.h"
31 #include "sysemu/runstate.h"
32 #include "sysemu/tcg.h"
33 #include "qemu/accel.h"
34 #include "hw/boards.h"
35 #include "migration/vmstate.h"
36 #include "exec/address-spaces.h"
37
38 //#define DEBUG_UNASSIGNED
39
40 static unsigned memory_region_transaction_depth;
41 static bool memory_region_update_pending;
42 static bool ioeventfd_update_pending;
43 unsigned int global_dirty_tracking;
44
45 static QTAILQ_HEAD(, MemoryListener) memory_listeners
46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
47
48 static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
51 static GHashTable *flat_views;
52
53 typedef struct AddrRange AddrRange;
54
55 /*
56 * Note that signed integers are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
116 } \
117 break; \
118 case Reverse: \
119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
130 #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
137 if (_listener->_callback) { \
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
144 if (_listener->_callback) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 do { \
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
160 } while(0)
161
162 struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165 };
166
167 struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
171 EventNotifier *e;
172 };
173
174 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
176 {
177 if (int128_lt(a->addr.start, b->addr.start)) {
178 return true;
179 } else if (int128_gt(a->addr.start, b->addr.start)) {
180 return false;
181 } else if (int128_lt(a->addr.size, b->addr.size)) {
182 return true;
183 } else if (int128_gt(a->addr.size, b->addr.size)) {
184 return false;
185 } else if (a->match_data < b->match_data) {
186 return true;
187 } else if (a->match_data > b->match_data) {
188 return false;
189 } else if (a->match_data) {
190 if (a->data < b->data) {
191 return true;
192 } else if (a->data > b->data) {
193 return false;
194 }
195 }
196 if (a->e < b->e) {
197 return true;
198 } else if (a->e > b->e) {
199 return false;
200 }
201 return false;
202 }
203
204 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
206 {
207 if (int128_eq(a->addr.start, b->addr.start) &&
208 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
209 (int128_eq(a->addr.size, b->addr.size) &&
210 (a->match_data == b->match_data) &&
211 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
212 (a->e == b->e))))
213 return true;
214
215 return false;
216 }
217
218 /* Range of memory in the global map. Addresses are absolute. */
219 struct FlatRange {
220 MemoryRegion *mr;
221 hwaddr offset_in_region;
222 AddrRange addr;
223 uint8_t dirty_log_mask;
224 bool romd_mode;
225 bool readonly;
226 bool nonvolatile;
227 bool unmergeable;
228 };
229
230 #define FOR_EACH_FLAT_RANGE(var, view) \
231 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
232
233 static inline MemoryRegionSection
234 section_from_flat_range(FlatRange *fr, FlatView *fv)
235 {
236 return (MemoryRegionSection) {
237 .mr = fr->mr,
238 .fv = fv,
239 .offset_within_region = fr->offset_in_region,
240 .size = fr->addr.size,
241 .offset_within_address_space = int128_get64(fr->addr.start),
242 .readonly = fr->readonly,
243 .nonvolatile = fr->nonvolatile,
244 .unmergeable = fr->unmergeable,
245 };
246 }
247
248 static bool flatrange_equal(FlatRange *a, FlatRange *b)
249 {
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
252 && a->offset_in_region == b->offset_in_region
253 && a->romd_mode == b->romd_mode
254 && a->readonly == b->readonly
255 && a->nonvolatile == b->nonvolatile
256 && a->unmergeable == b->unmergeable;
257 }
258
259 static FlatView *flatview_new(MemoryRegion *mr_root)
260 {
261 FlatView *view;
262
263 view = g_new0(FlatView, 1);
264 view->ref = 1;
265 view->root = mr_root;
266 memory_region_ref(mr_root);
267 trace_flatview_new(view, mr_root);
268
269 return view;
270 }
271
272 /* Insert a range into a given position. Caller is responsible for maintaining
273 * sorting order.
274 */
275 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
276 {
277 if (view->nr == view->nr_allocated) {
278 view->nr_allocated = MAX(2 * view->nr, 10);
279 view->ranges = g_realloc(view->ranges,
280 view->nr_allocated * sizeof(*view->ranges));
281 }
282 memmove(view->ranges + pos + 1, view->ranges + pos,
283 (view->nr - pos) * sizeof(FlatRange));
284 view->ranges[pos] = *range;
285 memory_region_ref(range->mr);
286 ++view->nr;
287 }
288
289 static void flatview_destroy(FlatView *view)
290 {
291 int i;
292
293 trace_flatview_destroy(view, view->root);
294 if (view->dispatch) {
295 address_space_dispatch_free(view->dispatch);
296 }
297 for (i = 0; i < view->nr; i++) {
298 memory_region_unref(view->ranges[i].mr);
299 }
300 g_free(view->ranges);
301 memory_region_unref(view->root);
302 g_free(view);
303 }
304
305 static bool flatview_ref(FlatView *view)
306 {
307 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
308 }
309
310 void flatview_unref(FlatView *view)
311 {
312 if (qatomic_fetch_dec(&view->ref) == 1) {
313 trace_flatview_destroy_rcu(view, view->root);
314 assert(view->root);
315 call_rcu(view, flatview_destroy, rcu);
316 }
317 }
318
319 static bool can_merge(FlatRange *r1, FlatRange *r2)
320 {
321 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
322 && r1->mr == r2->mr
323 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
324 r1->addr.size),
325 int128_make64(r2->offset_in_region))
326 && r1->dirty_log_mask == r2->dirty_log_mask
327 && r1->romd_mode == r2->romd_mode
328 && r1->readonly == r2->readonly
329 && r1->nonvolatile == r2->nonvolatile
330 && !r1->unmergeable && !r2->unmergeable;
331 }
332
333 /* Attempt to simplify a view by merging adjacent ranges */
334 static void flatview_simplify(FlatView *view)
335 {
336 unsigned i, j, k;
337
338 i = 0;
339 while (i < view->nr) {
340 j = i + 1;
341 while (j < view->nr
342 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
343 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
344 ++j;
345 }
346 ++i;
347 for (k = i; k < j; k++) {
348 memory_region_unref(view->ranges[k].mr);
349 }
350 memmove(&view->ranges[i], &view->ranges[j],
351 (view->nr - j) * sizeof(view->ranges[j]));
352 view->nr -= j - i;
353 }
354 }
355
356 static bool memory_region_big_endian(MemoryRegion *mr)
357 {
358 #if TARGET_BIG_ENDIAN
359 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
360 #else
361 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
362 #endif
363 }
364
365 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
366 {
367 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
368 switch (op & MO_SIZE) {
369 case MO_8:
370 break;
371 case MO_16:
372 *data = bswap16(*data);
373 break;
374 case MO_32:
375 *data = bswap32(*data);
376 break;
377 case MO_64:
378 *data = bswap64(*data);
379 break;
380 default:
381 g_assert_not_reached();
382 }
383 }
384 }
385
386 static inline void memory_region_shift_read_access(uint64_t *value,
387 signed shift,
388 uint64_t mask,
389 uint64_t tmp)
390 {
391 if (shift >= 0) {
392 *value |= (tmp & mask) << shift;
393 } else {
394 *value |= (tmp & mask) >> -shift;
395 }
396 }
397
398 static inline uint64_t memory_region_shift_write_access(uint64_t *value,
399 signed shift,
400 uint64_t mask)
401 {
402 uint64_t tmp;
403
404 if (shift >= 0) {
405 tmp = (*value >> shift) & mask;
406 } else {
407 tmp = (*value << -shift) & mask;
408 }
409
410 return tmp;
411 }
412
413 static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
414 {
415 MemoryRegion *root;
416 hwaddr abs_addr = offset;
417
418 abs_addr += mr->addr;
419 for (root = mr; root->container; ) {
420 root = root->container;
421 abs_addr += root->addr;
422 }
423
424 return abs_addr;
425 }
426
427 static int get_cpu_index(void)
428 {
429 if (current_cpu) {
430 return current_cpu->cpu_index;
431 }
432 return -1;
433 }
434
435 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
436 hwaddr addr,
437 uint64_t *value,
438 unsigned size,
439 signed shift,
440 uint64_t mask,
441 MemTxAttrs attrs)
442 {
443 uint64_t tmp;
444
445 tmp = mr->ops->read(mr->opaque, addr, size);
446 if (mr->subpage) {
447 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
448 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
449 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
450 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
451 memory_region_name(mr));
452 }
453 memory_region_shift_read_access(value, shift, mask, tmp);
454 return MEMTX_OK;
455 }
456
457 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
458 hwaddr addr,
459 uint64_t *value,
460 unsigned size,
461 signed shift,
462 uint64_t mask,
463 MemTxAttrs attrs)
464 {
465 uint64_t tmp = 0;
466 MemTxResult r;
467
468 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
469 if (mr->subpage) {
470 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
471 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
472 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
473 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
474 memory_region_name(mr));
475 }
476 memory_region_shift_read_access(value, shift, mask, tmp);
477 return r;
478 }
479
480 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
481 hwaddr addr,
482 uint64_t *value,
483 unsigned size,
484 signed shift,
485 uint64_t mask,
486 MemTxAttrs attrs)
487 {
488 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
489
490 if (mr->subpage) {
491 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
492 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
493 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
494 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
495 memory_region_name(mr));
496 }
497 mr->ops->write(mr->opaque, addr, tmp, size);
498 return MEMTX_OK;
499 }
500
501 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
502 hwaddr addr,
503 uint64_t *value,
504 unsigned size,
505 signed shift,
506 uint64_t mask,
507 MemTxAttrs attrs)
508 {
509 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
510
511 if (mr->subpage) {
512 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
513 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
514 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
515 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
516 memory_region_name(mr));
517 }
518 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
519 }
520
521 static MemTxResult access_with_adjusted_size(hwaddr addr,
522 uint64_t *value,
523 unsigned size,
524 unsigned access_size_min,
525 unsigned access_size_max,
526 MemTxResult (*access_fn)
527 (MemoryRegion *mr,
528 hwaddr addr,
529 uint64_t *value,
530 unsigned size,
531 signed shift,
532 uint64_t mask,
533 MemTxAttrs attrs),
534 MemoryRegion *mr,
535 MemTxAttrs attrs)
536 {
537 uint64_t access_mask;
538 unsigned access_size;
539 unsigned i;
540 MemTxResult r = MEMTX_OK;
541 bool reentrancy_guard_applied = false;
542
543 if (!access_size_min) {
544 access_size_min = 1;
545 }
546 if (!access_size_max) {
547 access_size_max = 4;
548 }
549
550 /* Do not allow more than one simultaneous access to a device's IO Regions */
551 if (mr->dev && !mr->disable_reentrancy_guard &&
552 !mr->ram_device && !mr->ram && !mr->rom_device && !mr->readonly) {
553 if (mr->dev->mem_reentrancy_guard.engaged_in_io) {
554 warn_report_once("Blocked re-entrant IO on MemoryRegion: "
555 "%s at addr: 0x%" HWADDR_PRIX,
556 memory_region_name(mr), addr);
557 return MEMTX_ACCESS_ERROR;
558 }
559 mr->dev->mem_reentrancy_guard.engaged_in_io = true;
560 reentrancy_guard_applied = true;
561 }
562
563 /* FIXME: support unaligned access? */
564 access_size = MAX(MIN(size, access_size_max), access_size_min);
565 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
566 if (memory_region_big_endian(mr)) {
567 for (i = 0; i < size; i += access_size) {
568 r |= access_fn(mr, addr + i, value, access_size,
569 (size - access_size - i) * 8, access_mask, attrs);
570 }
571 } else {
572 for (i = 0; i < size; i += access_size) {
573 r |= access_fn(mr, addr + i, value, access_size, i * 8,
574 access_mask, attrs);
575 }
576 }
577 if (mr->dev && reentrancy_guard_applied) {
578 mr->dev->mem_reentrancy_guard.engaged_in_io = false;
579 }
580 return r;
581 }
582
583 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
584 {
585 AddressSpace *as;
586
587 while (mr->container) {
588 mr = mr->container;
589 }
590 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
591 if (mr == as->root) {
592 return as;
593 }
594 }
595 return NULL;
596 }
597
598 /* Render a memory region into the global view. Ranges in @view obscure
599 * ranges in @mr.
600 */
601 static void render_memory_region(FlatView *view,
602 MemoryRegion *mr,
603 Int128 base,
604 AddrRange clip,
605 bool readonly,
606 bool nonvolatile,
607 bool unmergeable)
608 {
609 MemoryRegion *subregion;
610 unsigned i;
611 hwaddr offset_in_region;
612 Int128 remain;
613 Int128 now;
614 FlatRange fr;
615 AddrRange tmp;
616
617 if (!mr->enabled) {
618 return;
619 }
620
621 int128_addto(&base, int128_make64(mr->addr));
622 readonly |= mr->readonly;
623 nonvolatile |= mr->nonvolatile;
624 unmergeable |= mr->unmergeable;
625
626 tmp = addrrange_make(base, mr->size);
627
628 if (!addrrange_intersects(tmp, clip)) {
629 return;
630 }
631
632 clip = addrrange_intersection(tmp, clip);
633
634 if (mr->alias) {
635 int128_subfrom(&base, int128_make64(mr->alias->addr));
636 int128_subfrom(&base, int128_make64(mr->alias_offset));
637 render_memory_region(view, mr->alias, base, clip,
638 readonly, nonvolatile, unmergeable);
639 return;
640 }
641
642 /* Render subregions in priority order. */
643 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
644 render_memory_region(view, subregion, base, clip,
645 readonly, nonvolatile, unmergeable);
646 }
647
648 if (!mr->terminates) {
649 return;
650 }
651
652 offset_in_region = int128_get64(int128_sub(clip.start, base));
653 base = clip.start;
654 remain = clip.size;
655
656 fr.mr = mr;
657 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
658 fr.romd_mode = mr->romd_mode;
659 fr.readonly = readonly;
660 fr.nonvolatile = nonvolatile;
661 fr.unmergeable = unmergeable;
662
663 /* Render the region itself into any gaps left by the current view. */
664 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
665 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
666 continue;
667 }
668 if (int128_lt(base, view->ranges[i].addr.start)) {
669 now = int128_min(remain,
670 int128_sub(view->ranges[i].addr.start, base));
671 fr.offset_in_region = offset_in_region;
672 fr.addr = addrrange_make(base, now);
673 flatview_insert(view, i, &fr);
674 ++i;
675 int128_addto(&base, now);
676 offset_in_region += int128_get64(now);
677 int128_subfrom(&remain, now);
678 }
679 now = int128_sub(int128_min(int128_add(base, remain),
680 addrrange_end(view->ranges[i].addr)),
681 base);
682 int128_addto(&base, now);
683 offset_in_region += int128_get64(now);
684 int128_subfrom(&remain, now);
685 }
686 if (int128_nz(remain)) {
687 fr.offset_in_region = offset_in_region;
688 fr.addr = addrrange_make(base, remain);
689 flatview_insert(view, i, &fr);
690 }
691 }
692
693 void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
694 {
695 FlatRange *fr;
696
697 assert(fv);
698 assert(cb);
699
700 FOR_EACH_FLAT_RANGE(fr, fv) {
701 if (cb(fr->addr.start, fr->addr.size, fr->mr,
702 fr->offset_in_region, opaque)) {
703 break;
704 }
705 }
706 }
707
708 static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
709 {
710 while (mr->enabled) {
711 if (mr->alias) {
712 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
713 /* The alias is included in its entirety. Use it as
714 * the "real" root, so that we can share more FlatViews.
715 */
716 mr = mr->alias;
717 continue;
718 }
719 } else if (!mr->terminates) {
720 unsigned int found = 0;
721 MemoryRegion *child, *next = NULL;
722 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
723 if (child->enabled) {
724 if (++found > 1) {
725 next = NULL;
726 break;
727 }
728 if (!child->addr && int128_ge(mr->size, child->size)) {
729 /* A child is included in its entirety. If it's the only
730 * enabled one, use it in the hope of finding an alias down the
731 * way. This will also let us share FlatViews.
732 */
733 next = child;
734 }
735 }
736 }
737 if (found == 0) {
738 return NULL;
739 }
740 if (next) {
741 mr = next;
742 continue;
743 }
744 }
745
746 return mr;
747 }
748
749 return NULL;
750 }
751
752 /* Render a memory topology into a list of disjoint absolute ranges. */
753 static FlatView *generate_memory_topology(MemoryRegion *mr)
754 {
755 int i;
756 FlatView *view;
757
758 view = flatview_new(mr);
759
760 if (mr) {
761 render_memory_region(view, mr, int128_zero(),
762 addrrange_make(int128_zero(), int128_2_64()),
763 false, false, false);
764 }
765 flatview_simplify(view);
766
767 view->dispatch = address_space_dispatch_new(view);
768 for (i = 0; i < view->nr; i++) {
769 MemoryRegionSection mrs =
770 section_from_flat_range(&view->ranges[i], view);
771 flatview_add_to_dispatch(view, &mrs);
772 }
773 address_space_dispatch_compact(view->dispatch);
774 g_hash_table_replace(flat_views, mr, view);
775
776 return view;
777 }
778
779 static void address_space_add_del_ioeventfds(AddressSpace *as,
780 MemoryRegionIoeventfd *fds_new,
781 unsigned fds_new_nb,
782 MemoryRegionIoeventfd *fds_old,
783 unsigned fds_old_nb)
784 {
785 unsigned iold, inew;
786 MemoryRegionIoeventfd *fd;
787 MemoryRegionSection section;
788
789 /* Generate a symmetric difference of the old and new fd sets, adding
790 * and deleting as necessary.
791 */
792
793 iold = inew = 0;
794 while (iold < fds_old_nb || inew < fds_new_nb) {
795 if (iold < fds_old_nb
796 && (inew == fds_new_nb
797 || memory_region_ioeventfd_before(&fds_old[iold],
798 &fds_new[inew]))) {
799 fd = &fds_old[iold];
800 section = (MemoryRegionSection) {
801 .fv = address_space_to_flatview(as),
802 .offset_within_address_space = int128_get64(fd->addr.start),
803 .size = fd->addr.size,
804 };
805 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
806 fd->match_data, fd->data, fd->e);
807 ++iold;
808 } else if (inew < fds_new_nb
809 && (iold == fds_old_nb
810 || memory_region_ioeventfd_before(&fds_new[inew],
811 &fds_old[iold]))) {
812 fd = &fds_new[inew];
813 section = (MemoryRegionSection) {
814 .fv = address_space_to_flatview(as),
815 .offset_within_address_space = int128_get64(fd->addr.start),
816 .size = fd->addr.size,
817 };
818 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
819 fd->match_data, fd->data, fd->e);
820 ++inew;
821 } else {
822 ++iold;
823 ++inew;
824 }
825 }
826 }
827
828 FlatView *address_space_get_flatview(AddressSpace *as)
829 {
830 FlatView *view;
831
832 RCU_READ_LOCK_GUARD();
833 do {
834 view = address_space_to_flatview(as);
835 /* If somebody has replaced as->current_map concurrently,
836 * flatview_ref returns false.
837 */
838 } while (!flatview_ref(view));
839 return view;
840 }
841
842 static void address_space_update_ioeventfds(AddressSpace *as)
843 {
844 FlatView *view;
845 FlatRange *fr;
846 unsigned ioeventfd_nb = 0;
847 unsigned ioeventfd_max;
848 MemoryRegionIoeventfd *ioeventfds;
849 AddrRange tmp;
850 unsigned i;
851
852 if (!as->ioeventfd_notifiers) {
853 return;
854 }
855
856 /*
857 * It is likely that the number of ioeventfds hasn't changed much, so use
858 * the previous size as the starting value, with some headroom to avoid
859 * gratuitous reallocations.
860 */
861 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
862 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
863
864 view = address_space_get_flatview(as);
865 FOR_EACH_FLAT_RANGE(fr, view) {
866 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
867 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
868 int128_sub(fr->addr.start,
869 int128_make64(fr->offset_in_region)));
870 if (addrrange_intersects(fr->addr, tmp)) {
871 ++ioeventfd_nb;
872 if (ioeventfd_nb > ioeventfd_max) {
873 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
874 ioeventfds = g_realloc(ioeventfds,
875 ioeventfd_max * sizeof(*ioeventfds));
876 }
877 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
878 ioeventfds[ioeventfd_nb-1].addr = tmp;
879 }
880 }
881 }
882
883 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
884 as->ioeventfds, as->ioeventfd_nb);
885
886 g_free(as->ioeventfds);
887 as->ioeventfds = ioeventfds;
888 as->ioeventfd_nb = ioeventfd_nb;
889 flatview_unref(view);
890 }
891
892 /*
893 * Notify the memory listeners about the coalesced IO change events of
894 * range `cmr'. Only the part that has intersection of the specified
895 * FlatRange will be sent.
896 */
897 static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
898 CoalescedMemoryRange *cmr, bool add)
899 {
900 AddrRange tmp;
901
902 tmp = addrrange_shift(cmr->addr,
903 int128_sub(fr->addr.start,
904 int128_make64(fr->offset_in_region)));
905 if (!addrrange_intersects(tmp, fr->addr)) {
906 return;
907 }
908 tmp = addrrange_intersection(tmp, fr->addr);
909
910 if (add) {
911 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
912 int128_get64(tmp.start),
913 int128_get64(tmp.size));
914 } else {
915 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
916 int128_get64(tmp.start),
917 int128_get64(tmp.size));
918 }
919 }
920
921 static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
922 {
923 CoalescedMemoryRange *cmr;
924
925 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
926 flat_range_coalesced_io_notify(fr, as, cmr, false);
927 }
928 }
929
930 static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
931 {
932 MemoryRegion *mr = fr->mr;
933 CoalescedMemoryRange *cmr;
934
935 if (QTAILQ_EMPTY(&mr->coalesced)) {
936 return;
937 }
938
939 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
940 flat_range_coalesced_io_notify(fr, as, cmr, true);
941 }
942 }
943
944 static void address_space_update_topology_pass(AddressSpace *as,
945 const FlatView *old_view,
946 const FlatView *new_view,
947 bool adding)
948 {
949 unsigned iold, inew;
950 FlatRange *frold, *frnew;
951
952 /* Generate a symmetric difference of the old and new memory maps.
953 * Kill ranges in the old map, and instantiate ranges in the new map.
954 */
955 iold = inew = 0;
956 while (iold < old_view->nr || inew < new_view->nr) {
957 if (iold < old_view->nr) {
958 frold = &old_view->ranges[iold];
959 } else {
960 frold = NULL;
961 }
962 if (inew < new_view->nr) {
963 frnew = &new_view->ranges[inew];
964 } else {
965 frnew = NULL;
966 }
967
968 if (frold
969 && (!frnew
970 || int128_lt(frold->addr.start, frnew->addr.start)
971 || (int128_eq(frold->addr.start, frnew->addr.start)
972 && !flatrange_equal(frold, frnew)))) {
973 /* In old but not in new, or in both but attributes changed. */
974
975 if (!adding) {
976 flat_range_coalesced_io_del(frold, as);
977 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
978 }
979
980 ++iold;
981 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
982 /* In both and unchanged (except logging may have changed) */
983
984 if (adding) {
985 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
986 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
987 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
988 frold->dirty_log_mask,
989 frnew->dirty_log_mask);
990 }
991 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
992 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
993 frold->dirty_log_mask,
994 frnew->dirty_log_mask);
995 }
996 }
997
998 ++iold;
999 ++inew;
1000 } else {
1001 /* In new */
1002
1003 if (adding) {
1004 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
1005 flat_range_coalesced_io_add(frnew, as);
1006 }
1007
1008 ++inew;
1009 }
1010 }
1011 }
1012
1013 static void flatviews_init(void)
1014 {
1015 static FlatView *empty_view;
1016
1017 if (flat_views) {
1018 return;
1019 }
1020
1021 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
1022 (GDestroyNotify) flatview_unref);
1023 if (!empty_view) {
1024 empty_view = generate_memory_topology(NULL);
1025 /* We keep it alive forever in the global variable. */
1026 flatview_ref(empty_view);
1027 } else {
1028 g_hash_table_replace(flat_views, NULL, empty_view);
1029 flatview_ref(empty_view);
1030 }
1031 }
1032
1033 static void flatviews_reset(void)
1034 {
1035 AddressSpace *as;
1036
1037 if (flat_views) {
1038 g_hash_table_unref(flat_views);
1039 flat_views = NULL;
1040 }
1041 flatviews_init();
1042
1043 /* Render unique FVs */
1044 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1045 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1046
1047 if (g_hash_table_lookup(flat_views, physmr)) {
1048 continue;
1049 }
1050
1051 generate_memory_topology(physmr);
1052 }
1053 }
1054
1055 static void address_space_set_flatview(AddressSpace *as)
1056 {
1057 FlatView *old_view = address_space_to_flatview(as);
1058 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1059 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1060
1061 assert(new_view);
1062
1063 if (old_view == new_view) {
1064 return;
1065 }
1066
1067 if (old_view) {
1068 flatview_ref(old_view);
1069 }
1070
1071 flatview_ref(new_view);
1072
1073 if (!QTAILQ_EMPTY(&as->listeners)) {
1074 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1075
1076 if (!old_view2) {
1077 old_view2 = &tmpview;
1078 }
1079 address_space_update_topology_pass(as, old_view2, new_view, false);
1080 address_space_update_topology_pass(as, old_view2, new_view, true);
1081 }
1082
1083 /* Writes are protected by the BQL. */
1084 qatomic_rcu_set(&as->current_map, new_view);
1085 if (old_view) {
1086 flatview_unref(old_view);
1087 }
1088
1089 /* Note that all the old MemoryRegions are still alive up to this
1090 * point. This relieves most MemoryListeners from the need to
1091 * ref/unref the MemoryRegions they get---unless they use them
1092 * outside the iothread mutex, in which case precise reference
1093 * counting is necessary.
1094 */
1095 if (old_view) {
1096 flatview_unref(old_view);
1097 }
1098 }
1099
1100 static void address_space_update_topology(AddressSpace *as)
1101 {
1102 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1103
1104 flatviews_init();
1105 if (!g_hash_table_lookup(flat_views, physmr)) {
1106 generate_memory_topology(physmr);
1107 }
1108 address_space_set_flatview(as);
1109 }
1110
1111 void memory_region_transaction_begin(void)
1112 {
1113 qemu_flush_coalesced_mmio_buffer();
1114 ++memory_region_transaction_depth;
1115 }
1116
1117 void memory_region_transaction_commit(void)
1118 {
1119 AddressSpace *as;
1120
1121 assert(memory_region_transaction_depth);
1122 assert(qemu_mutex_iothread_locked());
1123
1124 --memory_region_transaction_depth;
1125 if (!memory_region_transaction_depth) {
1126 if (memory_region_update_pending) {
1127 flatviews_reset();
1128
1129 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
1130
1131 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1132 address_space_set_flatview(as);
1133 address_space_update_ioeventfds(as);
1134 }
1135 memory_region_update_pending = false;
1136 ioeventfd_update_pending = false;
1137 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1138 } else if (ioeventfd_update_pending) {
1139 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1140 address_space_update_ioeventfds(as);
1141 }
1142 ioeventfd_update_pending = false;
1143 }
1144 }
1145 }
1146
1147 static void memory_region_destructor_none(MemoryRegion *mr)
1148 {
1149 }
1150
1151 static void memory_region_destructor_ram(MemoryRegion *mr)
1152 {
1153 qemu_ram_free(mr->ram_block);
1154 }
1155
1156 static bool memory_region_need_escape(char c)
1157 {
1158 return c == '/' || c == '[' || c == '\\' || c == ']';
1159 }
1160
1161 static char *memory_region_escape_name(const char *name)
1162 {
1163 const char *p;
1164 char *escaped, *q;
1165 uint8_t c;
1166 size_t bytes = 0;
1167
1168 for (p = name; *p; p++) {
1169 bytes += memory_region_need_escape(*p) ? 4 : 1;
1170 }
1171 if (bytes == p - name) {
1172 return g_memdup(name, bytes + 1);
1173 }
1174
1175 escaped = g_malloc(bytes + 1);
1176 for (p = name, q = escaped; *p; p++) {
1177 c = *p;
1178 if (unlikely(memory_region_need_escape(c))) {
1179 *q++ = '\\';
1180 *q++ = 'x';
1181 *q++ = "0123456789abcdef"[c >> 4];
1182 c = "0123456789abcdef"[c & 15];
1183 }
1184 *q++ = c;
1185 }
1186 *q = 0;
1187 return escaped;
1188 }
1189
1190 static void memory_region_do_init(MemoryRegion *mr,
1191 Object *owner,
1192 const char *name,
1193 uint64_t size)
1194 {
1195 mr->size = int128_make64(size);
1196 if (size == UINT64_MAX) {
1197 mr->size = int128_2_64();
1198 }
1199 mr->name = g_strdup(name);
1200 mr->owner = owner;
1201 mr->dev = (DeviceState *) object_dynamic_cast(mr->owner, TYPE_DEVICE);
1202 mr->ram_block = NULL;
1203
1204 if (name) {
1205 char *escaped_name = memory_region_escape_name(name);
1206 char *name_array = g_strdup_printf("%s[*]", escaped_name);
1207
1208 if (!owner) {
1209 owner = container_get(qdev_get_machine(), "/unattached");
1210 }
1211
1212 object_property_add_child(owner, name_array, OBJECT(mr));
1213 object_unref(OBJECT(mr));
1214 g_free(name_array);
1215 g_free(escaped_name);
1216 }
1217 }
1218
1219 void memory_region_init(MemoryRegion *mr,
1220 Object *owner,
1221 const char *name,
1222 uint64_t size)
1223 {
1224 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1225 memory_region_do_init(mr, owner, name, size);
1226 }
1227
1228 static void memory_region_get_container(Object *obj, Visitor *v,
1229 const char *name, void *opaque,
1230 Error **errp)
1231 {
1232 MemoryRegion *mr = MEMORY_REGION(obj);
1233 char *path = (char *)"";
1234
1235 if (mr->container) {
1236 path = object_get_canonical_path(OBJECT(mr->container));
1237 }
1238 visit_type_str(v, name, &path, errp);
1239 if (mr->container) {
1240 g_free(path);
1241 }
1242 }
1243
1244 static Object *memory_region_resolve_container(Object *obj, void *opaque,
1245 const char *part)
1246 {
1247 MemoryRegion *mr = MEMORY_REGION(obj);
1248
1249 return OBJECT(mr->container);
1250 }
1251
1252 static void memory_region_get_priority(Object *obj, Visitor *v,
1253 const char *name, void *opaque,
1254 Error **errp)
1255 {
1256 MemoryRegion *mr = MEMORY_REGION(obj);
1257 int32_t value = mr->priority;
1258
1259 visit_type_int32(v, name, &value, errp);
1260 }
1261
1262 static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1263 void *opaque, Error **errp)
1264 {
1265 MemoryRegion *mr = MEMORY_REGION(obj);
1266 uint64_t value = memory_region_size(mr);
1267
1268 visit_type_uint64(v, name, &value, errp);
1269 }
1270
1271 static void memory_region_initfn(Object *obj)
1272 {
1273 MemoryRegion *mr = MEMORY_REGION(obj);
1274 ObjectProperty *op;
1275
1276 mr->ops = &unassigned_mem_ops;
1277 mr->enabled = true;
1278 mr->romd_mode = true;
1279 mr->destructor = memory_region_destructor_none;
1280 QTAILQ_INIT(&mr->subregions);
1281 QTAILQ_INIT(&mr->coalesced);
1282
1283 op = object_property_add(OBJECT(mr), "container",
1284 "link<" TYPE_MEMORY_REGION ">",
1285 memory_region_get_container,
1286 NULL, /* memory_region_set_container */
1287 NULL, NULL);
1288 op->resolve = memory_region_resolve_container;
1289
1290 object_property_add_uint64_ptr(OBJECT(mr), "addr",
1291 &mr->addr, OBJ_PROP_FLAG_READ);
1292 object_property_add(OBJECT(mr), "priority", "uint32",
1293 memory_region_get_priority,
1294 NULL, /* memory_region_set_priority */
1295 NULL, NULL);
1296 object_property_add(OBJECT(mr), "size", "uint64",
1297 memory_region_get_size,
1298 NULL, /* memory_region_set_size, */
1299 NULL, NULL);
1300 }
1301
1302 static void iommu_memory_region_initfn(Object *obj)
1303 {
1304 MemoryRegion *mr = MEMORY_REGION(obj);
1305
1306 mr->is_iommu = true;
1307 }
1308
1309 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1310 unsigned size)
1311 {
1312 #ifdef DEBUG_UNASSIGNED
1313 printf("Unassigned mem read " HWADDR_FMT_plx "\n", addr);
1314 #endif
1315 return 0;
1316 }
1317
1318 static void unassigned_mem_write(void *opaque, hwaddr addr,
1319 uint64_t val, unsigned size)
1320 {
1321 #ifdef DEBUG_UNASSIGNED
1322 printf("Unassigned mem write " HWADDR_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1323 #endif
1324 }
1325
1326 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1327 unsigned size, bool is_write,
1328 MemTxAttrs attrs)
1329 {
1330 return false;
1331 }
1332
1333 const MemoryRegionOps unassigned_mem_ops = {
1334 .valid.accepts = unassigned_mem_accepts,
1335 .endianness = DEVICE_NATIVE_ENDIAN,
1336 };
1337
1338 static uint64_t memory_region_ram_device_read(void *opaque,
1339 hwaddr addr, unsigned size)
1340 {
1341 MemoryRegion *mr = opaque;
1342 uint64_t data = (uint64_t)~0;
1343
1344 switch (size) {
1345 case 1:
1346 data = *(uint8_t *)(mr->ram_block->host + addr);
1347 break;
1348 case 2:
1349 data = *(uint16_t *)(mr->ram_block->host + addr);
1350 break;
1351 case 4:
1352 data = *(uint32_t *)(mr->ram_block->host + addr);
1353 break;
1354 case 8:
1355 data = *(uint64_t *)(mr->ram_block->host + addr);
1356 break;
1357 }
1358
1359 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1360
1361 return data;
1362 }
1363
1364 static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1365 uint64_t data, unsigned size)
1366 {
1367 MemoryRegion *mr = opaque;
1368
1369 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1370
1371 switch (size) {
1372 case 1:
1373 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1374 break;
1375 case 2:
1376 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1377 break;
1378 case 4:
1379 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1380 break;
1381 case 8:
1382 *(uint64_t *)(mr->ram_block->host + addr) = data;
1383 break;
1384 }
1385 }
1386
1387 static const MemoryRegionOps ram_device_mem_ops = {
1388 .read = memory_region_ram_device_read,
1389 .write = memory_region_ram_device_write,
1390 .endianness = DEVICE_HOST_ENDIAN,
1391 .valid = {
1392 .min_access_size = 1,
1393 .max_access_size = 8,
1394 .unaligned = true,
1395 },
1396 .impl = {
1397 .min_access_size = 1,
1398 .max_access_size = 8,
1399 .unaligned = true,
1400 },
1401 };
1402
1403 bool memory_region_access_valid(MemoryRegion *mr,
1404 hwaddr addr,
1405 unsigned size,
1406 bool is_write,
1407 MemTxAttrs attrs)
1408 {
1409 if (mr->ops->valid.accepts
1410 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
1411 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1412 ", size %u, region '%s', reason: rejected\n",
1413 is_write ? "write" : "read",
1414 addr, size, memory_region_name(mr));
1415 return false;
1416 }
1417
1418 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1419 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1420 ", size %u, region '%s', reason: unaligned\n",
1421 is_write ? "write" : "read",
1422 addr, size, memory_region_name(mr));
1423 return false;
1424 }
1425
1426 /* Treat zero as compatibility all valid */
1427 if (!mr->ops->valid.max_access_size) {
1428 return true;
1429 }
1430
1431 if (size > mr->ops->valid.max_access_size
1432 || size < mr->ops->valid.min_access_size) {
1433 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1434 ", size %u, region '%s', reason: invalid size "
1435 "(min:%u max:%u)\n",
1436 is_write ? "write" : "read",
1437 addr, size, memory_region_name(mr),
1438 mr->ops->valid.min_access_size,
1439 mr->ops->valid.max_access_size);
1440 return false;
1441 }
1442 return true;
1443 }
1444
1445 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1446 hwaddr addr,
1447 uint64_t *pval,
1448 unsigned size,
1449 MemTxAttrs attrs)
1450 {
1451 *pval = 0;
1452
1453 if (mr->ops->read) {
1454 return access_with_adjusted_size(addr, pval, size,
1455 mr->ops->impl.min_access_size,
1456 mr->ops->impl.max_access_size,
1457 memory_region_read_accessor,
1458 mr, attrs);
1459 } else {
1460 return access_with_adjusted_size(addr, pval, size,
1461 mr->ops->impl.min_access_size,
1462 mr->ops->impl.max_access_size,
1463 memory_region_read_with_attrs_accessor,
1464 mr, attrs);
1465 }
1466 }
1467
1468 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1469 hwaddr addr,
1470 uint64_t *pval,
1471 MemOp op,
1472 MemTxAttrs attrs)
1473 {
1474 unsigned size = memop_size(op);
1475 MemTxResult r;
1476
1477 if (mr->alias) {
1478 return memory_region_dispatch_read(mr->alias,
1479 mr->alias_offset + addr,
1480 pval, op, attrs);
1481 }
1482 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
1483 *pval = unassigned_mem_read(mr, addr, size);
1484 return MEMTX_DECODE_ERROR;
1485 }
1486
1487 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1488 adjust_endianness(mr, pval, op);
1489 return r;
1490 }
1491
1492 /* Return true if an eventfd was signalled */
1493 static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1494 hwaddr addr,
1495 uint64_t data,
1496 unsigned size,
1497 MemTxAttrs attrs)
1498 {
1499 MemoryRegionIoeventfd ioeventfd = {
1500 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1501 .data = data,
1502 };
1503 unsigned i;
1504
1505 for (i = 0; i < mr->ioeventfd_nb; i++) {
1506 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1507 ioeventfd.e = mr->ioeventfds[i].e;
1508
1509 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
1510 event_notifier_set(ioeventfd.e);
1511 return true;
1512 }
1513 }
1514
1515 return false;
1516 }
1517
1518 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1519 hwaddr addr,
1520 uint64_t data,
1521 MemOp op,
1522 MemTxAttrs attrs)
1523 {
1524 unsigned size = memop_size(op);
1525
1526 if (mr->alias) {
1527 return memory_region_dispatch_write(mr->alias,
1528 mr->alias_offset + addr,
1529 data, op, attrs);
1530 }
1531 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
1532 unassigned_mem_write(mr, addr, data, size);
1533 return MEMTX_DECODE_ERROR;
1534 }
1535
1536 adjust_endianness(mr, &data, op);
1537
1538 /*
1539 * FIXME: it's not clear why under KVM the write would be processed
1540 * directly, instead of going through eventfd. This probably should
1541 * test "tcg_enabled() || qtest_enabled()", or should just go away.
1542 */
1543 if (!kvm_enabled() &&
1544 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1545 return MEMTX_OK;
1546 }
1547
1548 if (mr->ops->write) {
1549 return access_with_adjusted_size(addr, &data, size,
1550 mr->ops->impl.min_access_size,
1551 mr->ops->impl.max_access_size,
1552 memory_region_write_accessor, mr,
1553 attrs);
1554 } else {
1555 return
1556 access_with_adjusted_size(addr, &data, size,
1557 mr->ops->impl.min_access_size,
1558 mr->ops->impl.max_access_size,
1559 memory_region_write_with_attrs_accessor,
1560 mr, attrs);
1561 }
1562 }
1563
1564 void memory_region_init_io(MemoryRegion *mr,
1565 Object *owner,
1566 const MemoryRegionOps *ops,
1567 void *opaque,
1568 const char *name,
1569 uint64_t size)
1570 {
1571 memory_region_init(mr, owner, name, size);
1572 mr->ops = ops ? ops : &unassigned_mem_ops;
1573 mr->opaque = opaque;
1574 mr->terminates = true;
1575 }
1576
1577 void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1578 Object *owner,
1579 const char *name,
1580 uint64_t size,
1581 Error **errp)
1582 {
1583 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1584 }
1585
1586 void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1587 Object *owner,
1588 const char *name,
1589 uint64_t size,
1590 uint32_t ram_flags,
1591 Error **errp)
1592 {
1593 Error *err = NULL;
1594 memory_region_init(mr, owner, name, size);
1595 mr->ram = true;
1596 mr->terminates = true;
1597 mr->destructor = memory_region_destructor_ram;
1598 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1599 if (err) {
1600 mr->size = int128_zero();
1601 object_unparent(OBJECT(mr));
1602 error_propagate(errp, err);
1603 }
1604 }
1605
1606 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1607 Object *owner,
1608 const char *name,
1609 uint64_t size,
1610 uint64_t max_size,
1611 void (*resized)(const char*,
1612 uint64_t length,
1613 void *host),
1614 Error **errp)
1615 {
1616 Error *err = NULL;
1617 memory_region_init(mr, owner, name, size);
1618 mr->ram = true;
1619 mr->terminates = true;
1620 mr->destructor = memory_region_destructor_ram;
1621 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1622 mr, &err);
1623 if (err) {
1624 mr->size = int128_zero();
1625 object_unparent(OBJECT(mr));
1626 error_propagate(errp, err);
1627 }
1628 }
1629
1630 #ifdef CONFIG_POSIX
1631 void memory_region_init_ram_from_file(MemoryRegion *mr,
1632 Object *owner,
1633 const char *name,
1634 uint64_t size,
1635 uint64_t align,
1636 uint32_t ram_flags,
1637 const char *path,
1638 ram_addr_t offset,
1639 Error **errp)
1640 {
1641 Error *err = NULL;
1642 memory_region_init(mr, owner, name, size);
1643 mr->ram = true;
1644 mr->readonly = !!(ram_flags & RAM_READONLY);
1645 mr->terminates = true;
1646 mr->destructor = memory_region_destructor_ram;
1647 mr->align = align;
1648 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1649 offset, &err);
1650 if (err) {
1651 mr->size = int128_zero();
1652 object_unparent(OBJECT(mr));
1653 error_propagate(errp, err);
1654 }
1655 }
1656
1657 void memory_region_init_ram_from_fd(MemoryRegion *mr,
1658 Object *owner,
1659 const char *name,
1660 uint64_t size,
1661 uint32_t ram_flags,
1662 int fd,
1663 ram_addr_t offset,
1664 Error **errp)
1665 {
1666 Error *err = NULL;
1667 memory_region_init(mr, owner, name, size);
1668 mr->ram = true;
1669 mr->readonly = !!(ram_flags & RAM_READONLY);
1670 mr->terminates = true;
1671 mr->destructor = memory_region_destructor_ram;
1672 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1673 &err);
1674 if (err) {
1675 mr->size = int128_zero();
1676 object_unparent(OBJECT(mr));
1677 error_propagate(errp, err);
1678 }
1679 }
1680 #endif
1681
1682 void memory_region_init_ram_ptr(MemoryRegion *mr,
1683 Object *owner,
1684 const char *name,
1685 uint64_t size,
1686 void *ptr)
1687 {
1688 memory_region_init(mr, owner, name, size);
1689 mr->ram = true;
1690 mr->terminates = true;
1691 mr->destructor = memory_region_destructor_ram;
1692
1693 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1694 assert(ptr != NULL);
1695 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1696 }
1697
1698 void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1699 Object *owner,
1700 const char *name,
1701 uint64_t size,
1702 void *ptr)
1703 {
1704 memory_region_init(mr, owner, name, size);
1705 mr->ram = true;
1706 mr->terminates = true;
1707 mr->ram_device = true;
1708 mr->ops = &ram_device_mem_ops;
1709 mr->opaque = mr;
1710 mr->destructor = memory_region_destructor_ram;
1711
1712 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1713 assert(ptr != NULL);
1714 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
1715 }
1716
1717 void memory_region_init_alias(MemoryRegion *mr,
1718 Object *owner,
1719 const char *name,
1720 MemoryRegion *orig,
1721 hwaddr offset,
1722 uint64_t size)
1723 {
1724 memory_region_init(mr, owner, name, size);
1725 mr->alias = orig;
1726 mr->alias_offset = offset;
1727 }
1728
1729 void memory_region_init_rom_nomigrate(MemoryRegion *mr,
1730 Object *owner,
1731 const char *name,
1732 uint64_t size,
1733 Error **errp)
1734 {
1735 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
1736 mr->readonly = true;
1737 }
1738
1739 void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1740 Object *owner,
1741 const MemoryRegionOps *ops,
1742 void *opaque,
1743 const char *name,
1744 uint64_t size,
1745 Error **errp)
1746 {
1747 Error *err = NULL;
1748 assert(ops);
1749 memory_region_init(mr, owner, name, size);
1750 mr->ops = ops;
1751 mr->opaque = opaque;
1752 mr->terminates = true;
1753 mr->rom_device = true;
1754 mr->destructor = memory_region_destructor_ram;
1755 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1756 if (err) {
1757 mr->size = int128_zero();
1758 object_unparent(OBJECT(mr));
1759 error_propagate(errp, err);
1760 }
1761 }
1762
1763 void memory_region_init_iommu(void *_iommu_mr,
1764 size_t instance_size,
1765 const char *mrtypename,
1766 Object *owner,
1767 const char *name,
1768 uint64_t size)
1769 {
1770 struct IOMMUMemoryRegion *iommu_mr;
1771 struct MemoryRegion *mr;
1772
1773 object_initialize(_iommu_mr, instance_size, mrtypename);
1774 mr = MEMORY_REGION(_iommu_mr);
1775 memory_region_do_init(mr, owner, name, size);
1776 iommu_mr = IOMMU_MEMORY_REGION(mr);
1777 mr->terminates = true; /* then re-forwards */
1778 QLIST_INIT(&iommu_mr->iommu_notify);
1779 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
1780 }
1781
1782 static void memory_region_finalize(Object *obj)
1783 {
1784 MemoryRegion *mr = MEMORY_REGION(obj);
1785
1786 assert(!mr->container);
1787
1788 /* We know the region is not visible in any address space (it
1789 * does not have a container and cannot be a root either because
1790 * it has no references, so we can blindly clear mr->enabled.
1791 * memory_region_set_enabled instead could trigger a transaction
1792 * and cause an infinite loop.
1793 */
1794 mr->enabled = false;
1795 memory_region_transaction_begin();
1796 while (!QTAILQ_EMPTY(&mr->subregions)) {
1797 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1798 memory_region_del_subregion(mr, subregion);
1799 }
1800 memory_region_transaction_commit();
1801
1802 mr->destructor(mr);
1803 memory_region_clear_coalescing(mr);
1804 g_free((char *)mr->name);
1805 g_free(mr->ioeventfds);
1806 }
1807
1808 Object *memory_region_owner(MemoryRegion *mr)
1809 {
1810 Object *obj = OBJECT(mr);
1811 return obj->parent;
1812 }
1813
1814 void memory_region_ref(MemoryRegion *mr)
1815 {
1816 /* MMIO callbacks most likely will access data that belongs
1817 * to the owner, hence the need to ref/unref the owner whenever
1818 * the memory region is in use.
1819 *
1820 * The memory region is a child of its owner. As long as the
1821 * owner doesn't call unparent itself on the memory region,
1822 * ref-ing the owner will also keep the memory region alive.
1823 * Memory regions without an owner are supposed to never go away;
1824 * we do not ref/unref them because it slows down DMA sensibly.
1825 */
1826 if (mr && mr->owner) {
1827 object_ref(mr->owner);
1828 }
1829 }
1830
1831 void memory_region_unref(MemoryRegion *mr)
1832 {
1833 if (mr && mr->owner) {
1834 object_unref(mr->owner);
1835 }
1836 }
1837
1838 uint64_t memory_region_size(MemoryRegion *mr)
1839 {
1840 if (int128_eq(mr->size, int128_2_64())) {
1841 return UINT64_MAX;
1842 }
1843 return int128_get64(mr->size);
1844 }
1845
1846 const char *memory_region_name(const MemoryRegion *mr)
1847 {
1848 if (!mr->name) {
1849 ((MemoryRegion *)mr)->name =
1850 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
1851 }
1852 return mr->name;
1853 }
1854
1855 bool memory_region_is_ram_device(MemoryRegion *mr)
1856 {
1857 return mr->ram_device;
1858 }
1859
1860 bool memory_region_is_protected(MemoryRegion *mr)
1861 {
1862 return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1863 }
1864
1865 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1866 {
1867 uint8_t mask = mr->dirty_log_mask;
1868 RAMBlock *rb = mr->ram_block;
1869
1870 if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1871 memory_region_is_iommu(mr))) {
1872 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1873 }
1874
1875 if (tcg_enabled() && rb) {
1876 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1877 mask |= (1 << DIRTY_MEMORY_CODE);
1878 }
1879 return mask;
1880 }
1881
1882 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1883 {
1884 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1885 }
1886
1887 static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1888 Error **errp)
1889 {
1890 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1891 IOMMUNotifier *iommu_notifier;
1892 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1893 int ret = 0;
1894
1895 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
1896 flags |= iommu_notifier->notifier_flags;
1897 }
1898
1899 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
1900 ret = imrc->notify_flag_changed(iommu_mr,
1901 iommu_mr->iommu_notify_flags,
1902 flags, errp);
1903 }
1904
1905 if (!ret) {
1906 iommu_mr->iommu_notify_flags = flags;
1907 }
1908 return ret;
1909 }
1910
1911 int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1912 uint64_t page_size_mask,
1913 Error **errp)
1914 {
1915 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1916 int ret = 0;
1917
1918 if (imrc->iommu_set_page_size_mask) {
1919 ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1920 }
1921 return ret;
1922 }
1923
1924 int memory_region_register_iommu_notifier(MemoryRegion *mr,
1925 IOMMUNotifier *n, Error **errp)
1926 {
1927 IOMMUMemoryRegion *iommu_mr;
1928 int ret;
1929
1930 if (mr->alias) {
1931 return memory_region_register_iommu_notifier(mr->alias, n, errp);
1932 }
1933
1934 /* We need to register for at least one bitfield */
1935 iommu_mr = IOMMU_MEMORY_REGION(mr);
1936 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
1937 assert(n->start <= n->end);
1938 assert(n->iommu_idx >= 0 &&
1939 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1940
1941 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
1942 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1943 if (ret) {
1944 QLIST_REMOVE(n, node);
1945 }
1946 return ret;
1947 }
1948
1949 uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
1950 {
1951 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1952
1953 if (imrc->get_min_page_size) {
1954 return imrc->get_min_page_size(iommu_mr);
1955 }
1956 return TARGET_PAGE_SIZE;
1957 }
1958
1959 void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
1960 {
1961 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1962 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1963 hwaddr addr, granularity;
1964 IOMMUTLBEntry iotlb;
1965
1966 /* If the IOMMU has its own replay callback, override */
1967 if (imrc->replay) {
1968 imrc->replay(iommu_mr, n);
1969 return;
1970 }
1971
1972 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
1973
1974 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1975 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
1976 if (iotlb.perm != IOMMU_NONE) {
1977 n->notify(n, &iotlb);
1978 }
1979
1980 /* if (2^64 - MR size) < granularity, it's possible to get an
1981 * infinite loop here. This should catch such a wraparound */
1982 if ((addr + granularity) < addr) {
1983 break;
1984 }
1985 }
1986 }
1987
1988 void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1989 IOMMUNotifier *n)
1990 {
1991 IOMMUMemoryRegion *iommu_mr;
1992
1993 if (mr->alias) {
1994 memory_region_unregister_iommu_notifier(mr->alias, n);
1995 return;
1996 }
1997 QLIST_REMOVE(n, node);
1998 iommu_mr = IOMMU_MEMORY_REGION(mr);
1999 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
2000 }
2001
2002 void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
2003 IOMMUTLBEvent *event)
2004 {
2005 IOMMUTLBEntry *entry = &event->entry;
2006 hwaddr entry_end = entry->iova + entry->addr_mask;
2007 IOMMUTLBEntry tmp = *entry;
2008
2009 if (event->type == IOMMU_NOTIFIER_UNMAP) {
2010 assert(entry->perm == IOMMU_NONE);
2011 }
2012
2013 /*
2014 * Skip the notification if the notification does not overlap
2015 * with registered range.
2016 */
2017 if (notifier->start > entry_end || notifier->end < entry->iova) {
2018 return;
2019 }
2020
2021 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
2022 /* Crop (iova, addr_mask) to range */
2023 tmp.iova = MAX(tmp.iova, notifier->start);
2024 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
2025 } else {
2026 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
2027 }
2028
2029 if (event->type & notifier->notifier_flags) {
2030 notifier->notify(notifier, &tmp);
2031 }
2032 }
2033
2034 void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *notifier)
2035 {
2036 IOMMUTLBEvent event;
2037
2038 event.type = IOMMU_NOTIFIER_UNMAP;
2039 event.entry.target_as = &address_space_memory;
2040 event.entry.iova = notifier->start;
2041 event.entry.perm = IOMMU_NONE;
2042 event.entry.addr_mask = notifier->end - notifier->start;
2043
2044 memory_region_notify_iommu_one(notifier, &event);
2045 }
2046
2047 void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
2048 int iommu_idx,
2049 IOMMUTLBEvent event)
2050 {
2051 IOMMUNotifier *iommu_notifier;
2052
2053 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
2054
2055 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
2056 if (iommu_notifier->iommu_idx == iommu_idx) {
2057 memory_region_notify_iommu_one(iommu_notifier, &event);
2058 }
2059 }
2060 }
2061
2062 int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2063 enum IOMMUMemoryRegionAttr attr,
2064 void *data)
2065 {
2066 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2067
2068 if (!imrc->get_attr) {
2069 return -EINVAL;
2070 }
2071
2072 return imrc->get_attr(iommu_mr, attr, data);
2073 }
2074
2075 int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2076 MemTxAttrs attrs)
2077 {
2078 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2079
2080 if (!imrc->attrs_to_index) {
2081 return 0;
2082 }
2083
2084 return imrc->attrs_to_index(iommu_mr, attrs);
2085 }
2086
2087 int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2088 {
2089 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2090
2091 if (!imrc->num_indexes) {
2092 return 1;
2093 }
2094
2095 return imrc->num_indexes(iommu_mr);
2096 }
2097
2098 RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2099 {
2100 if (!memory_region_is_ram(mr)) {
2101 return NULL;
2102 }
2103 return mr->rdm;
2104 }
2105
2106 void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2107 RamDiscardManager *rdm)
2108 {
2109 g_assert(memory_region_is_ram(mr));
2110 g_assert(!rdm || !mr->rdm);
2111 mr->rdm = rdm;
2112 }
2113
2114 uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2115 const MemoryRegion *mr)
2116 {
2117 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2118
2119 g_assert(rdmc->get_min_granularity);
2120 return rdmc->get_min_granularity(rdm, mr);
2121 }
2122
2123 bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2124 const MemoryRegionSection *section)
2125 {
2126 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2127
2128 g_assert(rdmc->is_populated);
2129 return rdmc->is_populated(rdm, section);
2130 }
2131
2132 int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2133 MemoryRegionSection *section,
2134 ReplayRamPopulate replay_fn,
2135 void *opaque)
2136 {
2137 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2138
2139 g_assert(rdmc->replay_populated);
2140 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2141 }
2142
2143 void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2144 MemoryRegionSection *section,
2145 ReplayRamDiscard replay_fn,
2146 void *opaque)
2147 {
2148 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2149
2150 g_assert(rdmc->replay_discarded);
2151 rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2152 }
2153
2154 void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2155 RamDiscardListener *rdl,
2156 MemoryRegionSection *section)
2157 {
2158 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2159
2160 g_assert(rdmc->register_listener);
2161 rdmc->register_listener(rdm, rdl, section);
2162 }
2163
2164 void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2165 RamDiscardListener *rdl)
2166 {
2167 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2168
2169 g_assert(rdmc->unregister_listener);
2170 rdmc->unregister_listener(rdm, rdl);
2171 }
2172
2173 /* Called with rcu_read_lock held. */
2174 bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void **vaddr,
2175 ram_addr_t *ram_addr, bool *read_only,
2176 bool *mr_has_discard_manager)
2177 {
2178 MemoryRegion *mr;
2179 hwaddr xlat;
2180 hwaddr len = iotlb->addr_mask + 1;
2181 bool writable = iotlb->perm & IOMMU_WO;
2182
2183 if (mr_has_discard_manager) {
2184 *mr_has_discard_manager = false;
2185 }
2186 /*
2187 * The IOMMU TLB entry we have just covers translation through
2188 * this IOMMU to its immediate target. We need to translate
2189 * it the rest of the way through to memory.
2190 */
2191 mr = address_space_translate(&address_space_memory, iotlb->translated_addr,
2192 &xlat, &len, writable, MEMTXATTRS_UNSPECIFIED);
2193 if (!memory_region_is_ram(mr)) {
2194 error_report("iommu map to non memory area %" HWADDR_PRIx "", xlat);
2195 return false;
2196 } else if (memory_region_has_ram_discard_manager(mr)) {
2197 RamDiscardManager *rdm = memory_region_get_ram_discard_manager(mr);
2198 MemoryRegionSection tmp = {
2199 .mr = mr,
2200 .offset_within_region = xlat,
2201 .size = int128_make64(len),
2202 };
2203 if (mr_has_discard_manager) {
2204 *mr_has_discard_manager = true;
2205 }
2206 /*
2207 * Malicious VMs can map memory into the IOMMU, which is expected
2208 * to remain discarded. vfio will pin all pages, populating memory.
2209 * Disallow that. vmstate priorities make sure any RamDiscardManager
2210 * were already restored before IOMMUs are restored.
2211 */
2212 if (!ram_discard_manager_is_populated(rdm, &tmp)) {
2213 error_report("iommu map to discarded memory (e.g., unplugged via"
2214 " virtio-mem): %" HWADDR_PRIx "",
2215 iotlb->translated_addr);
2216 return false;
2217 }
2218 }
2219
2220 /*
2221 * Translation truncates length to the IOMMU page size,
2222 * check that it did not truncate too much.
2223 */
2224 if (len & iotlb->addr_mask) {
2225 error_report("iommu has granularity incompatible with target AS");
2226 return false;
2227 }
2228
2229 if (vaddr) {
2230 *vaddr = memory_region_get_ram_ptr(mr) + xlat;
2231 }
2232
2233 if (ram_addr) {
2234 *ram_addr = memory_region_get_ram_addr(mr) + xlat;
2235 }
2236
2237 if (read_only) {
2238 *read_only = !writable || mr->readonly;
2239 }
2240
2241 return true;
2242 }
2243
2244 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2245 {
2246 uint8_t mask = 1 << client;
2247 uint8_t old_logging;
2248
2249 assert(client == DIRTY_MEMORY_VGA);
2250 old_logging = mr->vga_logging_count;
2251 mr->vga_logging_count += log ? 1 : -1;
2252 if (!!old_logging == !!mr->vga_logging_count) {
2253 return;
2254 }
2255
2256 memory_region_transaction_begin();
2257 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
2258 memory_region_update_pending |= mr->enabled;
2259 memory_region_transaction_commit();
2260 }
2261
2262 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2263 hwaddr size)
2264 {
2265 assert(mr->ram_block);
2266 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2267 size,
2268 memory_region_get_dirty_log_mask(mr));
2269 }
2270
2271 /*
2272 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2273 * dirty bitmap for the specified memory region.
2274 */
2275 static void memory_region_sync_dirty_bitmap(MemoryRegion *mr, bool last_stage)
2276 {
2277 MemoryListener *listener;
2278 AddressSpace *as;
2279 FlatView *view;
2280 FlatRange *fr;
2281
2282 /* If the same address space has multiple log_sync listeners, we
2283 * visit that address space's FlatView multiple times. But because
2284 * log_sync listeners are rare, it's still cheaper than walking each
2285 * address space once.
2286 */
2287 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2288 if (listener->log_sync) {
2289 as = listener->address_space;
2290 view = address_space_get_flatview(as);
2291 FOR_EACH_FLAT_RANGE(fr, view) {
2292 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2293 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2294 listener->log_sync(listener, &mrs);
2295 }
2296 }
2297 flatview_unref(view);
2298 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
2299 } else if (listener->log_sync_global) {
2300 /*
2301 * No matter whether MR is specified, what we can do here
2302 * is to do a global sync, because we are not capable to
2303 * sync in a finer granularity.
2304 */
2305 listener->log_sync_global(listener, last_stage);
2306 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
2307 }
2308 }
2309 }
2310
2311 void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2312 hwaddr len)
2313 {
2314 MemoryRegionSection mrs;
2315 MemoryListener *listener;
2316 AddressSpace *as;
2317 FlatView *view;
2318 FlatRange *fr;
2319 hwaddr sec_start, sec_end, sec_size;
2320
2321 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2322 if (!listener->log_clear) {
2323 continue;
2324 }
2325 as = listener->address_space;
2326 view = address_space_get_flatview(as);
2327 FOR_EACH_FLAT_RANGE(fr, view) {
2328 if (!fr->dirty_log_mask || fr->mr != mr) {
2329 /*
2330 * Clear dirty bitmap operation only applies to those
2331 * regions whose dirty logging is at least enabled
2332 */
2333 continue;
2334 }
2335
2336 mrs = section_from_flat_range(fr, view);
2337
2338 sec_start = MAX(mrs.offset_within_region, start);
2339 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2340 sec_end = MIN(sec_end, start + len);
2341
2342 if (sec_start >= sec_end) {
2343 /*
2344 * If this memory region section has no intersection
2345 * with the requested range, skip.
2346 */
2347 continue;
2348 }
2349
2350 /* Valid case; shrink the section if needed */
2351 mrs.offset_within_address_space +=
2352 sec_start - mrs.offset_within_region;
2353 mrs.offset_within_region = sec_start;
2354 sec_size = sec_end - sec_start;
2355 mrs.size = int128_make64(sec_size);
2356 listener->log_clear(listener, &mrs);
2357 }
2358 flatview_unref(view);
2359 }
2360 }
2361
2362 DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2363 hwaddr addr,
2364 hwaddr size,
2365 unsigned client)
2366 {
2367 DirtyBitmapSnapshot *snapshot;
2368 assert(mr->ram_block);
2369 memory_region_sync_dirty_bitmap(mr, false);
2370 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2371 memory_global_after_dirty_log_sync();
2372 return snapshot;
2373 }
2374
2375 bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2376 hwaddr addr, hwaddr size)
2377 {
2378 assert(mr->ram_block);
2379 return cpu_physical_memory_snapshot_get_dirty(snap,
2380 memory_region_get_ram_addr(mr) + addr, size);
2381 }
2382
2383 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2384 {
2385 if (mr->readonly != readonly) {
2386 memory_region_transaction_begin();
2387 mr->readonly = readonly;
2388 memory_region_update_pending |= mr->enabled;
2389 memory_region_transaction_commit();
2390 }
2391 }
2392
2393 void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2394 {
2395 if (mr->nonvolatile != nonvolatile) {
2396 memory_region_transaction_begin();
2397 mr->nonvolatile = nonvolatile;
2398 memory_region_update_pending |= mr->enabled;
2399 memory_region_transaction_commit();
2400 }
2401 }
2402
2403 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
2404 {
2405 if (mr->romd_mode != romd_mode) {
2406 memory_region_transaction_begin();
2407 mr->romd_mode = romd_mode;
2408 memory_region_update_pending |= mr->enabled;
2409 memory_region_transaction_commit();
2410 }
2411 }
2412
2413 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2414 hwaddr size, unsigned client)
2415 {
2416 assert(mr->ram_block);
2417 cpu_physical_memory_test_and_clear_dirty(
2418 memory_region_get_ram_addr(mr) + addr, size, client);
2419 }
2420
2421 int memory_region_get_fd(MemoryRegion *mr)
2422 {
2423 RCU_READ_LOCK_GUARD();
2424 while (mr->alias) {
2425 mr = mr->alias;
2426 }
2427 return mr->ram_block->fd;
2428 }
2429
2430 void *memory_region_get_ram_ptr(MemoryRegion *mr)
2431 {
2432 uint64_t offset = 0;
2433
2434 RCU_READ_LOCK_GUARD();
2435 while (mr->alias) {
2436 offset += mr->alias_offset;
2437 mr = mr->alias;
2438 }
2439 assert(mr->ram_block);
2440 return qemu_map_ram_ptr(mr->ram_block, offset);
2441 }
2442
2443 MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2444 {
2445 RAMBlock *block;
2446
2447 block = qemu_ram_block_from_host(ptr, false, offset);
2448 if (!block) {
2449 return NULL;
2450 }
2451
2452 return block->mr;
2453 }
2454
2455 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2456 {
2457 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2458 }
2459
2460 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2461 {
2462 assert(mr->ram_block);
2463
2464 qemu_ram_resize(mr->ram_block, newsize, errp);
2465 }
2466
2467 void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2468 {
2469 if (mr->ram_block) {
2470 qemu_ram_msync(mr->ram_block, addr, size);
2471 }
2472 }
2473
2474 void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
2475 {
2476 /*
2477 * Might be extended case needed to cover
2478 * different types of memory regions
2479 */
2480 if (mr->dirty_log_mask) {
2481 memory_region_msync(mr, addr, size);
2482 }
2483 }
2484
2485 /*
2486 * Call proper memory listeners about the change on the newly
2487 * added/removed CoalescedMemoryRange.
2488 */
2489 static void memory_region_update_coalesced_range(MemoryRegion *mr,
2490 CoalescedMemoryRange *cmr,
2491 bool add)
2492 {
2493 AddressSpace *as;
2494 FlatView *view;
2495 FlatRange *fr;
2496
2497 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2498 view = address_space_get_flatview(as);
2499 FOR_EACH_FLAT_RANGE(fr, view) {
2500 if (fr->mr == mr) {
2501 flat_range_coalesced_io_notify(fr, as, cmr, add);
2502 }
2503 }
2504 flatview_unref(view);
2505 }
2506 }
2507
2508 void memory_region_set_coalescing(MemoryRegion *mr)
2509 {
2510 memory_region_clear_coalescing(mr);
2511 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
2512 }
2513
2514 void memory_region_add_coalescing(MemoryRegion *mr,
2515 hwaddr offset,
2516 uint64_t size)
2517 {
2518 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
2519
2520 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
2521 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
2522 memory_region_update_coalesced_range(mr, cmr, true);
2523 memory_region_set_flush_coalesced(mr);
2524 }
2525
2526 void memory_region_clear_coalescing(MemoryRegion *mr)
2527 {
2528 CoalescedMemoryRange *cmr;
2529
2530 if (QTAILQ_EMPTY(&mr->coalesced)) {
2531 return;
2532 }
2533
2534 qemu_flush_coalesced_mmio_buffer();
2535 mr->flush_coalesced_mmio = false;
2536
2537 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2538 cmr = QTAILQ_FIRST(&mr->coalesced);
2539 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
2540 memory_region_update_coalesced_range(mr, cmr, false);
2541 g_free(cmr);
2542 }
2543 }
2544
2545 void memory_region_set_flush_coalesced(MemoryRegion *mr)
2546 {
2547 mr->flush_coalesced_mmio = true;
2548 }
2549
2550 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2551 {
2552 qemu_flush_coalesced_mmio_buffer();
2553 if (QTAILQ_EMPTY(&mr->coalesced)) {
2554 mr->flush_coalesced_mmio = false;
2555 }
2556 }
2557
2558 void memory_region_add_eventfd(MemoryRegion *mr,
2559 hwaddr addr,
2560 unsigned size,
2561 bool match_data,
2562 uint64_t data,
2563 EventNotifier *e)
2564 {
2565 MemoryRegionIoeventfd mrfd = {
2566 .addr.start = int128_make64(addr),
2567 .addr.size = int128_make64(size),
2568 .match_data = match_data,
2569 .data = data,
2570 .e = e,
2571 };
2572 unsigned i;
2573
2574 if (size) {
2575 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2576 }
2577 memory_region_transaction_begin();
2578 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2579 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
2580 break;
2581 }
2582 }
2583 ++mr->ioeventfd_nb;
2584 mr->ioeventfds = g_realloc(mr->ioeventfds,
2585 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2586 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2587 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2588 mr->ioeventfds[i] = mrfd;
2589 ioeventfd_update_pending |= mr->enabled;
2590 memory_region_transaction_commit();
2591 }
2592
2593 void memory_region_del_eventfd(MemoryRegion *mr,
2594 hwaddr addr,
2595 unsigned size,
2596 bool match_data,
2597 uint64_t data,
2598 EventNotifier *e)
2599 {
2600 MemoryRegionIoeventfd mrfd = {
2601 .addr.start = int128_make64(addr),
2602 .addr.size = int128_make64(size),
2603 .match_data = match_data,
2604 .data = data,
2605 .e = e,
2606 };
2607 unsigned i;
2608
2609 if (size) {
2610 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
2611 }
2612 memory_region_transaction_begin();
2613 for (i = 0; i < mr->ioeventfd_nb; ++i) {
2614 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
2615 break;
2616 }
2617 }
2618 assert(i != mr->ioeventfd_nb);
2619 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2620 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2621 --mr->ioeventfd_nb;
2622 mr->ioeventfds = g_realloc(mr->ioeventfds,
2623 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
2624 ioeventfd_update_pending |= mr->enabled;
2625 memory_region_transaction_commit();
2626 }
2627
2628 static void memory_region_update_container_subregions(MemoryRegion *subregion)
2629 {
2630 MemoryRegion *mr = subregion->container;
2631 MemoryRegion *other;
2632
2633 memory_region_transaction_begin();
2634
2635 memory_region_ref(subregion);
2636 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2637 if (subregion->priority >= other->priority) {
2638 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2639 goto done;
2640 }
2641 }
2642 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2643 done:
2644 memory_region_update_pending |= mr->enabled && subregion->enabled;
2645 memory_region_transaction_commit();
2646 }
2647
2648 static void memory_region_add_subregion_common(MemoryRegion *mr,
2649 hwaddr offset,
2650 MemoryRegion *subregion)
2651 {
2652 MemoryRegion *alias;
2653
2654 assert(!subregion->container);
2655 subregion->container = mr;
2656 for (alias = subregion->alias; alias; alias = alias->alias) {
2657 alias->mapped_via_alias++;
2658 }
2659 subregion->addr = offset;
2660 memory_region_update_container_subregions(subregion);
2661 }
2662
2663 void memory_region_add_subregion(MemoryRegion *mr,
2664 hwaddr offset,
2665 MemoryRegion *subregion)
2666 {
2667 subregion->priority = 0;
2668 memory_region_add_subregion_common(mr, offset, subregion);
2669 }
2670
2671 void memory_region_add_subregion_overlap(MemoryRegion *mr,
2672 hwaddr offset,
2673 MemoryRegion *subregion,
2674 int priority)
2675 {
2676 subregion->priority = priority;
2677 memory_region_add_subregion_common(mr, offset, subregion);
2678 }
2679
2680 void memory_region_del_subregion(MemoryRegion *mr,
2681 MemoryRegion *subregion)
2682 {
2683 MemoryRegion *alias;
2684
2685 memory_region_transaction_begin();
2686 assert(subregion->container == mr);
2687 subregion->container = NULL;
2688 for (alias = subregion->alias; alias; alias = alias->alias) {
2689 alias->mapped_via_alias--;
2690 assert(alias->mapped_via_alias >= 0);
2691 }
2692 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
2693 memory_region_unref(subregion);
2694 memory_region_update_pending |= mr->enabled && subregion->enabled;
2695 memory_region_transaction_commit();
2696 }
2697
2698 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2699 {
2700 if (enabled == mr->enabled) {
2701 return;
2702 }
2703 memory_region_transaction_begin();
2704 mr->enabled = enabled;
2705 memory_region_update_pending = true;
2706 memory_region_transaction_commit();
2707 }
2708
2709 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2710 {
2711 Int128 s = int128_make64(size);
2712
2713 if (size == UINT64_MAX) {
2714 s = int128_2_64();
2715 }
2716 if (int128_eq(s, mr->size)) {
2717 return;
2718 }
2719 memory_region_transaction_begin();
2720 mr->size = s;
2721 memory_region_update_pending = true;
2722 memory_region_transaction_commit();
2723 }
2724
2725 static void memory_region_readd_subregion(MemoryRegion *mr)
2726 {
2727 MemoryRegion *container = mr->container;
2728
2729 if (container) {
2730 memory_region_transaction_begin();
2731 memory_region_ref(mr);
2732 memory_region_del_subregion(container, mr);
2733 memory_region_add_subregion_common(container, mr->addr, mr);
2734 memory_region_unref(mr);
2735 memory_region_transaction_commit();
2736 }
2737 }
2738
2739 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2740 {
2741 if (addr != mr->addr) {
2742 mr->addr = addr;
2743 memory_region_readd_subregion(mr);
2744 }
2745 }
2746
2747 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
2748 {
2749 assert(mr->alias);
2750
2751 if (offset == mr->alias_offset) {
2752 return;
2753 }
2754
2755 memory_region_transaction_begin();
2756 mr->alias_offset = offset;
2757 memory_region_update_pending |= mr->enabled;
2758 memory_region_transaction_commit();
2759 }
2760
2761 void memory_region_set_unmergeable(MemoryRegion *mr, bool unmergeable)
2762 {
2763 if (unmergeable == mr->unmergeable) {
2764 return;
2765 }
2766
2767 memory_region_transaction_begin();
2768 mr->unmergeable = unmergeable;
2769 memory_region_update_pending |= mr->enabled;
2770 memory_region_transaction_commit();
2771 }
2772
2773 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2774 {
2775 return mr->align;
2776 }
2777
2778 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2779 {
2780 const AddrRange *addr = addr_;
2781 const FlatRange *fr = fr_;
2782
2783 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2784 return -1;
2785 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2786 return 1;
2787 }
2788 return 0;
2789 }
2790
2791 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
2792 {
2793 return bsearch(&addr, view->ranges, view->nr,
2794 sizeof(FlatRange), cmp_flatrange_addr);
2795 }
2796
2797 bool memory_region_is_mapped(MemoryRegion *mr)
2798 {
2799 return !!mr->container || mr->mapped_via_alias;
2800 }
2801
2802 /* Same as memory_region_find, but it does not add a reference to the
2803 * returned region. It must be called from an RCU critical section.
2804 */
2805 static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2806 hwaddr addr, uint64_t size)
2807 {
2808 MemoryRegionSection ret = { .mr = NULL };
2809 MemoryRegion *root;
2810 AddressSpace *as;
2811 AddrRange range;
2812 FlatView *view;
2813 FlatRange *fr;
2814
2815 addr += mr->addr;
2816 for (root = mr; root->container; ) {
2817 root = root->container;
2818 addr += root->addr;
2819 }
2820
2821 as = memory_region_to_address_space(root);
2822 if (!as) {
2823 return ret;
2824 }
2825 range = addrrange_make(int128_make64(addr), int128_make64(size));
2826
2827 view = address_space_to_flatview(as);
2828 fr = flatview_lookup(view, range);
2829 if (!fr) {
2830 return ret;
2831 }
2832
2833 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
2834 --fr;
2835 }
2836
2837 ret.mr = fr->mr;
2838 ret.fv = view;
2839 range = addrrange_intersection(range, fr->addr);
2840 ret.offset_within_region = fr->offset_in_region;
2841 ret.offset_within_region += int128_get64(int128_sub(range.start,
2842 fr->addr.start));
2843 ret.size = range.size;
2844 ret.offset_within_address_space = int128_get64(range.start);
2845 ret.readonly = fr->readonly;
2846 ret.nonvolatile = fr->nonvolatile;
2847 return ret;
2848 }
2849
2850 MemoryRegionSection memory_region_find(MemoryRegion *mr,
2851 hwaddr addr, uint64_t size)
2852 {
2853 MemoryRegionSection ret;
2854 RCU_READ_LOCK_GUARD();
2855 ret = memory_region_find_rcu(mr, addr, size);
2856 if (ret.mr) {
2857 memory_region_ref(ret.mr);
2858 }
2859 return ret;
2860 }
2861
2862 MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2863 {
2864 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2865
2866 *tmp = *s;
2867 if (tmp->mr) {
2868 memory_region_ref(tmp->mr);
2869 }
2870 if (tmp->fv) {
2871 bool ret = flatview_ref(tmp->fv);
2872
2873 g_assert(ret);
2874 }
2875 return tmp;
2876 }
2877
2878 void memory_region_section_free_copy(MemoryRegionSection *s)
2879 {
2880 if (s->fv) {
2881 flatview_unref(s->fv);
2882 }
2883 if (s->mr) {
2884 memory_region_unref(s->mr);
2885 }
2886 g_free(s);
2887 }
2888
2889 bool memory_region_present(MemoryRegion *container, hwaddr addr)
2890 {
2891 MemoryRegion *mr;
2892
2893 RCU_READ_LOCK_GUARD();
2894 mr = memory_region_find_rcu(container, addr, 1).mr;
2895 return mr && mr != container;
2896 }
2897
2898 void memory_global_dirty_log_sync(bool last_stage)
2899 {
2900 memory_region_sync_dirty_bitmap(NULL, last_stage);
2901 }
2902
2903 void memory_global_after_dirty_log_sync(void)
2904 {
2905 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2906 }
2907
2908 /*
2909 * Dirty track stop flags that are postponed due to VM being stopped. Should
2910 * only be used within vmstate_change hook.
2911 */
2912 static unsigned int postponed_stop_flags;
2913 static VMChangeStateEntry *vmstate_change;
2914 static void memory_global_dirty_log_stop_postponed_run(void);
2915
2916 void memory_global_dirty_log_start(unsigned int flags)
2917 {
2918 unsigned int old_flags;
2919
2920 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2921
2922 if (vmstate_change) {
2923 /* If there is postponed stop(), operate on it first */
2924 postponed_stop_flags &= ~flags;
2925 memory_global_dirty_log_stop_postponed_run();
2926 }
2927
2928 flags &= ~global_dirty_tracking;
2929 if (!flags) {
2930 return;
2931 }
2932
2933 old_flags = global_dirty_tracking;
2934 global_dirty_tracking |= flags;
2935 trace_global_dirty_changed(global_dirty_tracking);
2936
2937 if (!old_flags) {
2938 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2939 memory_region_transaction_begin();
2940 memory_region_update_pending = true;
2941 memory_region_transaction_commit();
2942 }
2943 }
2944
2945 static void memory_global_dirty_log_do_stop(unsigned int flags)
2946 {
2947 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2948 assert((global_dirty_tracking & flags) == flags);
2949 global_dirty_tracking &= ~flags;
2950
2951 trace_global_dirty_changed(global_dirty_tracking);
2952
2953 if (!global_dirty_tracking) {
2954 memory_region_transaction_begin();
2955 memory_region_update_pending = true;
2956 memory_region_transaction_commit();
2957 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2958 }
2959 }
2960
2961 /*
2962 * Execute the postponed dirty log stop operations if there is, then reset
2963 * everything (including the flags and the vmstate change hook).
2964 */
2965 static void memory_global_dirty_log_stop_postponed_run(void)
2966 {
2967 /* This must be called with the vmstate handler registered */
2968 assert(vmstate_change);
2969
2970 /* Note: postponed_stop_flags can be cleared in log start routine */
2971 if (postponed_stop_flags) {
2972 memory_global_dirty_log_do_stop(postponed_stop_flags);
2973 postponed_stop_flags = 0;
2974 }
2975
2976 qemu_del_vm_change_state_handler(vmstate_change);
2977 vmstate_change = NULL;
2978 }
2979
2980 static void memory_vm_change_state_handler(void *opaque, bool running,
2981 RunState state)
2982 {
2983 if (running) {
2984 memory_global_dirty_log_stop_postponed_run();
2985 }
2986 }
2987
2988 void memory_global_dirty_log_stop(unsigned int flags)
2989 {
2990 if (!runstate_is_running()) {
2991 /* Postpone the dirty log stop, e.g., to when VM starts again */
2992 if (vmstate_change) {
2993 /* Batch with previous postponed flags */
2994 postponed_stop_flags |= flags;
2995 } else {
2996 postponed_stop_flags = flags;
2997 vmstate_change = qemu_add_vm_change_state_handler(
2998 memory_vm_change_state_handler, NULL);
2999 }
3000 return;
3001 }
3002
3003 memory_global_dirty_log_do_stop(flags);
3004 }
3005
3006 static void listener_add_address_space(MemoryListener *listener,
3007 AddressSpace *as)
3008 {
3009 FlatView *view;
3010 FlatRange *fr;
3011
3012 if (listener->begin) {
3013 listener->begin(listener);
3014 }
3015 if (global_dirty_tracking) {
3016 if (listener->log_global_start) {
3017 listener->log_global_start(listener);
3018 }
3019 }
3020
3021 view = address_space_get_flatview(as);
3022 FOR_EACH_FLAT_RANGE(fr, view) {
3023 MemoryRegionSection section = section_from_flat_range(fr, view);
3024
3025 if (listener->region_add) {
3026 listener->region_add(listener, &section);
3027 }
3028 if (fr->dirty_log_mask && listener->log_start) {
3029 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
3030 }
3031 }
3032 if (listener->commit) {
3033 listener->commit(listener);
3034 }
3035 flatview_unref(view);
3036 }
3037
3038 static void listener_del_address_space(MemoryListener *listener,
3039 AddressSpace *as)
3040 {
3041 FlatView *view;
3042 FlatRange *fr;
3043
3044 if (listener->begin) {
3045 listener->begin(listener);
3046 }
3047 view = address_space_get_flatview(as);
3048 FOR_EACH_FLAT_RANGE(fr, view) {
3049 MemoryRegionSection section = section_from_flat_range(fr, view);
3050
3051 if (fr->dirty_log_mask && listener->log_stop) {
3052 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
3053 }
3054 if (listener->region_del) {
3055 listener->region_del(listener, &section);
3056 }
3057 }
3058 if (listener->commit) {
3059 listener->commit(listener);
3060 }
3061 flatview_unref(view);
3062 }
3063
3064 void memory_listener_register(MemoryListener *listener, AddressSpace *as)
3065 {
3066 MemoryListener *other = NULL;
3067
3068 /* Only one of them can be defined for a listener */
3069 assert(!(listener->log_sync && listener->log_sync_global));
3070
3071 listener->address_space = as;
3072 if (QTAILQ_EMPTY(&memory_listeners)
3073 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
3074 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
3075 } else {
3076 QTAILQ_FOREACH(other, &memory_listeners, link) {
3077 if (listener->priority < other->priority) {
3078 break;
3079 }
3080 }
3081 QTAILQ_INSERT_BEFORE(other, listener, link);
3082 }
3083
3084 if (QTAILQ_EMPTY(&as->listeners)
3085 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
3086 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
3087 } else {
3088 QTAILQ_FOREACH(other, &as->listeners, link_as) {
3089 if (listener->priority < other->priority) {
3090 break;
3091 }
3092 }
3093 QTAILQ_INSERT_BEFORE(other, listener, link_as);
3094 }
3095
3096 listener_add_address_space(listener, as);
3097
3098 if (listener->eventfd_add || listener->eventfd_del) {
3099 as->ioeventfd_notifiers++;
3100 }
3101 }
3102
3103 void memory_listener_unregister(MemoryListener *listener)
3104 {
3105 if (!listener->address_space) {
3106 return;
3107 }
3108
3109 if (listener->eventfd_add || listener->eventfd_del) {
3110 listener->address_space->ioeventfd_notifiers--;
3111 }
3112
3113 listener_del_address_space(listener, listener->address_space);
3114 QTAILQ_REMOVE(&memory_listeners, listener, link);
3115 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
3116 listener->address_space = NULL;
3117 }
3118
3119 void address_space_remove_listeners(AddressSpace *as)
3120 {
3121 while (!QTAILQ_EMPTY(&as->listeners)) {
3122 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
3123 }
3124 }
3125
3126 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
3127 {
3128 memory_region_ref(root);
3129 as->root = root;
3130 as->current_map = NULL;
3131 as->ioeventfd_nb = 0;
3132 as->ioeventfds = NULL;
3133 QTAILQ_INIT(&as->listeners);
3134 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
3135 as->name = g_strdup(name ? name : "anonymous");
3136 address_space_update_topology(as);
3137 address_space_update_ioeventfds(as);
3138 }
3139
3140 static void do_address_space_destroy(AddressSpace *as)
3141 {
3142 assert(QTAILQ_EMPTY(&as->listeners));
3143
3144 flatview_unref(as->current_map);
3145 g_free(as->name);
3146 g_free(as->ioeventfds);
3147 memory_region_unref(as->root);
3148 }
3149
3150 void address_space_destroy(AddressSpace *as)
3151 {
3152 MemoryRegion *root = as->root;
3153
3154 /* Flush out anything from MemoryListeners listening in on this */
3155 memory_region_transaction_begin();
3156 as->root = NULL;
3157 memory_region_transaction_commit();
3158 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
3159
3160 /* At this point, as->dispatch and as->current_map are dummy
3161 * entries that the guest should never use. Wait for the old
3162 * values to expire before freeing the data.
3163 */
3164 as->root = root;
3165 call_rcu(as, do_address_space_destroy, rcu);
3166 }
3167
3168 static const char *memory_region_type(MemoryRegion *mr)
3169 {
3170 if (mr->alias) {
3171 return memory_region_type(mr->alias);
3172 }
3173 if (memory_region_is_ram_device(mr)) {
3174 return "ramd";
3175 } else if (memory_region_is_romd(mr)) {
3176 return "romd";
3177 } else if (memory_region_is_rom(mr)) {
3178 return "rom";
3179 } else if (memory_region_is_ram(mr)) {
3180 return "ram";
3181 } else {
3182 return "i/o";
3183 }
3184 }
3185
3186 typedef struct MemoryRegionList MemoryRegionList;
3187
3188 struct MemoryRegionList {
3189 const MemoryRegion *mr;
3190 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
3191 };
3192
3193 typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
3194
3195 #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3196 int128_sub((size), int128_one())) : 0)
3197 #define MTREE_INDENT " "
3198
3199 static void mtree_expand_owner(const char *label, Object *obj)
3200 {
3201 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3202
3203 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
3204 if (dev && dev->id) {
3205 qemu_printf(" id=%s", dev->id);
3206 } else {
3207 char *canonical_path = object_get_canonical_path(obj);
3208 if (canonical_path) {
3209 qemu_printf(" path=%s", canonical_path);
3210 g_free(canonical_path);
3211 } else {
3212 qemu_printf(" type=%s", object_get_typename(obj));
3213 }
3214 }
3215 qemu_printf("}");
3216 }
3217
3218 static void mtree_print_mr_owner(const MemoryRegion *mr)
3219 {
3220 Object *owner = mr->owner;
3221 Object *parent = memory_region_owner((MemoryRegion *)mr);
3222
3223 if (!owner && !parent) {
3224 qemu_printf(" orphan");
3225 return;
3226 }
3227 if (owner) {
3228 mtree_expand_owner("owner", owner);
3229 }
3230 if (parent && parent != owner) {
3231 mtree_expand_owner("parent", parent);
3232 }
3233 }
3234
3235 static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
3236 hwaddr base,
3237 MemoryRegionListHead *alias_print_queue,
3238 bool owner, bool display_disabled)
3239 {
3240 MemoryRegionList *new_ml, *ml, *next_ml;
3241 MemoryRegionListHead submr_print_queue;
3242 const MemoryRegion *submr;
3243 unsigned int i;
3244 hwaddr cur_start, cur_end;
3245
3246 if (!mr) {
3247 return;
3248 }
3249
3250 cur_start = base + mr->addr;
3251 cur_end = cur_start + MR_SIZE(mr->size);
3252
3253 /*
3254 * Try to detect overflow of memory region. This should never
3255 * happen normally. When it happens, we dump something to warn the
3256 * user who is observing this.
3257 */
3258 if (cur_start < base || cur_end < cur_start) {
3259 qemu_printf("[DETECTED OVERFLOW!] ");
3260 }
3261
3262 if (mr->alias) {
3263 bool found = false;
3264
3265 /* check if the alias is already in the queue */
3266 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
3267 if (ml->mr == mr->alias) {
3268 found = true;
3269 }
3270 }
3271
3272 if (!found) {
3273 ml = g_new(MemoryRegionList, 1);
3274 ml->mr = mr->alias;
3275 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
3276 }
3277 if (mr->enabled || display_disabled) {
3278 for (i = 0; i < level; i++) {
3279 qemu_printf(MTREE_INDENT);
3280 }
3281 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3282 " (prio %d, %s%s): alias %s @%s " HWADDR_FMT_plx
3283 "-" HWADDR_FMT_plx "%s",
3284 cur_start, cur_end,
3285 mr->priority,
3286 mr->nonvolatile ? "nv-" : "",
3287 memory_region_type((MemoryRegion *)mr),
3288 memory_region_name(mr),
3289 memory_region_name(mr->alias),
3290 mr->alias_offset,
3291 mr->alias_offset + MR_SIZE(mr->size),
3292 mr->enabled ? "" : " [disabled]");
3293 if (owner) {
3294 mtree_print_mr_owner(mr);
3295 }
3296 qemu_printf("\n");
3297 }
3298 } else {
3299 if (mr->enabled || display_disabled) {
3300 for (i = 0; i < level; i++) {
3301 qemu_printf(MTREE_INDENT);
3302 }
3303 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3304 " (prio %d, %s%s): %s%s",
3305 cur_start, cur_end,
3306 mr->priority,
3307 mr->nonvolatile ? "nv-" : "",
3308 memory_region_type((MemoryRegion *)mr),
3309 memory_region_name(mr),
3310 mr->enabled ? "" : " [disabled]");
3311 if (owner) {
3312 mtree_print_mr_owner(mr);
3313 }
3314 qemu_printf("\n");
3315 }
3316 }
3317
3318 QTAILQ_INIT(&submr_print_queue);
3319
3320 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
3321 new_ml = g_new(MemoryRegionList, 1);
3322 new_ml->mr = submr;
3323 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3324 if (new_ml->mr->addr < ml->mr->addr ||
3325 (new_ml->mr->addr == ml->mr->addr &&
3326 new_ml->mr->priority > ml->mr->priority)) {
3327 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
3328 new_ml = NULL;
3329 break;
3330 }
3331 }
3332 if (new_ml) {
3333 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
3334 }
3335 }
3336
3337 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
3338 mtree_print_mr(ml->mr, level + 1, cur_start,
3339 alias_print_queue, owner, display_disabled);
3340 }
3341
3342 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
3343 g_free(ml);
3344 }
3345 }
3346
3347 struct FlatViewInfo {
3348 int counter;
3349 bool dispatch_tree;
3350 bool owner;
3351 AccelClass *ac;
3352 };
3353
3354 static void mtree_print_flatview(gpointer key, gpointer value,
3355 gpointer user_data)
3356 {
3357 FlatView *view = key;
3358 GArray *fv_address_spaces = value;
3359 struct FlatViewInfo *fvi = user_data;
3360 FlatRange *range = &view->ranges[0];
3361 MemoryRegion *mr;
3362 int n = view->nr;
3363 int i;
3364 AddressSpace *as;
3365
3366 qemu_printf("FlatView #%d\n", fvi->counter);
3367 ++fvi->counter;
3368
3369 for (i = 0; i < fv_address_spaces->len; ++i) {
3370 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3371 qemu_printf(" AS \"%s\", root: %s",
3372 as->name, memory_region_name(as->root));
3373 if (as->root->alias) {
3374 qemu_printf(", alias %s", memory_region_name(as->root->alias));
3375 }
3376 qemu_printf("\n");
3377 }
3378
3379 qemu_printf(" Root memory region: %s\n",
3380 view->root ? memory_region_name(view->root) : "(none)");
3381
3382 if (n <= 0) {
3383 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
3384 return;
3385 }
3386
3387 while (n--) {
3388 mr = range->mr;
3389 if (range->offset_in_region) {
3390 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3391 " (prio %d, %s%s): %s @" HWADDR_FMT_plx,
3392 int128_get64(range->addr.start),
3393 int128_get64(range->addr.start)
3394 + MR_SIZE(range->addr.size),
3395 mr->priority,
3396 range->nonvolatile ? "nv-" : "",
3397 range->readonly ? "rom" : memory_region_type(mr),
3398 memory_region_name(mr),
3399 range->offset_in_region);
3400 } else {
3401 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3402 " (prio %d, %s%s): %s",
3403 int128_get64(range->addr.start),
3404 int128_get64(range->addr.start)
3405 + MR_SIZE(range->addr.size),
3406 mr->priority,
3407 range->nonvolatile ? "nv-" : "",
3408 range->readonly ? "rom" : memory_region_type(mr),
3409 memory_region_name(mr));
3410 }
3411 if (fvi->owner) {
3412 mtree_print_mr_owner(mr);
3413 }
3414
3415 if (fvi->ac) {
3416 for (i = 0; i < fv_address_spaces->len; ++i) {
3417 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3418 if (fvi->ac->has_memory(current_machine, as,
3419 int128_get64(range->addr.start),
3420 MR_SIZE(range->addr.size) + 1)) {
3421 qemu_printf(" %s", fvi->ac->name);
3422 }
3423 }
3424 }
3425 qemu_printf("\n");
3426 range++;
3427 }
3428
3429 #if !defined(CONFIG_USER_ONLY)
3430 if (fvi->dispatch_tree && view->root) {
3431 mtree_print_dispatch(view->dispatch, view->root);
3432 }
3433 #endif
3434
3435 qemu_printf("\n");
3436 }
3437
3438 static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3439 gpointer user_data)
3440 {
3441 FlatView *view = key;
3442 GArray *fv_address_spaces = value;
3443
3444 g_array_unref(fv_address_spaces);
3445 flatview_unref(view);
3446
3447 return true;
3448 }
3449
3450 static void mtree_info_flatview(bool dispatch_tree, bool owner)
3451 {
3452 struct FlatViewInfo fvi = {
3453 .counter = 0,
3454 .dispatch_tree = dispatch_tree,
3455 .owner = owner,
3456 };
3457 AddressSpace *as;
3458 FlatView *view;
3459 GArray *fv_address_spaces;
3460 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3461 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
3462
3463 if (ac->has_memory) {
3464 fvi.ac = ac;
3465 }
3466
3467 /* Gather all FVs in one table */
3468 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3469 view = address_space_get_flatview(as);
3470
3471 fv_address_spaces = g_hash_table_lookup(views, view);
3472 if (!fv_address_spaces) {
3473 fv_address_spaces = g_array_new(false, false, sizeof(as));
3474 g_hash_table_insert(views, view, fv_address_spaces);
3475 }
3476
3477 g_array_append_val(fv_address_spaces, as);
3478 }
3479
3480 /* Print */
3481 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
3482
3483 /* Free */
3484 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3485 g_hash_table_unref(views);
3486 }
3487
3488 struct AddressSpaceInfo {
3489 MemoryRegionListHead *ml_head;
3490 bool owner;
3491 bool disabled;
3492 };
3493
3494 /* Returns negative value if a < b; zero if a = b; positive value if a > b. */
3495 static gint address_space_compare_name(gconstpointer a, gconstpointer b)
3496 {
3497 const AddressSpace *as_a = a;
3498 const AddressSpace *as_b = b;
3499
3500 return g_strcmp0(as_a->name, as_b->name);
3501 }
3502
3503 static void mtree_print_as_name(gpointer data, gpointer user_data)
3504 {
3505 AddressSpace *as = data;
3506
3507 qemu_printf("address-space: %s\n", as->name);
3508 }
3509
3510 static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
3511 {
3512 MemoryRegion *mr = key;
3513 GSList *as_same_root_mr_list = value;
3514 struct AddressSpaceInfo *asi = user_data;
3515
3516 g_slist_foreach(as_same_root_mr_list, mtree_print_as_name, NULL);
3517 mtree_print_mr(mr, 1, 0, asi->ml_head, asi->owner, asi->disabled);
3518 qemu_printf("\n");
3519 }
3520
3521 static gboolean mtree_info_as_free(gpointer key, gpointer value,
3522 gpointer user_data)
3523 {
3524 GSList *as_same_root_mr_list = value;
3525
3526 g_slist_free(as_same_root_mr_list);
3527
3528 return true;
3529 }
3530
3531 static void mtree_info_as(bool dispatch_tree, bool owner, bool disabled)
3532 {
3533 MemoryRegionListHead ml_head;
3534 MemoryRegionList *ml, *ml2;
3535 AddressSpace *as;
3536 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3537 GSList *as_same_root_mr_list;
3538 struct AddressSpaceInfo asi = {
3539 .ml_head = &ml_head,
3540 .owner = owner,
3541 .disabled = disabled,
3542 };
3543
3544 QTAILQ_INIT(&ml_head);
3545
3546 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3547 /* Create hashtable, key=AS root MR, value = list of AS */
3548 as_same_root_mr_list = g_hash_table_lookup(views, as->root);
3549 as_same_root_mr_list = g_slist_insert_sorted(as_same_root_mr_list, as,
3550 address_space_compare_name);
3551 g_hash_table_insert(views, as->root, as_same_root_mr_list);
3552 }
3553
3554 /* print address spaces */
3555 g_hash_table_foreach(views, mtree_print_as, &asi);
3556 g_hash_table_foreach_remove(views, mtree_info_as_free, 0);
3557 g_hash_table_unref(views);
3558
3559 /* print aliased regions */
3560 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
3561 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
3562 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
3563 qemu_printf("\n");
3564 }
3565
3566 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
3567 g_free(ml);
3568 }
3569 }
3570
3571 void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3572 {
3573 if (flatview) {
3574 mtree_info_flatview(dispatch_tree, owner);
3575 } else {
3576 mtree_info_as(dispatch_tree, owner, disabled);
3577 }
3578 }
3579
3580 void memory_region_init_ram(MemoryRegion *mr,
3581 Object *owner,
3582 const char *name,
3583 uint64_t size,
3584 Error **errp)
3585 {
3586 DeviceState *owner_dev;
3587 Error *err = NULL;
3588
3589 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3590 if (err) {
3591 error_propagate(errp, err);
3592 return;
3593 }
3594 /* This will assert if owner is neither NULL nor a DeviceState.
3595 * We only want the owner here for the purposes of defining a
3596 * unique name for migration. TODO: Ideally we should implement
3597 * a naming scheme for Objects which are not DeviceStates, in
3598 * which case we can relax this restriction.
3599 */
3600 owner_dev = DEVICE(owner);
3601 vmstate_register_ram(mr, owner_dev);
3602 }
3603
3604 void memory_region_init_rom(MemoryRegion *mr,
3605 Object *owner,
3606 const char *name,
3607 uint64_t size,
3608 Error **errp)
3609 {
3610 DeviceState *owner_dev;
3611 Error *err = NULL;
3612
3613 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3614 if (err) {
3615 error_propagate(errp, err);
3616 return;
3617 }
3618 /* This will assert if owner is neither NULL nor a DeviceState.
3619 * We only want the owner here for the purposes of defining a
3620 * unique name for migration. TODO: Ideally we should implement
3621 * a naming scheme for Objects which are not DeviceStates, in
3622 * which case we can relax this restriction.
3623 */
3624 owner_dev = DEVICE(owner);
3625 vmstate_register_ram(mr, owner_dev);
3626 }
3627
3628 void memory_region_init_rom_device(MemoryRegion *mr,
3629 Object *owner,
3630 const MemoryRegionOps *ops,
3631 void *opaque,
3632 const char *name,
3633 uint64_t size,
3634 Error **errp)
3635 {
3636 DeviceState *owner_dev;
3637 Error *err = NULL;
3638
3639 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3640 name, size, &err);
3641 if (err) {
3642 error_propagate(errp, err);
3643 return;
3644 }
3645 /* This will assert if owner is neither NULL nor a DeviceState.
3646 * We only want the owner here for the purposes of defining a
3647 * unique name for migration. TODO: Ideally we should implement
3648 * a naming scheme for Objects which are not DeviceStates, in
3649 * which case we can relax this restriction.
3650 */
3651 owner_dev = DEVICE(owner);
3652 vmstate_register_ram(mr, owner_dev);
3653 }
3654
3655 /*
3656 * Support system builds with CONFIG_FUZZ using a weak symbol and a stub for
3657 * the fuzz_dma_read_cb callback
3658 */
3659 #ifdef CONFIG_FUZZ
3660 void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3661 size_t len,
3662 MemoryRegion *mr)
3663 {
3664 }
3665 #endif
3666
3667 static const TypeInfo memory_region_info = {
3668 .parent = TYPE_OBJECT,
3669 .name = TYPE_MEMORY_REGION,
3670 .class_size = sizeof(MemoryRegionClass),
3671 .instance_size = sizeof(MemoryRegion),
3672 .instance_init = memory_region_initfn,
3673 .instance_finalize = memory_region_finalize,
3674 };
3675
3676 static const TypeInfo iommu_memory_region_info = {
3677 .parent = TYPE_MEMORY_REGION,
3678 .name = TYPE_IOMMU_MEMORY_REGION,
3679 .class_size = sizeof(IOMMUMemoryRegionClass),
3680 .instance_size = sizeof(IOMMUMemoryRegion),
3681 .instance_init = iommu_memory_region_initfn,
3682 .abstract = true,
3683 };
3684
3685 static const TypeInfo ram_discard_manager_info = {
3686 .parent = TYPE_INTERFACE,
3687 .name = TYPE_RAM_DISCARD_MANAGER,
3688 .class_size = sizeof(RamDiscardManagerClass),
3689 };
3690
3691 static void memory_register_types(void)
3692 {
3693 type_register_static(&memory_region_info);
3694 type_register_static(&iommu_memory_region_info);
3695 type_register_static(&ram_discard_manager_info);
3696 }
3697
3698 type_init(memory_register_types)
AR7 emulation for QEMU