2 * m68k virtual CPU header
4 * Copyright (c) 2005-2007 CodeSourcery
5 * Written by Paul Brook
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
24 #define TARGET_LONG_BITS 32
26 #define CPUArchState struct CPUM68KState
28 #include "qemu-common.h"
29 #include "exec/cpu-defs.h"
31 #include "fpu/softfloat.h"
44 #define EXCP_ACCESS 2 /* Access (MMU) error. */
45 #define EXCP_ADDRESS 3 /* Address error. */
46 #define EXCP_ILLEGAL 4 /* Illegal instruction. */
47 #define EXCP_DIV0 5 /* Divide by zero */
48 #define EXCP_PRIVILEGE 8 /* Privilege violation. */
50 #define EXCP_LINEA 10 /* Unimplemented line-A (MAC) opcode. */
51 #define EXCP_LINEF 11 /* Unimplemented line-F (FPU) opcode. */
52 #define EXCP_DEBUGNBP 12 /* Non-breakpoint debug interrupt. */
53 #define EXCP_DEBEGBP 13 /* Breakpoint debug interrupt. */
54 #define EXCP_FORMAT 14 /* RTE format error. */
55 #define EXCP_UNINITIALIZED 15
56 #define EXCP_TRAP0 32 /* User trap #0. */
57 #define EXCP_TRAP15 47 /* User trap #15. */
58 #define EXCP_FP_BSUN 48 /* Branch Set on Unordered */
59 #define EXCP_FP_INEX 49 /* Inexact result */
60 #define EXCP_FP_DZ 50 /* Divide by Zero */
61 #define EXCP_FP_UNFL 51 /* Underflow */
62 #define EXCP_FP_OPERR 52 /* Operand Error */
63 #define EXCP_FP_OVFL 53 /* Overflow */
64 #define EXCP_FP_SNAN 54 /* Signaling Not-A-Number */
65 #define EXCP_FP_UNIMP 55 /* Unimplemented Data type */
66 #define EXCP_UNSUPPORTED 61
68 #define EXCP_RTE 0x100
69 #define EXCP_HALT_INSN 0x101
71 #define NB_MMU_MODES 2
72 #define TARGET_INSN_START_EXTRA_WORDS 1
74 typedef CPU_LDoubleU FPReg
;
76 typedef struct CPUM68KState
{
82 /* SSP and USP. The current_sp is stored in aregs[7], the other here. */
86 /* Condition flags. */
88 uint32_t cc_x
; /* always 0/1 */
89 uint32_t cc_n
; /* in bit 31 (i.e. negative) */
90 uint32_t cc_v
; /* in bit 31, unused, or computed from cc_n and cc_v */
91 uint32_t cc_c
; /* either 0/1, unused, or computed from cc_n and cc_v */
92 uint32_t cc_z
; /* == 0 or unused */
98 float_status fp_status
;
101 /* EMAC Hardware deals with 48-bit values composed of one 32-bit and
102 two 8-bit parts. We store a single 64-bit value and
103 rearrange/extend this when changing modes. */
113 /* Control registers. */
122 uint32_t qregs
[MAX_QREGS
];
124 /* Fields up to this point are cleared by a CPU reset */
125 struct {} end_reset_fields
;
129 /* Fields from here on are preserved across CPU reset. */
135 * @env: #CPUM68KState
137 * A Motorola 68k CPU.
147 static inline M68kCPU
*m68k_env_get_cpu(CPUM68KState
*env
)
149 return container_of(env
, M68kCPU
, env
);
152 #define ENV_GET_CPU(e) CPU(m68k_env_get_cpu(e))
154 #define ENV_OFFSET offsetof(M68kCPU, env)
156 void m68k_cpu_do_interrupt(CPUState
*cpu
);
157 bool m68k_cpu_exec_interrupt(CPUState
*cpu
, int int_req
);
158 void m68k_cpu_dump_state(CPUState
*cpu
, FILE *f
, fprintf_function cpu_fprintf
,
160 hwaddr
m68k_cpu_get_phys_page_debug(CPUState
*cpu
, vaddr addr
);
161 int m68k_cpu_gdb_read_register(CPUState
*cpu
, uint8_t *buf
, int reg
);
162 int m68k_cpu_gdb_write_register(CPUState
*cpu
, uint8_t *buf
, int reg
);
164 void m68k_tcg_init(void);
165 void m68k_cpu_init_gdb(M68kCPU
*cpu
);
166 /* you can call this signal handler from your SIGBUS and SIGSEGV
167 signal handlers to inform the virtual CPU of exceptions. non zero
168 is returned if the signal was handled by the virtual CPU. */
169 int cpu_m68k_signal_handler(int host_signum
, void *pinfo
,
171 uint32_t cpu_m68k_get_ccr(CPUM68KState
*env
);
172 void cpu_m68k_set_ccr(CPUM68KState
*env
, uint32_t);
173 void cpu_m68k_set_fpcr(CPUM68KState
*env
, uint32_t val
);
176 /* Instead of computing the condition codes after each m68k instruction,
177 * QEMU just stores one operand (called CC_SRC), the result
178 * (called CC_DEST) and the type of operation (called CC_OP). When the
179 * condition codes are needed, the condition codes can be calculated
180 * using this information. Condition codes are not generated if they
181 * are only needed for conditional branches.
184 /* Translator only -- use env->cc_op. */
187 /* Each flag bit computed into cc_[xcnvz]. */
190 /* X in cc_x, C = X, N in cc_n, Z in cc_n, V via cc_n/cc_v. */
191 CC_OP_ADDB
, CC_OP_ADDW
, CC_OP_ADDL
,
192 CC_OP_SUBB
, CC_OP_SUBW
, CC_OP_SUBL
,
194 /* X in cc_x, {N,Z,C,V} via cc_n/cc_v. */
195 CC_OP_CMPB
, CC_OP_CMPW
, CC_OP_CMPL
,
197 /* X in cc_x, C = 0, V = 0, N in cc_n, Z in cc_n. */
218 #define M68K_FPIAR_SHIFT 0
219 #define M68K_FPIAR (1 << M68K_FPIAR_SHIFT)
220 #define M68K_FPSR_SHIFT 1
221 #define M68K_FPSR (1 << M68K_FPSR_SHIFT)
222 #define M68K_FPCR_SHIFT 2
223 #define M68K_FPCR (1 << M68K_FPCR_SHIFT)
225 /* Floating-Point Status Register */
228 #define FPSR_CC_MASK 0x0f000000
229 #define FPSR_CC_A 0x01000000 /* Not-A-Number */
230 #define FPSR_CC_I 0x02000000 /* Infinity */
231 #define FPSR_CC_Z 0x04000000 /* Zero */
232 #define FPSR_CC_N 0x08000000 /* Negative */
236 #define FPSR_QT_MASK 0x00ff0000
238 /* Floating-Point Control Register */
240 #define FPCR_RND_MASK 0x0030
241 #define FPCR_RND_N 0x0000
242 #define FPCR_RND_Z 0x0010
243 #define FPCR_RND_M 0x0020
244 #define FPCR_RND_P 0x0030
246 /* Rounding precision */
247 #define FPCR_PREC_MASK 0x00c0
248 #define FPCR_PREC_X 0x0000
249 #define FPCR_PREC_S 0x0040
250 #define FPCR_PREC_D 0x0080
251 #define FPCR_PREC_U 0x00c0
253 #define FPCR_EXCP_MASK 0xff00
255 /* CACR fields are implementation defined, but some bits are common. */
256 #define M68K_CACR_EUSP 0x10
258 #define MACSR_PAV0 0x100
259 #define MACSR_OMC 0x080
260 #define MACSR_SU 0x040
261 #define MACSR_FI 0x020
262 #define MACSR_RT 0x010
263 #define MACSR_N 0x008
264 #define MACSR_Z 0x004
265 #define MACSR_V 0x002
266 #define MACSR_EV 0x001
268 void m68k_set_irq_level(M68kCPU
*cpu
, int level
, uint8_t vector
);
269 void m68k_switch_sp(CPUM68KState
*env
);
271 void do_m68k_semihosting(CPUM68KState
*env
, int nr
);
273 /* There are 4 ColdFire core ISA revisions: A, A+, B and C.
274 Each feature covers the subset of instructions common to the
275 ISA revisions mentioned. */
279 M68K_FEATURE_CF_ISA_A
,
280 M68K_FEATURE_CF_ISA_B
, /* (ISA B or C). */
281 M68K_FEATURE_CF_ISA_APLUSC
, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C). */
282 M68K_FEATURE_BRAL
, /* Long unconditional branch. (ISA A+ or B). */
285 M68K_FEATURE_CF_EMAC
,
286 M68K_FEATURE_CF_EMAC_B
, /* Revision B EMAC (dual accumulate). */
287 M68K_FEATURE_USP
, /* User Stack Pointer. (ISA A+, B or C). */
288 M68K_FEATURE_EXT_FULL
, /* 68020+ full extension word. */
289 M68K_FEATURE_WORD_INDEX
, /* word sized address index registers. */
290 M68K_FEATURE_SCALED_INDEX
, /* scaled address index registers. */
291 M68K_FEATURE_LONG_MULDIV
, /* 32 bit multiply/divide. */
292 M68K_FEATURE_QUAD_MULDIV
, /* 64 bit multiply/divide. */
293 M68K_FEATURE_BCCL
, /* Long conditional branches. */
294 M68K_FEATURE_BITFIELD
, /* Bit field insns. */
301 static inline int m68k_feature(CPUM68KState
*env
, int feature
)
303 return (env
->features
& (1u << feature
)) != 0;
306 void m68k_cpu_list(FILE *f
, fprintf_function cpu_fprintf
);
308 void register_m68k_insns (CPUM68KState
*env
);
310 #ifdef CONFIG_USER_ONLY
311 /* Coldfire Linux uses 8k pages
312 * and m68k linux uses 4k pages
313 * use the smaller one
315 #define TARGET_PAGE_BITS 12
317 /* Smallest TLB entry size is 1k. */
318 #define TARGET_PAGE_BITS 10
321 #define TARGET_PHYS_ADDR_SPACE_BITS 32
322 #define TARGET_VIRT_ADDR_SPACE_BITS 32
324 #define cpu_init(cpu_model) cpu_generic_init(TYPE_M68K_CPU, cpu_model)
326 #define cpu_signal_handler cpu_m68k_signal_handler
327 #define cpu_list m68k_cpu_list
329 /* MMU modes definitions */
330 #define MMU_MODE0_SUFFIX _kernel
331 #define MMU_MODE1_SUFFIX _user
332 #define MMU_USER_IDX 1
333 static inline int cpu_mmu_index (CPUM68KState
*env
, bool ifetch
)
335 return (env
->sr
& SR_S
) == 0 ? 1 : 0;
338 int m68k_cpu_handle_mmu_fault(CPUState
*cpu
, vaddr address
, int rw
,
341 #include "exec/cpu-all.h"
343 static inline void cpu_get_tb_cpu_state(CPUM68KState
*env
, target_ulong
*pc
,
344 target_ulong
*cs_base
, uint32_t *flags
)
348 *flags
= (env
->sr
& SR_S
) /* Bit 13 */
349 | ((env
->macsr
>> 4) & 0xf); /* Bits 0-3 */