5 * PCI Bus and Bridge datastructures.
7 * Do not access the following members directly;
8 * use accessor functions in pci.h, pci_bridge.h
13 PCIIOMMUFunc iommu_fn
;
16 pci_set_irq_fn set_irq
;
17 pci_map_irq_fn map_irq
;
18 pci_route_irq_fn route_intx_to_irq
;
20 PCIDevice
*devices
[PCI_SLOT_MAX
* PCI_FUNC_MAX
];
21 PCIDevice
*parent_dev
;
22 MemoryRegion
*address_space_mem
;
23 MemoryRegion
*address_space_io
;
25 QLIST_HEAD(, PCIBus
) child
; /* this will be replaced by qdev later */
26 QLIST_ENTRY(PCIBus
) sibling
;/* this will be replaced by qdev later */
28 /* The bus IRQ state is the logical OR of the connected devices.
29 Keep a count of the number of devices with raised IRQs. */
34 typedef struct PCIBridgeWindows PCIBridgeWindows
;
37 * Aliases for each of the address space windows that the bridge
38 * can forward. Mapped into the bridge's parent's address space,
41 struct PCIBridgeWindows
{
42 MemoryRegion alias_pref_mem
;
43 MemoryRegion alias_mem
;
44 MemoryRegion alias_io
;
46 * When bridge control VGA forwarding is enabled, bridges will
47 * provide positive decode on the PCI VGA defined I/O port and
48 * MMIO ranges. When enabled forwarding is only qualified on the
49 * I/O and memory enable bits in the bridge command register.
51 MemoryRegion alias_vga
[QEMU_PCI_VGA_NUM_REGIONS
];
54 #define TYPE_PCI_BRIDGE "base-pci-bridge"
55 #define PCI_BRIDGE(obj) OBJECT_CHECK(PCIBridge, (obj), TYPE_PCI_BRIDGE)
65 * Memory regions for the bridge's address spaces. These regions are not
66 * directly added to system_memory/system_io or its descendants.
67 * Bridge's secondary bus points to these, so that devices
68 * under the bridge see these regions as its address spaces.
69 * The regions are as large as the entire address space -
70 * they don't take into account any windows.
72 MemoryRegion address_space_mem
;
73 MemoryRegion address_space_io
;
75 PCIBridgeWindows
*windows
;
77 pci_map_irq_fn map_irq
;
81 #endif /* QEMU_PCI_BUS_H */