target/i386: reimplement AVX comparison helpers
[qemu/ar7.git] / target / i386 / ops_sse.h
blob7463ff1599731873839321f17196321fab1e47ca
1 /*
2 * MMX/3DNow!/SSE/SSE2/SSE3/SSSE3/SSE4/PNI support
4 * Copyright (c) 2005 Fabrice Bellard
5 * Copyright (c) 2008 Intel Corporation <andrew.zaborowski@intel.com>
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "crypto/aes.h"
23 #if SHIFT == 0
24 #define Reg MMXReg
25 #define SIZE 8
26 #define XMM_ONLY(...)
27 #define B(n) MMX_B(n)
28 #define W(n) MMX_W(n)
29 #define L(n) MMX_L(n)
30 #define Q(n) MMX_Q(n)
31 #define SUFFIX _mmx
32 #else
33 #define Reg ZMMReg
34 #define SIZE 16
35 #define XMM_ONLY(...) __VA_ARGS__
36 #define B(n) ZMM_B(n)
37 #define W(n) ZMM_W(n)
38 #define L(n) ZMM_L(n)
39 #define Q(n) ZMM_Q(n)
40 #define SUFFIX _xmm
41 #endif
43 #define LANE_WIDTH (SHIFT ? 16 : 8)
44 #define PACK_WIDTH (LANE_WIDTH / 2)
47 * Copy the relevant parts of a Reg value around. In the case where
48 * sizeof(Reg) > SIZE, these helpers operate only on the lower bytes of
49 * a 64 byte ZMMReg, so we must copy only those and keep the top bytes
50 * untouched in the guest-visible destination destination register.
51 * Note that the "lower bytes" are placed last in memory on big-endian
52 * hosts, which store the vector backwards in memory. In that case the
53 * copy *starts* at B(SIZE - 1) and ends at B(0), the opposite of
54 * the little-endian case.
56 #if HOST_BIG_ENDIAN
57 #define MOVE(d, r) memcpy(&((d).B(SIZE - 1)), &(r).B(SIZE - 1), SIZE)
58 #else
59 #define MOVE(d, r) memcpy(&(d).B(0), &(r).B(0), SIZE)
60 #endif
62 #if SHIFT == 0
63 #define FPSRL(x, c) ((x) >> shift)
64 #define FPSRAW(x, c) ((int16_t)(x) >> shift)
65 #define FPSRAL(x, c) ((int32_t)(x) >> shift)
66 #define FPSLL(x, c) ((x) << shift)
67 #endif
69 void glue(helper_psrlw, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
71 Reg *s = d;
72 int shift;
73 if (c->Q(0) > 15) {
74 for (int i = 0; i < 1 << SHIFT; i++) {
75 d->Q(i) = 0;
77 } else {
78 shift = c->B(0);
79 for (int i = 0; i < 4 << SHIFT; i++) {
80 d->W(i) = FPSRL(s->W(i), shift);
85 void glue(helper_psllw, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
87 Reg *s = d;
88 int shift;
89 if (c->Q(0) > 15) {
90 for (int i = 0; i < 1 << SHIFT; i++) {
91 d->Q(i) = 0;
93 } else {
94 shift = c->B(0);
95 for (int i = 0; i < 4 << SHIFT; i++) {
96 d->W(i) = FPSLL(s->W(i), shift);
101 void glue(helper_psraw, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
103 Reg *s = d;
104 int shift;
105 if (c->Q(0) > 15) {
106 shift = 15;
107 } else {
108 shift = c->B(0);
110 for (int i = 0; i < 4 << SHIFT; i++) {
111 d->W(i) = FPSRAW(s->W(i), shift);
115 void glue(helper_psrld, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
117 Reg *s = d;
118 int shift;
119 if (c->Q(0) > 31) {
120 for (int i = 0; i < 1 << SHIFT; i++) {
121 d->Q(i) = 0;
123 } else {
124 shift = c->B(0);
125 for (int i = 0; i < 2 << SHIFT; i++) {
126 d->L(i) = FPSRL(s->L(i), shift);
131 void glue(helper_pslld, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
133 Reg *s = d;
134 int shift;
135 if (c->Q(0) > 31) {
136 for (int i = 0; i < 1 << SHIFT; i++) {
137 d->Q(i) = 0;
139 } else {
140 shift = c->B(0);
141 for (int i = 0; i < 2 << SHIFT; i++) {
142 d->L(i) = FPSLL(s->L(i), shift);
147 void glue(helper_psrad, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
149 Reg *s = d;
150 int shift;
151 if (c->Q(0) > 31) {
152 shift = 31;
153 } else {
154 shift = c->B(0);
156 for (int i = 0; i < 2 << SHIFT; i++) {
157 d->L(i) = FPSRAL(s->L(i), shift);
161 void glue(helper_psrlq, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
163 Reg *s = d;
164 int shift;
165 if (c->Q(0) > 63) {
166 for (int i = 0; i < 1 << SHIFT; i++) {
167 d->Q(i) = 0;
169 } else {
170 shift = c->B(0);
171 for (int i = 0; i < 1 << SHIFT; i++) {
172 d->Q(i) = FPSRL(s->Q(i), shift);
177 void glue(helper_psllq, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
179 Reg *s = d;
180 int shift;
181 if (c->Q(0) > 63) {
182 for (int i = 0; i < 1 << SHIFT; i++) {
183 d->Q(i) = 0;
185 } else {
186 shift = c->B(0);
187 for (int i = 0; i < 1 << SHIFT; i++) {
188 d->Q(i) = FPSLL(s->Q(i), shift);
193 #if SHIFT >= 1
194 void glue(helper_psrldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
196 Reg *s = d;
197 int shift, i, j;
199 shift = c->L(0);
200 if (shift > 16) {
201 shift = 16;
203 for (j = 0; j < 8 << SHIFT; j += LANE_WIDTH) {
204 for (i = 0; i < 16 - shift; i++) {
205 d->B(j + i) = s->B(j + i + shift);
207 for (i = 16 - shift; i < 16; i++) {
208 d->B(j + i) = 0;
213 void glue(helper_pslldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *c)
215 Reg *s = d;
216 int shift, i, j;
218 shift = c->L(0);
219 if (shift > 16) {
220 shift = 16;
222 for (j = 0; j < 8 << SHIFT; j += LANE_WIDTH) {
223 for (i = 15; i >= shift; i--) {
224 d->B(j + i) = s->B(j + i - shift);
226 for (i = 0; i < shift; i++) {
227 d->B(j + i) = 0;
231 #endif
233 #define SSE_HELPER_1(name, elem, num, F) \
234 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
236 int n = num; \
237 for (int i = 0; i < n; i++) { \
238 d->elem(i) = F(s->elem(i)); \
242 #define SSE_HELPER_2(name, elem, num, F) \
243 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
245 Reg *v = d; \
246 int n = num; \
247 for (int i = 0; i < n; i++) { \
248 d->elem(i) = F(v->elem(i), s->elem(i)); \
252 #define SSE_HELPER_B(name, F) \
253 SSE_HELPER_2(name, B, 8 << SHIFT, F)
255 #define SSE_HELPER_W(name, F) \
256 SSE_HELPER_2(name, W, 4 << SHIFT, F)
258 #define SSE_HELPER_L(name, F) \
259 SSE_HELPER_2(name, L, 2 << SHIFT, F)
261 #define SSE_HELPER_Q(name, F) \
262 SSE_HELPER_2(name, Q, 1 << SHIFT, F)
264 #if SHIFT == 0
265 static inline int satub(int x)
267 if (x < 0) {
268 return 0;
269 } else if (x > 255) {
270 return 255;
271 } else {
272 return x;
276 static inline int satuw(int x)
278 if (x < 0) {
279 return 0;
280 } else if (x > 65535) {
281 return 65535;
282 } else {
283 return x;
287 static inline int satsb(int x)
289 if (x < -128) {
290 return -128;
291 } else if (x > 127) {
292 return 127;
293 } else {
294 return x;
298 static inline int satsw(int x)
300 if (x < -32768) {
301 return -32768;
302 } else if (x > 32767) {
303 return 32767;
304 } else {
305 return x;
309 #define FADD(a, b) ((a) + (b))
310 #define FADDUB(a, b) satub((a) + (b))
311 #define FADDUW(a, b) satuw((a) + (b))
312 #define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
313 #define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
315 #define FSUB(a, b) ((a) - (b))
316 #define FSUBUB(a, b) satub((a) - (b))
317 #define FSUBUW(a, b) satuw((a) - (b))
318 #define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
319 #define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b))
320 #define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
321 #define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
322 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
323 #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
325 #define FAND(a, b) ((a) & (b))
326 #define FANDN(a, b) ((~(a)) & (b))
327 #define FOR(a, b) ((a) | (b))
328 #define FXOR(a, b) ((a) ^ (b))
330 #define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0)
331 #define FCMPGTW(a, b) ((int16_t)(a) > (int16_t)(b) ? -1 : 0)
332 #define FCMPGTL(a, b) ((int32_t)(a) > (int32_t)(b) ? -1 : 0)
333 #define FCMPEQ(a, b) ((a) == (b) ? -1 : 0)
335 #define FMULLW(a, b) ((a) * (b))
336 #define FMULHRW(a, b) (((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16)
337 #define FMULHUW(a, b) ((a) * (b) >> 16)
338 #define FMULHW(a, b) ((int16_t)(a) * (int16_t)(b) >> 16)
340 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
341 #endif
343 SSE_HELPER_B(helper_paddb, FADD)
344 SSE_HELPER_W(helper_paddw, FADD)
345 SSE_HELPER_L(helper_paddl, FADD)
346 SSE_HELPER_Q(helper_paddq, FADD)
348 SSE_HELPER_B(helper_psubb, FSUB)
349 SSE_HELPER_W(helper_psubw, FSUB)
350 SSE_HELPER_L(helper_psubl, FSUB)
351 SSE_HELPER_Q(helper_psubq, FSUB)
353 SSE_HELPER_B(helper_paddusb, FADDUB)
354 SSE_HELPER_B(helper_paddsb, FADDSB)
355 SSE_HELPER_B(helper_psubusb, FSUBUB)
356 SSE_HELPER_B(helper_psubsb, FSUBSB)
358 SSE_HELPER_W(helper_paddusw, FADDUW)
359 SSE_HELPER_W(helper_paddsw, FADDSW)
360 SSE_HELPER_W(helper_psubusw, FSUBUW)
361 SSE_HELPER_W(helper_psubsw, FSUBSW)
363 SSE_HELPER_B(helper_pminub, FMINUB)
364 SSE_HELPER_B(helper_pmaxub, FMAXUB)
366 SSE_HELPER_W(helper_pminsw, FMINSW)
367 SSE_HELPER_W(helper_pmaxsw, FMAXSW)
369 SSE_HELPER_Q(helper_pand, FAND)
370 SSE_HELPER_Q(helper_pandn, FANDN)
371 SSE_HELPER_Q(helper_por, FOR)
372 SSE_HELPER_Q(helper_pxor, FXOR)
374 SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
375 SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
376 SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
378 SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
379 SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
380 SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
382 SSE_HELPER_W(helper_pmullw, FMULLW)
383 #if SHIFT == 0
384 SSE_HELPER_W(helper_pmulhrw, FMULHRW)
385 #endif
386 SSE_HELPER_W(helper_pmulhuw, FMULHUW)
387 SSE_HELPER_W(helper_pmulhw, FMULHW)
389 SSE_HELPER_B(helper_pavgb, FAVG)
390 SSE_HELPER_W(helper_pavgw, FAVG)
392 void glue(helper_pmuludq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
394 Reg *v = d;
395 int i;
397 for (i = 0; i < (1 << SHIFT); i++) {
398 d->Q(i) = (uint64_t)s->L(i * 2) * (uint64_t)v->L(i * 2);
402 void glue(helper_pmaddwd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
404 Reg *v = d;
405 int i;
407 for (i = 0; i < (2 << SHIFT); i++) {
408 d->L(i) = (int16_t)s->W(2 * i) * (int16_t)v->W(2 * i) +
409 (int16_t)s->W(2 * i + 1) * (int16_t)v->W(2 * i + 1);
413 #if SHIFT == 0
414 static inline int abs1(int a)
416 if (a < 0) {
417 return -a;
418 } else {
419 return a;
422 #endif
424 void glue(helper_psadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
426 Reg *v = d;
427 int i;
429 for (i = 0; i < (1 << SHIFT); i++) {
430 unsigned int val = 0;
431 val += abs1(v->B(8 * i + 0) - s->B(8 * i + 0));
432 val += abs1(v->B(8 * i + 1) - s->B(8 * i + 1));
433 val += abs1(v->B(8 * i + 2) - s->B(8 * i + 2));
434 val += abs1(v->B(8 * i + 3) - s->B(8 * i + 3));
435 val += abs1(v->B(8 * i + 4) - s->B(8 * i + 4));
436 val += abs1(v->B(8 * i + 5) - s->B(8 * i + 5));
437 val += abs1(v->B(8 * i + 6) - s->B(8 * i + 6));
438 val += abs1(v->B(8 * i + 7) - s->B(8 * i + 7));
439 d->Q(i) = val;
443 void glue(helper_maskmov, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
444 target_ulong a0)
446 int i;
448 for (i = 0; i < (8 << SHIFT); i++) {
449 if (s->B(i) & 0x80) {
450 cpu_stb_data_ra(env, a0 + i, d->B(i), GETPC());
455 void glue(helper_movl_mm_T0, SUFFIX)(Reg *d, uint32_t val)
457 int i;
459 d->L(0) = val;
460 d->L(1) = 0;
461 for (i = 1; i < (1 << SHIFT); i++) {
462 d->Q(i) = 0;
466 #ifdef TARGET_X86_64
467 void glue(helper_movq_mm_T0, SUFFIX)(Reg *d, uint64_t val)
469 int i;
471 d->Q(0) = val;
472 for (i = 1; i < (1 << SHIFT); i++) {
473 d->Q(i) = 0;
476 #endif
478 #define SHUFFLE4(F, a, b, offset) do { \
479 r0 = a->F((order & 3) + offset); \
480 r1 = a->F(((order >> 2) & 3) + offset); \
481 r2 = b->F(((order >> 4) & 3) + offset); \
482 r3 = b->F(((order >> 6) & 3) + offset); \
483 d->F(offset) = r0; \
484 d->F(offset + 1) = r1; \
485 d->F(offset + 2) = r2; \
486 d->F(offset + 3) = r3; \
487 } while (0)
489 #if SHIFT == 0
490 void glue(helper_pshufw, SUFFIX)(Reg *d, Reg *s, int order)
492 uint16_t r0, r1, r2, r3;
494 SHUFFLE4(W, s, s, 0);
496 #else
497 void glue(helper_shufps, SUFFIX)(Reg *d, Reg *s, int order)
499 Reg *v = d;
500 uint32_t r0, r1, r2, r3;
501 int i;
503 for (i = 0; i < 2 << SHIFT; i += 4) {
504 SHUFFLE4(L, v, s, i);
508 void glue(helper_shufpd, SUFFIX)(Reg *d, Reg *s, int order)
510 Reg *v = d;
511 uint64_t r0, r1;
512 int i;
514 for (i = 0; i < 1 << SHIFT; i += 2) {
515 r0 = v->Q(((order & 1) & 1) + i);
516 r1 = s->Q(((order >> 1) & 1) + i);
517 d->Q(i) = r0;
518 d->Q(i + 1) = r1;
519 order >>= 2;
523 void glue(helper_pshufd, SUFFIX)(Reg *d, Reg *s, int order)
525 uint32_t r0, r1, r2, r3;
526 int i;
528 for (i = 0; i < 2 << SHIFT; i += 4) {
529 SHUFFLE4(L, s, s, i);
533 void glue(helper_pshuflw, SUFFIX)(Reg *d, Reg *s, int order)
535 uint16_t r0, r1, r2, r3;
536 int i, j;
538 for (i = 0, j = 1; j < 1 << SHIFT; i += 8, j += 2) {
539 SHUFFLE4(W, s, s, i);
540 d->Q(j) = s->Q(j);
544 void glue(helper_pshufhw, SUFFIX)(Reg *d, Reg *s, int order)
546 uint16_t r0, r1, r2, r3;
547 int i, j;
549 for (i = 4, j = 0; j < 1 << SHIFT; i += 8, j += 2) {
550 d->Q(j) = s->Q(j);
551 SHUFFLE4(W, s, s, i);
554 #endif
556 #if SHIFT >= 1
557 /* FPU ops */
558 /* XXX: not accurate */
560 #define SSE_HELPER_P(name, F) \
561 void glue(helper_ ## name ## ps, SUFFIX)(CPUX86State *env, \
562 Reg *d, Reg *s) \
564 Reg *v = d; \
565 int i; \
566 for (i = 0; i < 2 << SHIFT; i++) { \
567 d->ZMM_S(i) = F(32, v->ZMM_S(i), s->ZMM_S(i)); \
571 void glue(helper_ ## name ## pd, SUFFIX)(CPUX86State *env, \
572 Reg *d, Reg *s) \
574 Reg *v = d; \
575 int i; \
576 for (i = 0; i < 1 << SHIFT; i++) { \
577 d->ZMM_D(i) = F(64, v->ZMM_D(i), s->ZMM_D(i)); \
581 #if SHIFT == 1
583 #define SSE_HELPER_S(name, F) \
584 SSE_HELPER_P(name, F) \
586 void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *s)\
588 Reg *v = d; \
589 d->ZMM_S(0) = F(32, v->ZMM_S(0), s->ZMM_S(0)); \
592 void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *s)\
594 Reg *v = d; \
595 d->ZMM_D(0) = F(64, v->ZMM_D(0), s->ZMM_D(0)); \
598 #else
600 #define SSE_HELPER_S(name, F) SSE_HELPER_P(name, F)
602 #endif
604 #define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status)
605 #define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status)
606 #define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status)
607 #define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status)
609 /* Note that the choice of comparison op here is important to get the
610 * special cases right: for min and max Intel specifies that (-0,0),
611 * (NaN, anything) and (anything, NaN) return the second argument.
613 #define FPU_MIN(size, a, b) \
614 (float ## size ## _lt(a, b, &env->sse_status) ? (a) : (b))
615 #define FPU_MAX(size, a, b) \
616 (float ## size ## _lt(b, a, &env->sse_status) ? (a) : (b))
618 SSE_HELPER_S(add, FPU_ADD)
619 SSE_HELPER_S(sub, FPU_SUB)
620 SSE_HELPER_S(mul, FPU_MUL)
621 SSE_HELPER_S(div, FPU_DIV)
622 SSE_HELPER_S(min, FPU_MIN)
623 SSE_HELPER_S(max, FPU_MAX)
625 void glue(helper_sqrtps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
627 int i;
628 for (i = 0; i < 2 << SHIFT; i++) {
629 d->ZMM_S(i) = float32_sqrt(s->ZMM_S(i), &env->sse_status);
633 void glue(helper_sqrtpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
635 int i;
636 for (i = 0; i < 1 << SHIFT; i++) {
637 d->ZMM_D(i) = float64_sqrt(s->ZMM_D(i), &env->sse_status);
641 #if SHIFT == 1
642 void helper_sqrtss(CPUX86State *env, Reg *d, Reg *s)
644 d->ZMM_S(0) = float32_sqrt(s->ZMM_S(0), &env->sse_status);
647 void helper_sqrtsd(CPUX86State *env, Reg *d, Reg *s)
649 d->ZMM_D(0) = float64_sqrt(s->ZMM_D(0), &env->sse_status);
651 #endif
653 /* float to float conversions */
654 void glue(helper_cvtps2pd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
656 float32 s0, s1;
658 s0 = s->ZMM_S(0);
659 s1 = s->ZMM_S(1);
660 d->ZMM_D(0) = float32_to_float64(s0, &env->sse_status);
661 d->ZMM_D(1) = float32_to_float64(s1, &env->sse_status);
664 void glue(helper_cvtpd2ps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
666 d->ZMM_S(0) = float64_to_float32(s->ZMM_D(0), &env->sse_status);
667 d->ZMM_S(1) = float64_to_float32(s->ZMM_D(1), &env->sse_status);
668 d->Q(1) = 0;
671 void helper_cvtss2sd(CPUX86State *env, Reg *d, Reg *s)
673 d->ZMM_D(0) = float32_to_float64(s->ZMM_S(0), &env->sse_status);
676 void helper_cvtsd2ss(CPUX86State *env, Reg *d, Reg *s)
678 d->ZMM_S(0) = float64_to_float32(s->ZMM_D(0), &env->sse_status);
681 /* integer to float */
682 void glue(helper_cvtdq2ps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
684 d->ZMM_S(0) = int32_to_float32(s->ZMM_L(0), &env->sse_status);
685 d->ZMM_S(1) = int32_to_float32(s->ZMM_L(1), &env->sse_status);
686 d->ZMM_S(2) = int32_to_float32(s->ZMM_L(2), &env->sse_status);
687 d->ZMM_S(3) = int32_to_float32(s->ZMM_L(3), &env->sse_status);
690 void glue(helper_cvtdq2pd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
692 int32_t l0, l1;
694 l0 = (int32_t)s->ZMM_L(0);
695 l1 = (int32_t)s->ZMM_L(1);
696 d->ZMM_D(0) = int32_to_float64(l0, &env->sse_status);
697 d->ZMM_D(1) = int32_to_float64(l1, &env->sse_status);
700 void helper_cvtpi2ps(CPUX86State *env, ZMMReg *d, MMXReg *s)
702 d->ZMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status);
703 d->ZMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status);
706 void helper_cvtpi2pd(CPUX86State *env, ZMMReg *d, MMXReg *s)
708 d->ZMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status);
709 d->ZMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status);
712 void helper_cvtsi2ss(CPUX86State *env, ZMMReg *d, uint32_t val)
714 d->ZMM_S(0) = int32_to_float32(val, &env->sse_status);
717 void helper_cvtsi2sd(CPUX86State *env, ZMMReg *d, uint32_t val)
719 d->ZMM_D(0) = int32_to_float64(val, &env->sse_status);
722 #ifdef TARGET_X86_64
723 void helper_cvtsq2ss(CPUX86State *env, ZMMReg *d, uint64_t val)
725 d->ZMM_S(0) = int64_to_float32(val, &env->sse_status);
728 void helper_cvtsq2sd(CPUX86State *env, ZMMReg *d, uint64_t val)
730 d->ZMM_D(0) = int64_to_float64(val, &env->sse_status);
732 #endif
734 /* float to integer */
737 * x86 mandates that we return the indefinite integer value for the result
738 * of any float-to-integer conversion that raises the 'invalid' exception.
739 * Wrap the softfloat functions to get this behaviour.
741 #define WRAP_FLOATCONV(RETTYPE, FN, FLOATTYPE, INDEFVALUE) \
742 static inline RETTYPE x86_##FN(FLOATTYPE a, float_status *s) \
744 int oldflags, newflags; \
745 RETTYPE r; \
747 oldflags = get_float_exception_flags(s); \
748 set_float_exception_flags(0, s); \
749 r = FN(a, s); \
750 newflags = get_float_exception_flags(s); \
751 if (newflags & float_flag_invalid) { \
752 r = INDEFVALUE; \
754 set_float_exception_flags(newflags | oldflags, s); \
755 return r; \
758 WRAP_FLOATCONV(int32_t, float32_to_int32, float32, INT32_MIN)
759 WRAP_FLOATCONV(int32_t, float32_to_int32_round_to_zero, float32, INT32_MIN)
760 WRAP_FLOATCONV(int32_t, float64_to_int32, float64, INT32_MIN)
761 WRAP_FLOATCONV(int32_t, float64_to_int32_round_to_zero, float64, INT32_MIN)
762 WRAP_FLOATCONV(int64_t, float32_to_int64, float32, INT64_MIN)
763 WRAP_FLOATCONV(int64_t, float32_to_int64_round_to_zero, float32, INT64_MIN)
764 WRAP_FLOATCONV(int64_t, float64_to_int64, float64, INT64_MIN)
765 WRAP_FLOATCONV(int64_t, float64_to_int64_round_to_zero, float64, INT64_MIN)
767 void glue(helper_cvtps2dq, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
769 d->ZMM_L(0) = x86_float32_to_int32(s->ZMM_S(0), &env->sse_status);
770 d->ZMM_L(1) = x86_float32_to_int32(s->ZMM_S(1), &env->sse_status);
771 d->ZMM_L(2) = x86_float32_to_int32(s->ZMM_S(2), &env->sse_status);
772 d->ZMM_L(3) = x86_float32_to_int32(s->ZMM_S(3), &env->sse_status);
775 void glue(helper_cvtpd2dq, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
777 d->ZMM_L(0) = x86_float64_to_int32(s->ZMM_D(0), &env->sse_status);
778 d->ZMM_L(1) = x86_float64_to_int32(s->ZMM_D(1), &env->sse_status);
779 d->ZMM_Q(1) = 0;
782 void helper_cvtps2pi(CPUX86State *env, MMXReg *d, ZMMReg *s)
784 d->MMX_L(0) = x86_float32_to_int32(s->ZMM_S(0), &env->sse_status);
785 d->MMX_L(1) = x86_float32_to_int32(s->ZMM_S(1), &env->sse_status);
788 void helper_cvtpd2pi(CPUX86State *env, MMXReg *d, ZMMReg *s)
790 d->MMX_L(0) = x86_float64_to_int32(s->ZMM_D(0), &env->sse_status);
791 d->MMX_L(1) = x86_float64_to_int32(s->ZMM_D(1), &env->sse_status);
794 int32_t helper_cvtss2si(CPUX86State *env, ZMMReg *s)
796 return x86_float32_to_int32(s->ZMM_S(0), &env->sse_status);
799 int32_t helper_cvtsd2si(CPUX86State *env, ZMMReg *s)
801 return x86_float64_to_int32(s->ZMM_D(0), &env->sse_status);
804 #ifdef TARGET_X86_64
805 int64_t helper_cvtss2sq(CPUX86State *env, ZMMReg *s)
807 return x86_float32_to_int64(s->ZMM_S(0), &env->sse_status);
810 int64_t helper_cvtsd2sq(CPUX86State *env, ZMMReg *s)
812 return x86_float64_to_int64(s->ZMM_D(0), &env->sse_status);
814 #endif
816 /* float to integer truncated */
817 void glue(helper_cvttps2dq, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
819 d->ZMM_L(0) = x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status);
820 d->ZMM_L(1) = x86_float32_to_int32_round_to_zero(s->ZMM_S(1), &env->sse_status);
821 d->ZMM_L(2) = x86_float32_to_int32_round_to_zero(s->ZMM_S(2), &env->sse_status);
822 d->ZMM_L(3) = x86_float32_to_int32_round_to_zero(s->ZMM_S(3), &env->sse_status);
825 void glue(helper_cvttpd2dq, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
827 d->ZMM_L(0) = x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status);
828 d->ZMM_L(1) = x86_float64_to_int32_round_to_zero(s->ZMM_D(1), &env->sse_status);
829 d->ZMM_Q(1) = 0;
832 void helper_cvttps2pi(CPUX86State *env, MMXReg *d, ZMMReg *s)
834 d->MMX_L(0) = x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status);
835 d->MMX_L(1) = x86_float32_to_int32_round_to_zero(s->ZMM_S(1), &env->sse_status);
838 void helper_cvttpd2pi(CPUX86State *env, MMXReg *d, ZMMReg *s)
840 d->MMX_L(0) = x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status);
841 d->MMX_L(1) = x86_float64_to_int32_round_to_zero(s->ZMM_D(1), &env->sse_status);
844 int32_t helper_cvttss2si(CPUX86State *env, ZMMReg *s)
846 return x86_float32_to_int32_round_to_zero(s->ZMM_S(0), &env->sse_status);
849 int32_t helper_cvttsd2si(CPUX86State *env, ZMMReg *s)
851 return x86_float64_to_int32_round_to_zero(s->ZMM_D(0), &env->sse_status);
854 #ifdef TARGET_X86_64
855 int64_t helper_cvttss2sq(CPUX86State *env, ZMMReg *s)
857 return x86_float32_to_int64_round_to_zero(s->ZMM_S(0), &env->sse_status);
860 int64_t helper_cvttsd2sq(CPUX86State *env, ZMMReg *s)
862 return x86_float64_to_int64_round_to_zero(s->ZMM_D(0), &env->sse_status);
864 #endif
866 void glue(helper_rsqrtps, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
868 uint8_t old_flags = get_float_exception_flags(&env->sse_status);
869 int i;
870 for (i = 0; i < 2 << SHIFT; i++) {
871 d->ZMM_S(i) = float32_div(float32_one,
872 float32_sqrt(s->ZMM_S(i), &env->sse_status),
873 &env->sse_status);
875 set_float_exception_flags(old_flags, &env->sse_status);
878 void helper_rsqrtss(CPUX86State *env, ZMMReg *d, ZMMReg *s)
880 uint8_t old_flags = get_float_exception_flags(&env->sse_status);
881 d->ZMM_S(0) = float32_div(float32_one,
882 float32_sqrt(s->ZMM_S(0), &env->sse_status),
883 &env->sse_status);
884 set_float_exception_flags(old_flags, &env->sse_status);
887 void glue(helper_rcpps, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
889 uint8_t old_flags = get_float_exception_flags(&env->sse_status);
890 int i;
891 for (i = 0; i < 2 << SHIFT; i++) {
892 d->ZMM_S(i) = float32_div(float32_one, s->ZMM_S(i), &env->sse_status);
894 set_float_exception_flags(old_flags, &env->sse_status);
897 void helper_rcpss(CPUX86State *env, ZMMReg *d, ZMMReg *s)
899 uint8_t old_flags = get_float_exception_flags(&env->sse_status);
900 d->ZMM_S(0) = float32_div(float32_one, s->ZMM_S(0), &env->sse_status);
901 set_float_exception_flags(old_flags, &env->sse_status);
904 static inline uint64_t helper_extrq(uint64_t src, int shift, int len)
906 uint64_t mask;
908 if (len == 0) {
909 mask = ~0LL;
910 } else {
911 mask = (1ULL << len) - 1;
913 return (src >> shift) & mask;
916 void helper_extrq_r(CPUX86State *env, ZMMReg *d, ZMMReg *s)
918 d->ZMM_Q(0) = helper_extrq(d->ZMM_Q(0), s->ZMM_B(1), s->ZMM_B(0));
921 void helper_extrq_i(CPUX86State *env, ZMMReg *d, int index, int length)
923 d->ZMM_Q(0) = helper_extrq(d->ZMM_Q(0), index, length);
926 static inline uint64_t helper_insertq(uint64_t src, int shift, int len)
928 uint64_t mask;
930 if (len == 0) {
931 mask = ~0ULL;
932 } else {
933 mask = (1ULL << len) - 1;
935 return (src & ~(mask << shift)) | ((src & mask) << shift);
938 void helper_insertq_r(CPUX86State *env, ZMMReg *d, ZMMReg *s)
940 d->ZMM_Q(0) = helper_insertq(s->ZMM_Q(0), s->ZMM_B(9), s->ZMM_B(8));
943 void helper_insertq_i(CPUX86State *env, ZMMReg *d, int index, int length)
945 d->ZMM_Q(0) = helper_insertq(d->ZMM_Q(0), index, length);
948 void glue(helper_haddps, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
950 ZMMReg r;
952 r.ZMM_S(0) = float32_add(d->ZMM_S(0), d->ZMM_S(1), &env->sse_status);
953 r.ZMM_S(1) = float32_add(d->ZMM_S(2), d->ZMM_S(3), &env->sse_status);
954 r.ZMM_S(2) = float32_add(s->ZMM_S(0), s->ZMM_S(1), &env->sse_status);
955 r.ZMM_S(3) = float32_add(s->ZMM_S(2), s->ZMM_S(3), &env->sse_status);
956 MOVE(*d, r);
959 void glue(helper_haddpd, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
961 ZMMReg r;
963 r.ZMM_D(0) = float64_add(d->ZMM_D(0), d->ZMM_D(1), &env->sse_status);
964 r.ZMM_D(1) = float64_add(s->ZMM_D(0), s->ZMM_D(1), &env->sse_status);
965 MOVE(*d, r);
968 void glue(helper_hsubps, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
970 ZMMReg r;
972 r.ZMM_S(0) = float32_sub(d->ZMM_S(0), d->ZMM_S(1), &env->sse_status);
973 r.ZMM_S(1) = float32_sub(d->ZMM_S(2), d->ZMM_S(3), &env->sse_status);
974 r.ZMM_S(2) = float32_sub(s->ZMM_S(0), s->ZMM_S(1), &env->sse_status);
975 r.ZMM_S(3) = float32_sub(s->ZMM_S(2), s->ZMM_S(3), &env->sse_status);
976 MOVE(*d, r);
979 void glue(helper_hsubpd, SUFFIX)(CPUX86State *env, ZMMReg *d, ZMMReg *s)
981 ZMMReg r;
983 r.ZMM_D(0) = float64_sub(d->ZMM_D(0), d->ZMM_D(1), &env->sse_status);
984 r.ZMM_D(1) = float64_sub(s->ZMM_D(0), s->ZMM_D(1), &env->sse_status);
985 MOVE(*d, r);
988 void glue(helper_addsubps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
990 Reg *v = d;
991 int i;
992 for (i = 0; i < 2 << SHIFT; i += 2) {
993 d->ZMM_S(i) = float32_sub(v->ZMM_S(i), s->ZMM_S(i), &env->sse_status);
994 d->ZMM_S(i+1) = float32_add(v->ZMM_S(i+1), s->ZMM_S(i+1), &env->sse_status);
998 void glue(helper_addsubpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1000 Reg *v = d;
1001 int i;
1002 for (i = 0; i < 1 << SHIFT; i += 2) {
1003 d->ZMM_D(i) = float64_sub(v->ZMM_D(i), s->ZMM_D(i), &env->sse_status);
1004 d->ZMM_D(i+1) = float64_add(v->ZMM_D(i+1), s->ZMM_D(i+1), &env->sse_status);
1008 #define SSE_HELPER_CMP_P(name, F, C) \
1009 void glue(helper_ ## name ## ps, SUFFIX)(CPUX86State *env, \
1010 Reg *d, Reg *s) \
1012 Reg *v = d; \
1013 int i; \
1014 for (i = 0; i < 2 << SHIFT; i++) { \
1015 d->ZMM_L(i) = C(F(32, v->ZMM_S(i), s->ZMM_S(i))) ? -1 : 0; \
1019 void glue(helper_ ## name ## pd, SUFFIX)(CPUX86State *env, \
1020 Reg *d, Reg *s) \
1022 Reg *v = d; \
1023 int i; \
1024 for (i = 0; i < 1 << SHIFT; i++) { \
1025 d->ZMM_Q(i) = C(F(64, v->ZMM_D(i), s->ZMM_D(i))) ? -1 : 0; \
1029 #if SHIFT == 1
1030 #define SSE_HELPER_CMP(name, F, C) \
1031 SSE_HELPER_CMP_P(name, F, C) \
1032 void helper_ ## name ## ss(CPUX86State *env, Reg *d, Reg *s) \
1034 Reg *v = d; \
1035 d->ZMM_L(0) = C(F(32, v->ZMM_S(0), s->ZMM_S(0))) ? -1 : 0; \
1038 void helper_ ## name ## sd(CPUX86State *env, Reg *d, Reg *s) \
1040 Reg *v = d; \
1041 d->ZMM_Q(0) = C(F(64, v->ZMM_D(0), s->ZMM_D(0))) ? -1 : 0; \
1044 #define FPU_EQ(x) (x == float_relation_equal)
1045 #define FPU_LT(x) (x == float_relation_less)
1046 #define FPU_LE(x) (x <= float_relation_equal)
1047 #define FPU_UNORD(x) (x == float_relation_unordered)
1049 #define FPU_CMPQ(size, a, b) \
1050 float ## size ## _compare_quiet(a, b, &env->sse_status)
1051 #define FPU_CMPS(size, a, b) \
1052 float ## size ## _compare(a, b, &env->sse_status)
1054 #else
1055 #define SSE_HELPER_CMP(name, F, C) SSE_HELPER_CMP_P(name, F, C)
1056 #endif
1058 SSE_HELPER_CMP(cmpeq, FPU_CMPQ, FPU_EQ)
1059 SSE_HELPER_CMP(cmplt, FPU_CMPS, FPU_LT)
1060 SSE_HELPER_CMP(cmple, FPU_CMPS, FPU_LE)
1061 SSE_HELPER_CMP(cmpunord, FPU_CMPQ, FPU_UNORD)
1062 SSE_HELPER_CMP(cmpneq, FPU_CMPQ, !FPU_EQ)
1063 SSE_HELPER_CMP(cmpnlt, FPU_CMPS, !FPU_LT)
1064 SSE_HELPER_CMP(cmpnle, FPU_CMPS, !FPU_LE)
1065 SSE_HELPER_CMP(cmpord, FPU_CMPQ, !FPU_UNORD)
1067 #undef SSE_HELPER_CMP
1069 static const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C};
1071 void helper_ucomiss(CPUX86State *env, Reg *d, Reg *s)
1073 FloatRelation ret;
1074 float32 s0, s1;
1076 s0 = d->ZMM_S(0);
1077 s1 = s->ZMM_S(0);
1078 ret = float32_compare_quiet(s0, s1, &env->sse_status);
1079 CC_SRC = comis_eflags[ret + 1];
1082 void helper_comiss(CPUX86State *env, Reg *d, Reg *s)
1084 FloatRelation ret;
1085 float32 s0, s1;
1087 s0 = d->ZMM_S(0);
1088 s1 = s->ZMM_S(0);
1089 ret = float32_compare(s0, s1, &env->sse_status);
1090 CC_SRC = comis_eflags[ret + 1];
1093 void helper_ucomisd(CPUX86State *env, Reg *d, Reg *s)
1095 FloatRelation ret;
1096 float64 d0, d1;
1098 d0 = d->ZMM_D(0);
1099 d1 = s->ZMM_D(0);
1100 ret = float64_compare_quiet(d0, d1, &env->sse_status);
1101 CC_SRC = comis_eflags[ret + 1];
1104 void helper_comisd(CPUX86State *env, Reg *d, Reg *s)
1106 FloatRelation ret;
1107 float64 d0, d1;
1109 d0 = d->ZMM_D(0);
1110 d1 = s->ZMM_D(0);
1111 ret = float64_compare(d0, d1, &env->sse_status);
1112 CC_SRC = comis_eflags[ret + 1];
1115 uint32_t glue(helper_movmskps, SUFFIX)(CPUX86State *env, Reg *s)
1117 int b0, b1, b2, b3;
1119 b0 = s->ZMM_L(0) >> 31;
1120 b1 = s->ZMM_L(1) >> 31;
1121 b2 = s->ZMM_L(2) >> 31;
1122 b3 = s->ZMM_L(3) >> 31;
1123 return b0 | (b1 << 1) | (b2 << 2) | (b3 << 3);
1126 uint32_t glue(helper_movmskpd, SUFFIX)(CPUX86State *env, Reg *s)
1128 int b0, b1;
1130 b0 = s->ZMM_L(1) >> 31;
1131 b1 = s->ZMM_L(3) >> 31;
1132 return b0 | (b1 << 1);
1135 #endif
1137 uint32_t glue(helper_pmovmskb, SUFFIX)(CPUX86State *env, Reg *s)
1139 uint32_t val;
1140 int i;
1142 val = 0;
1143 for (i = 0; i < (1 << SHIFT); i++) {
1144 uint8_t byte = 0;
1145 byte |= (s->B(8 * i + 0) >> 7);
1146 byte |= (s->B(8 * i + 1) >> 6) & 0x02;
1147 byte |= (s->B(8 * i + 2) >> 5) & 0x04;
1148 byte |= (s->B(8 * i + 3) >> 4) & 0x08;
1149 byte |= (s->B(8 * i + 4) >> 3) & 0x10;
1150 byte |= (s->B(8 * i + 5) >> 2) & 0x20;
1151 byte |= (s->B(8 * i + 6) >> 1) & 0x40;
1152 byte |= (s->B(8 * i + 7)) & 0x80;
1153 val |= byte << (8 * i);
1155 return val;
1158 #define PACK_HELPER_B(name, F) \
1159 void glue(helper_pack ## name, SUFFIX)(CPUX86State *env, \
1160 Reg *d, Reg *s) \
1162 Reg *v = d; \
1163 uint8_t r[PACK_WIDTH * 2]; \
1164 int j, k; \
1165 for (j = 0; j < 4 << SHIFT; j += PACK_WIDTH) { \
1166 for (k = 0; k < PACK_WIDTH; k++) { \
1167 r[k] = F((int16_t)v->W(j + k)); \
1169 for (k = 0; k < PACK_WIDTH; k++) { \
1170 r[PACK_WIDTH + k] = F((int16_t)s->W(j + k)); \
1172 for (k = 0; k < PACK_WIDTH * 2; k++) { \
1173 d->B(2 * j + k) = r[k]; \
1178 PACK_HELPER_B(sswb, satsb)
1179 PACK_HELPER_B(uswb, satub)
1181 void glue(helper_packssdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1183 Reg *v = d;
1184 uint16_t r[PACK_WIDTH];
1185 int j, k;
1187 for (j = 0; j < 2 << SHIFT; j += PACK_WIDTH / 2) {
1188 for (k = 0; k < PACK_WIDTH / 2; k++) {
1189 r[k] = satsw(v->L(j + k));
1191 for (k = 0; k < PACK_WIDTH / 2; k++) {
1192 r[PACK_WIDTH / 2 + k] = satsw(s->L(j + k));
1194 for (k = 0; k < PACK_WIDTH; k++) {
1195 d->W(2 * j + k) = r[k];
1200 #define UNPCK_OP(base_name, base) \
1202 void glue(helper_punpck ## base_name ## bw, SUFFIX)(CPUX86State *env,\
1203 Reg *d, Reg *s) \
1205 Reg *v = d; \
1206 uint8_t r[PACK_WIDTH * 2]; \
1207 int j, i; \
1209 for (j = 0; j < 8 << SHIFT; ) { \
1210 int k = j + base * PACK_WIDTH; \
1211 for (i = 0; i < PACK_WIDTH; i++) { \
1212 r[2 * i] = v->B(k + i); \
1213 r[2 * i + 1] = s->B(k + i); \
1215 for (i = 0; i < PACK_WIDTH * 2; i++, j++) { \
1216 d->B(j) = r[i]; \
1221 void glue(helper_punpck ## base_name ## wd, SUFFIX)(CPUX86State *env,\
1222 Reg *d, Reg *s) \
1224 Reg *v = d; \
1225 uint16_t r[PACK_WIDTH]; \
1226 int j, i; \
1228 for (j = 0; j < 4 << SHIFT; ) { \
1229 int k = j + base * PACK_WIDTH / 2; \
1230 for (i = 0; i < PACK_WIDTH / 2; i++) { \
1231 r[2 * i] = v->W(k + i); \
1232 r[2 * i + 1] = s->W(k + i); \
1234 for (i = 0; i < PACK_WIDTH; i++, j++) { \
1235 d->W(j) = r[i]; \
1240 void glue(helper_punpck ## base_name ## dq, SUFFIX)(CPUX86State *env,\
1241 Reg *d, Reg *s) \
1243 Reg *v = d; \
1244 uint32_t r[PACK_WIDTH / 2]; \
1245 int j, i; \
1247 for (j = 0; j < 2 << SHIFT; ) { \
1248 int k = j + base * PACK_WIDTH / 4; \
1249 for (i = 0; i < PACK_WIDTH / 4; i++) { \
1250 r[2 * i] = v->L(k + i); \
1251 r[2 * i + 1] = s->L(k + i); \
1253 for (i = 0; i < PACK_WIDTH / 2; i++, j++) { \
1254 d->L(j) = r[i]; \
1259 XMM_ONLY( \
1260 void glue(helper_punpck ## base_name ## qdq, SUFFIX)( \
1261 CPUX86State *env, Reg *d, Reg *s) \
1263 Reg *v = d; \
1264 uint64_t r[2]; \
1265 int i; \
1267 for (i = 0; i < 1 << SHIFT; i += 2) { \
1268 r[0] = v->Q(base + i); \
1269 r[1] = s->Q(base + i); \
1270 d->Q(i) = r[0]; \
1271 d->Q(i + 1) = r[1]; \
1276 UNPCK_OP(l, 0)
1277 UNPCK_OP(h, 1)
1279 #undef PACK_WIDTH
1280 #undef PACK_HELPER_B
1281 #undef UNPCK_OP
1284 /* 3DNow! float ops */
1285 #if SHIFT == 0
1286 void helper_pi2fd(CPUX86State *env, MMXReg *d, MMXReg *s)
1288 d->MMX_S(0) = int32_to_float32(s->MMX_L(0), &env->mmx_status);
1289 d->MMX_S(1) = int32_to_float32(s->MMX_L(1), &env->mmx_status);
1292 void helper_pi2fw(CPUX86State *env, MMXReg *d, MMXReg *s)
1294 d->MMX_S(0) = int32_to_float32((int16_t)s->MMX_W(0), &env->mmx_status);
1295 d->MMX_S(1) = int32_to_float32((int16_t)s->MMX_W(2), &env->mmx_status);
1298 void helper_pf2id(CPUX86State *env, MMXReg *d, MMXReg *s)
1300 d->MMX_L(0) = float32_to_int32_round_to_zero(s->MMX_S(0), &env->mmx_status);
1301 d->MMX_L(1) = float32_to_int32_round_to_zero(s->MMX_S(1), &env->mmx_status);
1304 void helper_pf2iw(CPUX86State *env, MMXReg *d, MMXReg *s)
1306 d->MMX_L(0) = satsw(float32_to_int32_round_to_zero(s->MMX_S(0),
1307 &env->mmx_status));
1308 d->MMX_L(1) = satsw(float32_to_int32_round_to_zero(s->MMX_S(1),
1309 &env->mmx_status));
1312 void helper_pfacc(CPUX86State *env, MMXReg *d, MMXReg *s)
1314 float32 r;
1316 r = float32_add(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1317 d->MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1318 d->MMX_S(0) = r;
1321 void helper_pfadd(CPUX86State *env, MMXReg *d, MMXReg *s)
1323 d->MMX_S(0) = float32_add(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1324 d->MMX_S(1) = float32_add(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1327 void helper_pfcmpeq(CPUX86State *env, MMXReg *d, MMXReg *s)
1329 d->MMX_L(0) = float32_eq_quiet(d->MMX_S(0), s->MMX_S(0),
1330 &env->mmx_status) ? -1 : 0;
1331 d->MMX_L(1) = float32_eq_quiet(d->MMX_S(1), s->MMX_S(1),
1332 &env->mmx_status) ? -1 : 0;
1335 void helper_pfcmpge(CPUX86State *env, MMXReg *d, MMXReg *s)
1337 d->MMX_L(0) = float32_le(s->MMX_S(0), d->MMX_S(0),
1338 &env->mmx_status) ? -1 : 0;
1339 d->MMX_L(1) = float32_le(s->MMX_S(1), d->MMX_S(1),
1340 &env->mmx_status) ? -1 : 0;
1343 void helper_pfcmpgt(CPUX86State *env, MMXReg *d, MMXReg *s)
1345 d->MMX_L(0) = float32_lt(s->MMX_S(0), d->MMX_S(0),
1346 &env->mmx_status) ? -1 : 0;
1347 d->MMX_L(1) = float32_lt(s->MMX_S(1), d->MMX_S(1),
1348 &env->mmx_status) ? -1 : 0;
1351 void helper_pfmax(CPUX86State *env, MMXReg *d, MMXReg *s)
1353 if (float32_lt(d->MMX_S(0), s->MMX_S(0), &env->mmx_status)) {
1354 d->MMX_S(0) = s->MMX_S(0);
1356 if (float32_lt(d->MMX_S(1), s->MMX_S(1), &env->mmx_status)) {
1357 d->MMX_S(1) = s->MMX_S(1);
1361 void helper_pfmin(CPUX86State *env, MMXReg *d, MMXReg *s)
1363 if (float32_lt(s->MMX_S(0), d->MMX_S(0), &env->mmx_status)) {
1364 d->MMX_S(0) = s->MMX_S(0);
1366 if (float32_lt(s->MMX_S(1), d->MMX_S(1), &env->mmx_status)) {
1367 d->MMX_S(1) = s->MMX_S(1);
1371 void helper_pfmul(CPUX86State *env, MMXReg *d, MMXReg *s)
1373 d->MMX_S(0) = float32_mul(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1374 d->MMX_S(1) = float32_mul(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1377 void helper_pfnacc(CPUX86State *env, MMXReg *d, MMXReg *s)
1379 float32 r;
1381 r = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1382 d->MMX_S(1) = float32_sub(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1383 d->MMX_S(0) = r;
1386 void helper_pfpnacc(CPUX86State *env, MMXReg *d, MMXReg *s)
1388 float32 r;
1390 r = float32_sub(d->MMX_S(0), d->MMX_S(1), &env->mmx_status);
1391 d->MMX_S(1) = float32_add(s->MMX_S(0), s->MMX_S(1), &env->mmx_status);
1392 d->MMX_S(0) = r;
1395 void helper_pfrcp(CPUX86State *env, MMXReg *d, MMXReg *s)
1397 d->MMX_S(0) = float32_div(float32_one, s->MMX_S(0), &env->mmx_status);
1398 d->MMX_S(1) = d->MMX_S(0);
1401 void helper_pfrsqrt(CPUX86State *env, MMXReg *d, MMXReg *s)
1403 d->MMX_L(1) = s->MMX_L(0) & 0x7fffffff;
1404 d->MMX_S(1) = float32_div(float32_one,
1405 float32_sqrt(d->MMX_S(1), &env->mmx_status),
1406 &env->mmx_status);
1407 d->MMX_L(1) |= s->MMX_L(0) & 0x80000000;
1408 d->MMX_L(0) = d->MMX_L(1);
1411 void helper_pfsub(CPUX86State *env, MMXReg *d, MMXReg *s)
1413 d->MMX_S(0) = float32_sub(d->MMX_S(0), s->MMX_S(0), &env->mmx_status);
1414 d->MMX_S(1) = float32_sub(d->MMX_S(1), s->MMX_S(1), &env->mmx_status);
1417 void helper_pfsubr(CPUX86State *env, MMXReg *d, MMXReg *s)
1419 d->MMX_S(0) = float32_sub(s->MMX_S(0), d->MMX_S(0), &env->mmx_status);
1420 d->MMX_S(1) = float32_sub(s->MMX_S(1), d->MMX_S(1), &env->mmx_status);
1423 void helper_pswapd(CPUX86State *env, MMXReg *d, MMXReg *s)
1425 uint32_t r;
1427 r = s->MMX_L(0);
1428 d->MMX_L(0) = s->MMX_L(1);
1429 d->MMX_L(1) = r;
1431 #endif
1433 /* SSSE3 op helpers */
1434 void glue(helper_pshufb, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1436 Reg *v = d;
1437 int i;
1438 #if SHIFT == 0
1439 uint8_t r[8];
1441 for (i = 0; i < 8; i++) {
1442 r[i] = (s->B(i) & 0x80) ? 0 : (v->B(s->B(i) & 7));
1444 for (i = 0; i < 8; i++) {
1445 d->B(i) = r[i];
1447 #else
1448 uint8_t r[8 << SHIFT];
1450 for (i = 0; i < 8 << SHIFT; i++) {
1451 int j = i & ~0xf;
1452 r[i] = (s->B(i) & 0x80) ? 0 : v->B(j | (s->B(i) & 0xf));
1454 for (i = 0; i < 8 << SHIFT; i++) {
1455 d->B(i) = r[i];
1457 #endif
1460 #define SSE_HELPER_HW(name, F) \
1461 void glue(helper_ ## name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
1463 Reg *v = d; \
1464 uint16_t r[4 << SHIFT]; \
1465 int i, j, k; \
1466 for (k = 0; k < 4 << SHIFT; k += LANE_WIDTH / 2) { \
1467 for (i = j = 0; j < LANE_WIDTH / 2; i++, j += 2) { \
1468 r[i + k] = F(v->W(j + k), v->W(j + k + 1)); \
1470 for (j = 0; j < LANE_WIDTH / 2; i++, j += 2) { \
1471 r[i + k] = F(s->W(j + k), s->W(j + k + 1)); \
1474 for (i = 0; i < 4 << SHIFT; i++) { \
1475 d->W(i) = r[i]; \
1479 #define SSE_HELPER_HL(name, F) \
1480 void glue(helper_ ## name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
1482 Reg *v = d; \
1483 uint32_t r[2 << SHIFT]; \
1484 int i, j, k; \
1485 for (k = 0; k < 2 << SHIFT; k += LANE_WIDTH / 4) { \
1486 for (i = j = 0; j < LANE_WIDTH / 4; i++, j += 2) { \
1487 r[i + k] = F(v->L(j + k), v->L(j + k + 1)); \
1489 for (j = 0; j < LANE_WIDTH / 4; i++, j += 2) { \
1490 r[i + k] = F(s->L(j + k), s->L(j + k + 1)); \
1493 for (i = 0; i < 2 << SHIFT; i++) { \
1494 d->L(i) = r[i]; \
1498 SSE_HELPER_HW(phaddw, FADD)
1499 SSE_HELPER_HW(phsubw, FSUB)
1500 SSE_HELPER_HW(phaddsw, FADDSW)
1501 SSE_HELPER_HW(phsubsw, FSUBSW)
1502 SSE_HELPER_HL(phaddd, FADD)
1503 SSE_HELPER_HL(phsubd, FSUB)
1505 #undef SSE_HELPER_HW
1506 #undef SSE_HELPER_HL
1508 void glue(helper_pmaddubsw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1510 Reg *v = d;
1511 int i;
1512 for (i = 0; i < 4 << SHIFT; i++) {
1513 d->W(i) = satsw((int8_t)s->B(i * 2) * (uint8_t)v->B(i * 2) +
1514 (int8_t)s->B(i * 2 + 1) * (uint8_t)v->B(i * 2 + 1));
1518 #define FABSB(x) (x > INT8_MAX ? -(int8_t)x : x)
1519 #define FABSW(x) (x > INT16_MAX ? -(int16_t)x : x)
1520 #define FABSL(x) (x > INT32_MAX ? -(int32_t)x : x)
1521 SSE_HELPER_1(helper_pabsb, B, 8 << SHIFT, FABSB)
1522 SSE_HELPER_1(helper_pabsw, W, 4 << SHIFT, FABSW)
1523 SSE_HELPER_1(helper_pabsd, L, 2 << SHIFT, FABSL)
1525 #define FMULHRSW(d, s) (((int16_t) d * (int16_t)s + 0x4000) >> 15)
1526 SSE_HELPER_W(helper_pmulhrsw, FMULHRSW)
1528 #define FSIGNB(d, s) (s <= INT8_MAX ? s ? d : 0 : -(int8_t)d)
1529 #define FSIGNW(d, s) (s <= INT16_MAX ? s ? d : 0 : -(int16_t)d)
1530 #define FSIGNL(d, s) (s <= INT32_MAX ? s ? d : 0 : -(int32_t)d)
1531 SSE_HELPER_B(helper_psignb, FSIGNB)
1532 SSE_HELPER_W(helper_psignw, FSIGNW)
1533 SSE_HELPER_L(helper_psignd, FSIGNL)
1535 void glue(helper_palignr, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1536 int32_t shift)
1538 Reg *v = d;
1539 int i;
1541 /* XXX could be checked during translation */
1542 if (shift >= (SHIFT ? 32 : 16)) {
1543 for (i = 0; i < (1 << SHIFT); i++) {
1544 d->Q(i) = 0;
1546 } else {
1547 shift <<= 3;
1548 #define SHR(v, i) (i < 64 && i > -64 ? i > 0 ? v >> (i) : (v << -(i)) : 0)
1549 #if SHIFT == 0
1550 d->Q(0) = SHR(s->Q(0), shift - 0) |
1551 SHR(v->Q(0), shift - 64);
1552 #else
1553 for (i = 0; i < (1 << SHIFT); i += 2) {
1554 uint64_t r0, r1;
1556 r0 = SHR(s->Q(i), shift - 0) |
1557 SHR(s->Q(i + 1), shift - 64) |
1558 SHR(v->Q(i), shift - 128) |
1559 SHR(v->Q(i + 1), shift - 192);
1560 r1 = SHR(s->Q(i), shift + 64) |
1561 SHR(s->Q(i + 1), shift - 0) |
1562 SHR(v->Q(i), shift - 64) |
1563 SHR(v->Q(i + 1), shift - 128);
1564 d->Q(i) = r0;
1565 d->Q(i + 1) = r1;
1567 #endif
1568 #undef SHR
1572 #define XMM0 (env->xmm_regs[0])
1574 #if SHIFT == 1
1575 #define SSE_HELPER_V(name, elem, num, F) \
1576 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
1578 d->elem(0) = F(d->elem(0), s->elem(0), XMM0.elem(0)); \
1579 d->elem(1) = F(d->elem(1), s->elem(1), XMM0.elem(1)); \
1580 if (num > 2) { \
1581 d->elem(2) = F(d->elem(2), s->elem(2), XMM0.elem(2)); \
1582 d->elem(3) = F(d->elem(3), s->elem(3), XMM0.elem(3)); \
1583 if (num > 4) { \
1584 d->elem(4) = F(d->elem(4), s->elem(4), XMM0.elem(4)); \
1585 d->elem(5) = F(d->elem(5), s->elem(5), XMM0.elem(5)); \
1586 d->elem(6) = F(d->elem(6), s->elem(6), XMM0.elem(6)); \
1587 d->elem(7) = F(d->elem(7), s->elem(7), XMM0.elem(7)); \
1588 if (num > 8) { \
1589 d->elem(8) = F(d->elem(8), s->elem(8), XMM0.elem(8)); \
1590 d->elem(9) = F(d->elem(9), s->elem(9), XMM0.elem(9)); \
1591 d->elem(10) = F(d->elem(10), s->elem(10), XMM0.elem(10)); \
1592 d->elem(11) = F(d->elem(11), s->elem(11), XMM0.elem(11)); \
1593 d->elem(12) = F(d->elem(12), s->elem(12), XMM0.elem(12)); \
1594 d->elem(13) = F(d->elem(13), s->elem(13), XMM0.elem(13)); \
1595 d->elem(14) = F(d->elem(14), s->elem(14), XMM0.elem(14)); \
1596 d->elem(15) = F(d->elem(15), s->elem(15), XMM0.elem(15)); \
1602 #define SSE_HELPER_I(name, elem, num, F) \
1603 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t imm) \
1605 d->elem(0) = F(d->elem(0), s->elem(0), ((imm >> 0) & 1)); \
1606 d->elem(1) = F(d->elem(1), s->elem(1), ((imm >> 1) & 1)); \
1607 if (num > 2) { \
1608 d->elem(2) = F(d->elem(2), s->elem(2), ((imm >> 2) & 1)); \
1609 d->elem(3) = F(d->elem(3), s->elem(3), ((imm >> 3) & 1)); \
1610 if (num > 4) { \
1611 d->elem(4) = F(d->elem(4), s->elem(4), ((imm >> 4) & 1)); \
1612 d->elem(5) = F(d->elem(5), s->elem(5), ((imm >> 5) & 1)); \
1613 d->elem(6) = F(d->elem(6), s->elem(6), ((imm >> 6) & 1)); \
1614 d->elem(7) = F(d->elem(7), s->elem(7), ((imm >> 7) & 1)); \
1615 if (num > 8) { \
1616 d->elem(8) = F(d->elem(8), s->elem(8), ((imm >> 8) & 1)); \
1617 d->elem(9) = F(d->elem(9), s->elem(9), ((imm >> 9) & 1)); \
1618 d->elem(10) = F(d->elem(10), s->elem(10), \
1619 ((imm >> 10) & 1)); \
1620 d->elem(11) = F(d->elem(11), s->elem(11), \
1621 ((imm >> 11) & 1)); \
1622 d->elem(12) = F(d->elem(12), s->elem(12), \
1623 ((imm >> 12) & 1)); \
1624 d->elem(13) = F(d->elem(13), s->elem(13), \
1625 ((imm >> 13) & 1)); \
1626 d->elem(14) = F(d->elem(14), s->elem(14), \
1627 ((imm >> 14) & 1)); \
1628 d->elem(15) = F(d->elem(15), s->elem(15), \
1629 ((imm >> 15) & 1)); \
1635 /* SSE4.1 op helpers */
1636 #define FBLENDVB(d, s, m) ((m & 0x80) ? s : d)
1637 #define FBLENDVPS(d, s, m) ((m & 0x80000000) ? s : d)
1638 #define FBLENDVPD(d, s, m) ((m & 0x8000000000000000LL) ? s : d)
1639 SSE_HELPER_V(helper_pblendvb, B, 16, FBLENDVB)
1640 SSE_HELPER_V(helper_blendvps, L, 4, FBLENDVPS)
1641 SSE_HELPER_V(helper_blendvpd, Q, 2, FBLENDVPD)
1643 void glue(helper_ptest, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1645 uint64_t zf = 0, cf = 0;
1646 int i;
1648 for (i = 0; i < 1 << SHIFT; i++) {
1649 zf |= (s->Q(i) & d->Q(i));
1650 cf |= (s->Q(i) & ~d->Q(i));
1652 CC_SRC = (zf ? 0 : CC_Z) | (cf ? 0 : CC_C);
1655 #define SSE_HELPER_F(name, elem, num, F) \
1656 void glue(name, SUFFIX)(CPUX86State *env, Reg *d, Reg *s) \
1658 int n = num; \
1659 for (int i = n; --i >= 0; ) { \
1660 d->elem(i) = F(i); \
1664 #if SHIFT > 0
1665 SSE_HELPER_F(helper_pmovsxbw, W, 4 << SHIFT, (int8_t) s->B)
1666 SSE_HELPER_F(helper_pmovsxbd, L, 2 << SHIFT, (int8_t) s->B)
1667 SSE_HELPER_F(helper_pmovsxbq, Q, 1 << SHIFT, (int8_t) s->B)
1668 SSE_HELPER_F(helper_pmovsxwd, L, 2 << SHIFT, (int16_t) s->W)
1669 SSE_HELPER_F(helper_pmovsxwq, Q, 1 << SHIFT, (int16_t) s->W)
1670 SSE_HELPER_F(helper_pmovsxdq, Q, 1 << SHIFT, (int32_t) s->L)
1671 SSE_HELPER_F(helper_pmovzxbw, W, 4 << SHIFT, s->B)
1672 SSE_HELPER_F(helper_pmovzxbd, L, 2 << SHIFT, s->B)
1673 SSE_HELPER_F(helper_pmovzxbq, Q, 1 << SHIFT, s->B)
1674 SSE_HELPER_F(helper_pmovzxwd, L, 2 << SHIFT, s->W)
1675 SSE_HELPER_F(helper_pmovzxwq, Q, 1 << SHIFT, s->W)
1676 SSE_HELPER_F(helper_pmovzxdq, Q, 1 << SHIFT, s->L)
1677 #endif
1679 void glue(helper_pmuldq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1681 Reg *v = d;
1682 int i;
1684 for (i = 0; i < 1 << SHIFT; i++) {
1685 d->Q(i) = (int64_t)(int32_t) v->L(2 * i) * (int32_t) s->L(2 * i);
1689 #define FCMPEQQ(d, s) (d == s ? -1 : 0)
1690 SSE_HELPER_Q(helper_pcmpeqq, FCMPEQQ)
1692 void glue(helper_packusdw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1694 Reg *v = d;
1695 uint16_t r[8];
1696 int i, j, k;
1698 for (i = 0, j = 0; i <= 2 << SHIFT; i += 8, j += 4) {
1699 r[0] = satuw(v->L(j));
1700 r[1] = satuw(v->L(j + 1));
1701 r[2] = satuw(v->L(j + 2));
1702 r[3] = satuw(v->L(j + 3));
1703 r[4] = satuw(s->L(j));
1704 r[5] = satuw(s->L(j + 1));
1705 r[6] = satuw(s->L(j + 2));
1706 r[7] = satuw(s->L(j + 3));
1707 for (k = 0; k < 8; k++) {
1708 d->W(i + k) = r[k];
1713 #define FMINSB(d, s) MIN((int8_t)d, (int8_t)s)
1714 #define FMINSD(d, s) MIN((int32_t)d, (int32_t)s)
1715 #define FMAXSB(d, s) MAX((int8_t)d, (int8_t)s)
1716 #define FMAXSD(d, s) MAX((int32_t)d, (int32_t)s)
1717 SSE_HELPER_B(helper_pminsb, FMINSB)
1718 SSE_HELPER_L(helper_pminsd, FMINSD)
1719 SSE_HELPER_W(helper_pminuw, MIN)
1720 SSE_HELPER_L(helper_pminud, MIN)
1721 SSE_HELPER_B(helper_pmaxsb, FMAXSB)
1722 SSE_HELPER_L(helper_pmaxsd, FMAXSD)
1723 SSE_HELPER_W(helper_pmaxuw, MAX)
1724 SSE_HELPER_L(helper_pmaxud, MAX)
1726 #define FMULLD(d, s) ((int32_t)d * (int32_t)s)
1727 SSE_HELPER_L(helper_pmulld, FMULLD)
1729 void glue(helper_phminposuw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
1731 int idx = 0;
1733 if (s->W(1) < s->W(idx)) {
1734 idx = 1;
1736 if (s->W(2) < s->W(idx)) {
1737 idx = 2;
1739 if (s->W(3) < s->W(idx)) {
1740 idx = 3;
1742 if (s->W(4) < s->W(idx)) {
1743 idx = 4;
1745 if (s->W(5) < s->W(idx)) {
1746 idx = 5;
1748 if (s->W(6) < s->W(idx)) {
1749 idx = 6;
1751 if (s->W(7) < s->W(idx)) {
1752 idx = 7;
1755 d->W(0) = s->W(idx);
1756 d->W(1) = idx;
1757 d->L(1) = 0;
1758 d->Q(1) = 0;
1761 void glue(helper_roundps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1762 uint32_t mode)
1764 uint8_t old_flags = get_float_exception_flags(&env->sse_status);
1765 signed char prev_rounding_mode;
1767 prev_rounding_mode = env->sse_status.float_rounding_mode;
1768 if (!(mode & (1 << 2))) {
1769 switch (mode & 3) {
1770 case 0:
1771 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1772 break;
1773 case 1:
1774 set_float_rounding_mode(float_round_down, &env->sse_status);
1775 break;
1776 case 2:
1777 set_float_rounding_mode(float_round_up, &env->sse_status);
1778 break;
1779 case 3:
1780 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1781 break;
1785 d->ZMM_S(0) = float32_round_to_int(s->ZMM_S(0), &env->sse_status);
1786 d->ZMM_S(1) = float32_round_to_int(s->ZMM_S(1), &env->sse_status);
1787 d->ZMM_S(2) = float32_round_to_int(s->ZMM_S(2), &env->sse_status);
1788 d->ZMM_S(3) = float32_round_to_int(s->ZMM_S(3), &env->sse_status);
1790 if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) {
1791 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1792 ~float_flag_inexact,
1793 &env->sse_status);
1795 env->sse_status.float_rounding_mode = prev_rounding_mode;
1798 void glue(helper_roundpd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1799 uint32_t mode)
1801 uint8_t old_flags = get_float_exception_flags(&env->sse_status);
1802 signed char prev_rounding_mode;
1804 prev_rounding_mode = env->sse_status.float_rounding_mode;
1805 if (!(mode & (1 << 2))) {
1806 switch (mode & 3) {
1807 case 0:
1808 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1809 break;
1810 case 1:
1811 set_float_rounding_mode(float_round_down, &env->sse_status);
1812 break;
1813 case 2:
1814 set_float_rounding_mode(float_round_up, &env->sse_status);
1815 break;
1816 case 3:
1817 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1818 break;
1822 d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status);
1823 d->ZMM_D(1) = float64_round_to_int(s->ZMM_D(1), &env->sse_status);
1825 if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) {
1826 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1827 ~float_flag_inexact,
1828 &env->sse_status);
1830 env->sse_status.float_rounding_mode = prev_rounding_mode;
1833 void glue(helper_roundss, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1834 uint32_t mode)
1836 uint8_t old_flags = get_float_exception_flags(&env->sse_status);
1837 signed char prev_rounding_mode;
1839 prev_rounding_mode = env->sse_status.float_rounding_mode;
1840 if (!(mode & (1 << 2))) {
1841 switch (mode & 3) {
1842 case 0:
1843 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1844 break;
1845 case 1:
1846 set_float_rounding_mode(float_round_down, &env->sse_status);
1847 break;
1848 case 2:
1849 set_float_rounding_mode(float_round_up, &env->sse_status);
1850 break;
1851 case 3:
1852 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1853 break;
1857 d->ZMM_S(0) = float32_round_to_int(s->ZMM_S(0), &env->sse_status);
1859 if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) {
1860 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1861 ~float_flag_inexact,
1862 &env->sse_status);
1864 env->sse_status.float_rounding_mode = prev_rounding_mode;
1867 void glue(helper_roundsd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1868 uint32_t mode)
1870 uint8_t old_flags = get_float_exception_flags(&env->sse_status);
1871 signed char prev_rounding_mode;
1873 prev_rounding_mode = env->sse_status.float_rounding_mode;
1874 if (!(mode & (1 << 2))) {
1875 switch (mode & 3) {
1876 case 0:
1877 set_float_rounding_mode(float_round_nearest_even, &env->sse_status);
1878 break;
1879 case 1:
1880 set_float_rounding_mode(float_round_down, &env->sse_status);
1881 break;
1882 case 2:
1883 set_float_rounding_mode(float_round_up, &env->sse_status);
1884 break;
1885 case 3:
1886 set_float_rounding_mode(float_round_to_zero, &env->sse_status);
1887 break;
1891 d->ZMM_D(0) = float64_round_to_int(s->ZMM_D(0), &env->sse_status);
1893 if (mode & (1 << 3) && !(old_flags & float_flag_inexact)) {
1894 set_float_exception_flags(get_float_exception_flags(&env->sse_status) &
1895 ~float_flag_inexact,
1896 &env->sse_status);
1898 env->sse_status.float_rounding_mode = prev_rounding_mode;
1901 #define FBLENDP(d, s, m) (m ? s : d)
1902 SSE_HELPER_I(helper_blendps, L, 4, FBLENDP)
1903 SSE_HELPER_I(helper_blendpd, Q, 2, FBLENDP)
1904 SSE_HELPER_I(helper_pblendw, W, 8, FBLENDP)
1906 void glue(helper_dpps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask)
1908 float32 prod1, prod2, temp2, temp3, temp4;
1911 * We must evaluate (A+B)+(C+D), not ((A+B)+C)+D
1912 * to correctly round the intermediate results
1914 if (mask & (1 << 4)) {
1915 prod1 = float32_mul(d->ZMM_S(0), s->ZMM_S(0), &env->sse_status);
1916 } else {
1917 prod1 = float32_zero;
1919 if (mask & (1 << 5)) {
1920 prod2 = float32_mul(d->ZMM_S(1), s->ZMM_S(1), &env->sse_status);
1921 } else {
1922 prod2 = float32_zero;
1924 temp2 = float32_add(prod1, prod2, &env->sse_status);
1925 if (mask & (1 << 6)) {
1926 prod1 = float32_mul(d->ZMM_S(2), s->ZMM_S(2), &env->sse_status);
1927 } else {
1928 prod1 = float32_zero;
1930 if (mask & (1 << 7)) {
1931 prod2 = float32_mul(d->ZMM_S(3), s->ZMM_S(3), &env->sse_status);
1932 } else {
1933 prod2 = float32_zero;
1935 temp3 = float32_add(prod1, prod2, &env->sse_status);
1936 temp4 = float32_add(temp2, temp3, &env->sse_status);
1938 d->ZMM_S(0) = (mask & (1 << 0)) ? temp4 : float32_zero;
1939 d->ZMM_S(1) = (mask & (1 << 1)) ? temp4 : float32_zero;
1940 d->ZMM_S(2) = (mask & (1 << 2)) ? temp4 : float32_zero;
1941 d->ZMM_S(3) = (mask & (1 << 3)) ? temp4 : float32_zero;
1944 void glue(helper_dppd, SUFFIX)(CPUX86State *env, Reg *d, Reg *s, uint32_t mask)
1946 float64 prod1, prod2, temp2;
1948 if (mask & (1 << 4)) {
1949 prod1 = float64_mul(d->ZMM_D(0), s->ZMM_D(0), &env->sse_status);
1950 } else {
1951 prod1 = float64_zero;
1953 if (mask & (1 << 5)) {
1954 prod2 = float64_mul(d->ZMM_D(1), s->ZMM_D(1), &env->sse_status);
1955 } else {
1956 prod2 = float64_zero;
1958 temp2 = float64_add(prod1, prod2, &env->sse_status);
1959 d->ZMM_D(0) = (mask & (1 << 0)) ? temp2 : float64_zero;
1960 d->ZMM_D(1) = (mask & (1 << 1)) ? temp2 : float64_zero;
1963 void glue(helper_mpsadbw, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
1964 uint32_t offset)
1966 Reg *v = d;
1967 int i, j;
1968 uint16_t r[8];
1970 for (j = 0; j < 4 << SHIFT; ) {
1971 int s0 = (j * 2) + ((offset & 3) << 2);
1972 int d0 = (j * 2) + ((offset & 4) << 0);
1973 for (i = 0; i < LANE_WIDTH / 2; i++, d0++) {
1974 r[i] = 0;
1975 r[i] += abs1(v->B(d0 + 0) - s->B(s0 + 0));
1976 r[i] += abs1(v->B(d0 + 1) - s->B(s0 + 1));
1977 r[i] += abs1(v->B(d0 + 2) - s->B(s0 + 2));
1978 r[i] += abs1(v->B(d0 + 3) - s->B(s0 + 3));
1980 for (i = 0; i < LANE_WIDTH / 2; i++, j++) {
1981 d->W(j) = r[i];
1983 offset >>= 3;
1987 /* SSE4.2 op helpers */
1988 #define FCMPGTQ(d, s) ((int64_t)d > (int64_t)s ? -1 : 0)
1989 SSE_HELPER_Q(helper_pcmpgtq, FCMPGTQ)
1991 static inline int pcmp_elen(CPUX86State *env, int reg, uint32_t ctrl)
1993 target_long val, limit;
1995 /* Presence of REX.W is indicated by a bit higher than 7 set */
1996 if (ctrl >> 8) {
1997 val = (target_long)env->regs[reg];
1998 } else {
1999 val = (int32_t)env->regs[reg];
2001 if (ctrl & 1) {
2002 limit = 8;
2003 } else {
2004 limit = 16;
2006 if ((val > limit) || (val < -limit)) {
2007 return limit;
2009 return abs1(val);
2012 static inline int pcmp_ilen(Reg *r, uint8_t ctrl)
2014 int val = 0;
2016 if (ctrl & 1) {
2017 while (val < 8 && r->W(val)) {
2018 val++;
2020 } else {
2021 while (val < 16 && r->B(val)) {
2022 val++;
2026 return val;
2029 static inline int pcmp_val(Reg *r, uint8_t ctrl, int i)
2031 switch ((ctrl >> 0) & 3) {
2032 case 0:
2033 return r->B(i);
2034 case 1:
2035 return r->W(i);
2036 case 2:
2037 return (int8_t)r->B(i);
2038 case 3:
2039 default:
2040 return (int16_t)r->W(i);
2044 static inline unsigned pcmpxstrx(CPUX86State *env, Reg *d, Reg *s,
2045 int8_t ctrl, int valids, int validd)
2047 unsigned int res = 0;
2048 int v;
2049 int j, i;
2050 int upper = (ctrl & 1) ? 7 : 15;
2052 valids--;
2053 validd--;
2055 CC_SRC = (valids < upper ? CC_Z : 0) | (validd < upper ? CC_S : 0);
2057 switch ((ctrl >> 2) & 3) {
2058 case 0:
2059 for (j = valids; j >= 0; j--) {
2060 res <<= 1;
2061 v = pcmp_val(s, ctrl, j);
2062 for (i = validd; i >= 0; i--) {
2063 res |= (v == pcmp_val(d, ctrl, i));
2066 break;
2067 case 1:
2068 for (j = valids; j >= 0; j--) {
2069 res <<= 1;
2070 v = pcmp_val(s, ctrl, j);
2071 for (i = ((validd - 1) | 1); i >= 0; i -= 2) {
2072 res |= (pcmp_val(d, ctrl, i - 0) >= v &&
2073 pcmp_val(d, ctrl, i - 1) <= v);
2076 break;
2077 case 2:
2078 res = (1 << (upper - MAX(valids, validd))) - 1;
2079 res <<= MAX(valids, validd) - MIN(valids, validd);
2080 for (i = MIN(valids, validd); i >= 0; i--) {
2081 res <<= 1;
2082 v = pcmp_val(s, ctrl, i);
2083 res |= (v == pcmp_val(d, ctrl, i));
2085 break;
2086 case 3:
2087 if (validd == -1) {
2088 res = (2 << upper) - 1;
2089 break;
2091 for (j = valids == upper ? valids : valids - validd; j >= 0; j--) {
2092 res <<= 1;
2093 v = 1;
2094 for (i = MIN(valids - j, validd); i >= 0; i--) {
2095 v &= (pcmp_val(s, ctrl, i + j) == pcmp_val(d, ctrl, i));
2097 res |= v;
2099 break;
2102 switch ((ctrl >> 4) & 3) {
2103 case 1:
2104 res ^= (2 << upper) - 1;
2105 break;
2106 case 3:
2107 res ^= (1 << (valids + 1)) - 1;
2108 break;
2111 if (res) {
2112 CC_SRC |= CC_C;
2114 if (res & 1) {
2115 CC_SRC |= CC_O;
2118 return res;
2121 void glue(helper_pcmpestri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2122 uint32_t ctrl)
2124 unsigned int res = pcmpxstrx(env, d, s, ctrl,
2125 pcmp_elen(env, R_EDX, ctrl),
2126 pcmp_elen(env, R_EAX, ctrl));
2128 if (res) {
2129 env->regs[R_ECX] = (ctrl & (1 << 6)) ? 31 - clz32(res) : ctz32(res);
2130 } else {
2131 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
2135 void glue(helper_pcmpestrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2136 uint32_t ctrl)
2138 int i;
2139 unsigned int res = pcmpxstrx(env, d, s, ctrl,
2140 pcmp_elen(env, R_EDX, ctrl),
2141 pcmp_elen(env, R_EAX, ctrl));
2143 if ((ctrl >> 6) & 1) {
2144 if (ctrl & 1) {
2145 for (i = 0; i < 8; i++, res >>= 1) {
2146 env->xmm_regs[0].W(i) = (res & 1) ? ~0 : 0;
2148 } else {
2149 for (i = 0; i < 16; i++, res >>= 1) {
2150 env->xmm_regs[0].B(i) = (res & 1) ? ~0 : 0;
2153 } else {
2154 env->xmm_regs[0].Q(1) = 0;
2155 env->xmm_regs[0].Q(0) = res;
2159 void glue(helper_pcmpistri, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2160 uint32_t ctrl)
2162 unsigned int res = pcmpxstrx(env, d, s, ctrl,
2163 pcmp_ilen(s, ctrl),
2164 pcmp_ilen(d, ctrl));
2166 if (res) {
2167 env->regs[R_ECX] = (ctrl & (1 << 6)) ? 31 - clz32(res) : ctz32(res);
2168 } else {
2169 env->regs[R_ECX] = 16 >> (ctrl & (1 << 0));
2173 void glue(helper_pcmpistrm, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2174 uint32_t ctrl)
2176 int i;
2177 unsigned int res = pcmpxstrx(env, d, s, ctrl,
2178 pcmp_ilen(s, ctrl),
2179 pcmp_ilen(d, ctrl));
2181 if ((ctrl >> 6) & 1) {
2182 if (ctrl & 1) {
2183 for (i = 0; i < 8; i++, res >>= 1) {
2184 env->xmm_regs[0].W(i) = (res & 1) ? ~0 : 0;
2186 } else {
2187 for (i = 0; i < 16; i++, res >>= 1) {
2188 env->xmm_regs[0].B(i) = (res & 1) ? ~0 : 0;
2191 } else {
2192 env->xmm_regs[0].Q(1) = 0;
2193 env->xmm_regs[0].Q(0) = res;
2197 #define CRCPOLY 0x1edc6f41
2198 #define CRCPOLY_BITREV 0x82f63b78
2199 target_ulong helper_crc32(uint32_t crc1, target_ulong msg, uint32_t len)
2201 target_ulong crc = (msg & ((target_ulong) -1 >>
2202 (TARGET_LONG_BITS - len))) ^ crc1;
2204 while (len--) {
2205 crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_BITREV : 0);
2208 return crc;
2211 void glue(helper_pclmulqdq, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2212 uint32_t ctrl)
2214 uint64_t ah, al, b, resh, resl;
2216 ah = 0;
2217 al = d->Q((ctrl & 1) != 0);
2218 b = s->Q((ctrl & 16) != 0);
2219 resh = resl = 0;
2221 while (b) {
2222 if (b & 1) {
2223 resl ^= al;
2224 resh ^= ah;
2226 ah = (ah << 1) | (al >> 63);
2227 al <<= 1;
2228 b >>= 1;
2231 d->Q(0) = resl;
2232 d->Q(1) = resh;
2235 void glue(helper_aesdec, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2237 int i;
2238 Reg st = *d;
2239 Reg rk = *s;
2241 for (i = 0 ; i < 4 ; i++) {
2242 d->L(i) = rk.L(i) ^ bswap32(AES_Td0[st.B(AES_ishifts[4*i+0])] ^
2243 AES_Td1[st.B(AES_ishifts[4*i+1])] ^
2244 AES_Td2[st.B(AES_ishifts[4*i+2])] ^
2245 AES_Td3[st.B(AES_ishifts[4*i+3])]);
2249 void glue(helper_aesdeclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2251 int i;
2252 Reg st = *d;
2253 Reg rk = *s;
2255 for (i = 0; i < 16; i++) {
2256 d->B(i) = rk.B(i) ^ (AES_isbox[st.B(AES_ishifts[i])]);
2260 void glue(helper_aesenc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2262 int i;
2263 Reg st = *d;
2264 Reg rk = *s;
2266 for (i = 0 ; i < 4 ; i++) {
2267 d->L(i) = rk.L(i) ^ bswap32(AES_Te0[st.B(AES_shifts[4*i+0])] ^
2268 AES_Te1[st.B(AES_shifts[4*i+1])] ^
2269 AES_Te2[st.B(AES_shifts[4*i+2])] ^
2270 AES_Te3[st.B(AES_shifts[4*i+3])]);
2274 void glue(helper_aesenclast, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2276 int i;
2277 Reg st = *d;
2278 Reg rk = *s;
2280 for (i = 0; i < 16; i++) {
2281 d->B(i) = rk.B(i) ^ (AES_sbox[st.B(AES_shifts[i])]);
2286 void glue(helper_aesimc, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
2288 int i;
2289 Reg tmp = *s;
2291 for (i = 0 ; i < 4 ; i++) {
2292 d->L(i) = bswap32(AES_imc[tmp.B(4*i+0)][0] ^
2293 AES_imc[tmp.B(4*i+1)][1] ^
2294 AES_imc[tmp.B(4*i+2)][2] ^
2295 AES_imc[tmp.B(4*i+3)][3]);
2299 void glue(helper_aeskeygenassist, SUFFIX)(CPUX86State *env, Reg *d, Reg *s,
2300 uint32_t ctrl)
2302 int i;
2303 Reg tmp = *s;
2305 for (i = 0 ; i < 4 ; i++) {
2306 d->B(i) = AES_sbox[tmp.B(i + 4)];
2307 d->B(i + 8) = AES_sbox[tmp.B(i + 12)];
2309 d->L(1) = (d->L(0) << 24 | d->L(0) >> 8) ^ ctrl;
2310 d->L(3) = (d->L(2) << 24 | d->L(2) >> 8) ^ ctrl;
2312 #endif
2314 #undef SSE_HELPER_S
2316 #undef SHIFT
2317 #undef XMM_ONLY
2318 #undef Reg
2319 #undef B
2320 #undef W
2321 #undef L
2322 #undef Q
2323 #undef SUFFIX
2324 #undef SIZE