hw/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  */
   9
  10 #include "hw.h"
  11 #include "pxa.h"
  12 #include "arm-misc.h"
  13 #include "sysemu.h"
  14 #include "pcmcia.h"
  15 #include "i2c.h"
  16 #include "ssi.h"
  17 #include "flash.h"
  18 #include "qemu-timer.h"
  19 #include "devices.h"
  20 #include "sharpsl.h"
  21 #include "console.h"
  22 #include "block.h"
  23 #include "audio/audio.h"
  24 #include "boards.h"
  25 #include "blockdev.h"
  26
  27 #undef REG_FMT
  28 #define REG_FMT                 "0x%02lx"
  29
  30 /* Spitz Flash */
  31 #define FLASH_BASE              0x0c000000
  32 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  33 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  34 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  35 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  36 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  37 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  38 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  39
  40 #define FLASHCTL_CE0            (1 << 0)
  41 #define FLASHCTL_CLE            (1 << 1)
  42 #define FLASHCTL_ALE            (1 << 2)
  43 #define FLASHCTL_WP             (1 << 3)
  44 #define FLASHCTL_CE1            (1 << 4)
  45 #define FLASHCTL_RYBY           (1 << 5)
  46 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  47
  48 typedef struct {
  49     NANDFlashState *nand;
  50     uint8_t ctl;
  51     ECCState ecc;
  52 } SLNANDState;
  53
  54 static uint32_t sl_readb(void *opaque, target_phys_addr_t addr)
  55 {
  56     SLNANDState *s = (SLNANDState *) opaque;
  57     int ryby;
  58
  59     switch (addr) {
  60 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
  61     case FLASH_ECCLPLB:
  62         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
  63                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
  64
  65 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
  66     case FLASH_ECCLPUB:
  67         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
  68                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
  69
  70     case FLASH_ECCCP:
  71         return s->ecc.cp;
  72
  73     case FLASH_ECCCNTR:
  74         return s->ecc.count & 0xff;
  75
  76     case FLASH_FLASHCTL:
  77         nand_getpins(s->nand, &ryby);
  78         if (ryby)
  79             return s->ctl | FLASHCTL_RYBY;
  80         else
  81             return s->ctl;
  82
  83     case FLASH_FLASHIO:
  84         return ecc_digest(&s->ecc, nand_getio(s->nand));
  85
  86     default:
  87         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
  88     }
  89     return 0;
  90 }
  91
  92 static uint32_t sl_readl(void *opaque, target_phys_addr_t addr)
  93 {
  94     SLNANDState *s = (SLNANDState *) opaque;
  95
  96     if (addr == FLASH_FLASHIO)
  97         return ecc_digest(&s->ecc, nand_getio(s->nand)) |
  98                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
  99
 100     return sl_readb(opaque, addr);
 101 }
 102
 103 static void sl_writeb(void *opaque, target_phys_addr_t addr,
 104                 uint32_t value)
 105 {
 106     SLNANDState *s = (SLNANDState *) opaque;
 107
 108     switch (addr) {
 109     case FLASH_ECCCLRR:
 110         /* Value is ignored.  */
 111         ecc_reset(&s->ecc);
 112         break;
 113
 114     case FLASH_FLASHCTL:
 115         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 116         nand_setpins(s->nand,
 117                         s->ctl & FLASHCTL_CLE,
 118                         s->ctl & FLASHCTL_ALE,
 119                         s->ctl & FLASHCTL_NCE,
 120                         s->ctl & FLASHCTL_WP,
 121                         0);
 122         break;
 123
 124     case FLASH_FLASHIO:
 125         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 126         break;
 127
 128     default:
 129         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 130     }
 131 }
 132
 133 static void sl_save(QEMUFile *f, void *opaque)
 134 {
 135     SLNANDState *s = (SLNANDState *) opaque;
 136
 137     qemu_put_8s(f, &s->ctl);
 138     ecc_put(f, &s->ecc);
 139 }
 140
 141 static int sl_load(QEMUFile *f, void *opaque, int version_id)
 142 {
 143     SLNANDState *s = (SLNANDState *) opaque;
 144
 145     qemu_get_8s(f, &s->ctl);
 146     ecc_get(f, &s->ecc);
 147
 148     return 0;
 149 }
 150
 151 enum {
 152     FLASH_128M,
 153     FLASH_1024M,
 154 };
 155
 156 static void sl_flash_register(PXA2xxState *cpu, int size)
 157 {
 158     int iomemtype;
 159     SLNANDState *s;
 160     CPUReadMemoryFunc * const sl_readfn[] = {
 161         sl_readb,
 162         sl_readb,
 163         sl_readl,
 164     };
 165     CPUWriteMemoryFunc * const sl_writefn[] = {
 166         sl_writeb,
 167         sl_writeb,
 168         sl_writeb,
 169     };
 170
 171     s = (SLNANDState *) qemu_mallocz(sizeof(SLNANDState));
 172     s->ctl = 0;
 173     if (size == FLASH_128M)
 174         s->nand = nand_init(NAND_MFR_SAMSUNG, 0x73);
 175     else if (size == FLASH_1024M)
 176         s->nand = nand_init(NAND_MFR_SAMSUNG, 0xf1);
 177
 178     iomemtype = cpu_register_io_memory(sl_readfn,
 179                     sl_writefn, s, DEVICE_NATIVE_ENDIAN);
 180     cpu_register_physical_memory(FLASH_BASE, 0x40, iomemtype);
 181
 182     register_savevm(NULL, "sl_flash", 0, 0, sl_save, sl_load, s);
 183 }
 184
 185 /* Spitz Keyboard */
 186
 187 #define SPITZ_KEY_STROBE_NUM    11
 188 #define SPITZ_KEY_SENSE_NUM     7
 189
 190 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 191     12, 17, 91, 34, 36, 38, 39
 192 };
 193
 194 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 195     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 196 };
 197
 198 /* Eighth additional row maps the special keys */
 199 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 200     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 201     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 202     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 203     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 204     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 205     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 206     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 207     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 208 };
 209
 210 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 211 #define SPITZ_GPIO_SYNC         16      /* Sync button */
 212 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 213 #define SPITZ_GPIO_SWA          97      /* Lid */
 214 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 215
 216 /* The special buttons are mapped to unused keys */
 217 static const int spitz_gpiomap[5] = {
 218     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 219     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 220 };
 221 static int spitz_gpio_invert[5] = { 0, 0, 0, 0, 0, };
 222
 223 typedef struct {
 224     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 225     qemu_irq *strobe;
 226     qemu_irq gpiomap[5];
 227     int keymap[0x80];
 228     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 229     uint16_t strobe_state;
 230     uint16_t sense_state;
 231
 232     uint16_t pre_map[0x100];
 233     uint16_t modifiers;
 234     uint16_t imodifiers;
 235     uint8_t fifo[16];
 236     int fifopos, fifolen;
 237     QEMUTimer *kbdtimer;
 238 } SpitzKeyboardState;
 239
 240 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 241 {
 242     int i;
 243     uint16_t strobe, sense = 0;
 244     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 245         strobe = s->keyrow[i] & s->strobe_state;
 246         if (strobe) {
 247             sense |= 1 << i;
 248             if (!(s->sense_state & (1 << i)))
 249                 qemu_irq_raise(s->sense[i]);
 250         } else if (s->sense_state & (1 << i))
 251             qemu_irq_lower(s->sense[i]);
 252     }
 253
 254     s->sense_state = sense;
 255 }
 256
 257 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 258 {
 259     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 260
 261     if (level)
 262         s->strobe_state |= 1 << line;
 263     else
 264         s->strobe_state &= ~(1 << line);
 265     spitz_keyboard_sense_update(s);
 266 }
 267
 268 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 269 {
 270     int spitz_keycode = s->keymap[keycode & 0x7f];
 271     if (spitz_keycode == -1)
 272         return;
 273
 274     /* Handle the additional keys */
 275     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 276         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80) ^
 277                         spitz_gpio_invert[spitz_keycode & 0xf]);
 278         return;
 279     }
 280
 281     if (keycode & 0x80)
 282         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 283     else
 284         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 285
 286     spitz_keyboard_sense_update(s);
 287 }
 288
 289 #define SHIFT   (1 << 7)
 290 #define CTRL    (1 << 8)
 291 #define FN      (1 << 9)
 292
 293 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 294
 295 static void spitz_keyboard_handler(SpitzKeyboardState *s, int keycode)
 296 {
 297     uint16_t code;
 298     int mapcode;
 299     switch (keycode) {
 300     case 0x2a:  /* Left Shift */
 301         s->modifiers |= 1;
 302         break;
 303     case 0xaa:
 304         s->modifiers &= ~1;
 305         break;
 306     case 0x36:  /* Right Shift */
 307         s->modifiers |= 2;
 308         break;
 309     case 0xb6:
 310         s->modifiers &= ~2;
 311         break;
 312     case 0x1d:  /* Control */
 313         s->modifiers |= 4;
 314         break;
 315     case 0x9d:
 316         s->modifiers &= ~4;
 317         break;
 318     case 0x38:  /* Alt */
 319         s->modifiers |= 8;
 320         break;
 321     case 0xb8:
 322         s->modifiers &= ~8;
 323         break;
 324     }
 325
 326     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 327             (keycode | SHIFT) :
 328             (keycode & ~SHIFT))];
 329
 330     if (code != mapcode) {
 331 #if 0
 332         if ((code & SHIFT) && !(s->modifiers & 1))
 333             QUEUE_KEY(0x2a | (keycode & 0x80));
 334         if ((code & CTRL ) && !(s->modifiers & 4))
 335             QUEUE_KEY(0x1d | (keycode & 0x80));
 336         if ((code & FN   ) && !(s->modifiers & 8))
 337             QUEUE_KEY(0x38 | (keycode & 0x80));
 338         if ((code & FN   ) && (s->modifiers & 1))
 339             QUEUE_KEY(0x2a | (~keycode & 0x80));
 340         if ((code & FN   ) && (s->modifiers & 2))
 341             QUEUE_KEY(0x36 | (~keycode & 0x80));
 342 #else
 343         if (keycode & 0x80) {
 344             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 345                 QUEUE_KEY(0x2a | 0x80);
 346             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 347                 QUEUE_KEY(0x1d | 0x80);
 348             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 349                 QUEUE_KEY(0x38 | 0x80);
 350             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 351                 QUEUE_KEY(0x2a);
 352             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 353                 QUEUE_KEY(0x36);
 354             s->imodifiers = 0;
 355         } else {
 356             if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) {
 357                 QUEUE_KEY(0x2a);
 358                 s->imodifiers |= 1;
 359             }
 360             if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) {
 361                 QUEUE_KEY(0x1d);
 362                 s->imodifiers |= 4;
 363             }
 364             if ((code & FN   ) && !((s->modifiers | s->imodifiers) & 8)) {
 365                 QUEUE_KEY(0x38);
 366                 s->imodifiers |= 8;
 367             }
 368             if ((code & FN   ) && (s->modifiers & 1) &&
 369                             !(s->imodifiers & 0x10)) {
 370                 QUEUE_KEY(0x2a | 0x80);
 371                 s->imodifiers |= 0x10;
 372             }
 373             if ((code & FN   ) && (s->modifiers & 2) &&
 374                             !(s->imodifiers & 0x20)) {
 375                 QUEUE_KEY(0x36 | 0x80);
 376                 s->imodifiers |= 0x20;
 377             }
 378         }
 379 #endif
 380     }
 381
 382     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 383 }
 384
 385 static void spitz_keyboard_tick(void *opaque)
 386 {
 387     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 388
 389     if (s->fifolen) {
 390         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 391         s->fifolen --;
 392         if (s->fifopos >= 16)
 393             s->fifopos = 0;
 394     }
 395
 396     qemu_mod_timer(s->kbdtimer, qemu_get_clock(vm_clock) +
 397                    get_ticks_per_sec() / 32);
 398 }
 399
 400 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 401 {
 402     int i;
 403     for (i = 0; i < 0x100; i ++)
 404         s->pre_map[i] = i;
 405     s->pre_map[0x02 | SHIFT     ] = 0x02 | SHIFT;       /* exclam */
 406     s->pre_map[0x28 | SHIFT     ] = 0x03 | SHIFT;       /* quotedbl */
 407     s->pre_map[0x04 | SHIFT     ] = 0x04 | SHIFT;       /* numbersign */
 408     s->pre_map[0x05 | SHIFT     ] = 0x05 | SHIFT;       /* dollar */
 409     s->pre_map[0x06 | SHIFT     ] = 0x06 | SHIFT;       /* percent */
 410     s->pre_map[0x08 | SHIFT     ] = 0x07 | SHIFT;       /* ampersand */
 411     s->pre_map[0x28             ] = 0x08 | SHIFT;       /* apostrophe */
 412     s->pre_map[0x0a | SHIFT     ] = 0x09 | SHIFT;       /* parenleft */
 413     s->pre_map[0x0b | SHIFT     ] = 0x0a | SHIFT;       /* parenright */
 414     s->pre_map[0x29 | SHIFT     ] = 0x0b | SHIFT;       /* asciitilde */
 415     s->pre_map[0x03 | SHIFT     ] = 0x0c | SHIFT;       /* at */
 416     s->pre_map[0xd3             ] = 0x0e | FN;          /* Delete */
 417     s->pre_map[0x3a             ] = 0x0f | FN;          /* Caps_Lock */
 418     s->pre_map[0x07 | SHIFT     ] = 0x11 | FN;          /* asciicircum */
 419     s->pre_map[0x0d             ] = 0x12 | FN;          /* equal */
 420     s->pre_map[0x0d | SHIFT     ] = 0x13 | FN;          /* plus */
 421     s->pre_map[0x1a             ] = 0x14 | FN;          /* bracketleft */
 422     s->pre_map[0x1b             ] = 0x15 | FN;          /* bracketright */
 423     s->pre_map[0x1a | SHIFT     ] = 0x16 | FN;          /* braceleft */
 424     s->pre_map[0x1b | SHIFT     ] = 0x17 | FN;          /* braceright */
 425     s->pre_map[0x27             ] = 0x22 | FN;          /* semicolon */
 426     s->pre_map[0x27 | SHIFT     ] = 0x23 | FN;          /* colon */
 427     s->pre_map[0x09 | SHIFT     ] = 0x24 | FN;          /* asterisk */
 428     s->pre_map[0x2b             ] = 0x25 | FN;          /* backslash */
 429     s->pre_map[0x2b | SHIFT     ] = 0x26 | FN;          /* bar */
 430     s->pre_map[0x0c | SHIFT     ] = 0x30 | FN;          /* underscore */
 431     s->pre_map[0x33 | SHIFT     ] = 0x33 | FN;          /* less */
 432     s->pre_map[0x35             ] = 0x33 | SHIFT;       /* slash */
 433     s->pre_map[0x34 | SHIFT     ] = 0x34 | FN;          /* greater */
 434     s->pre_map[0x35 | SHIFT     ] = 0x34 | SHIFT;       /* question */
 435     s->pre_map[0x49             ] = 0x48 | FN;          /* Page_Up */
 436     s->pre_map[0x51             ] = 0x50 | FN;          /* Page_Down */
 437
 438     s->modifiers = 0;
 439     s->imodifiers = 0;
 440     s->fifopos = 0;
 441     s->fifolen = 0;
 442     s->kbdtimer = qemu_new_timer(vm_clock, spitz_keyboard_tick, s);
 443     spitz_keyboard_tick(s);
 444 }
 445
 446 #undef SHIFT
 447 #undef CTRL
 448 #undef FN
 449
 450 static void spitz_keyboard_save(QEMUFile *f, void *opaque)
 451 {
 452     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 453     int i;
 454
 455     qemu_put_be16s(f, &s->sense_state);
 456     qemu_put_be16s(f, &s->strobe_state);
 457     for (i = 0; i < 5; i ++)
 458         qemu_put_byte(f, spitz_gpio_invert[i]);
 459 }
 460
 461 static int spitz_keyboard_load(QEMUFile *f, void *opaque, int version_id)
 462 {
 463     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 464     int i;
 465
 466     qemu_get_be16s(f, &s->sense_state);
 467     qemu_get_be16s(f, &s->strobe_state);
 468     for (i = 0; i < 5; i ++)
 469         spitz_gpio_invert[i] = qemu_get_byte(f);
 470
 471     /* Release all pressed keys */
 472     memset(s->keyrow, 0, sizeof(s->keyrow));
 473     spitz_keyboard_sense_update(s);
 474     s->modifiers = 0;
 475     s->imodifiers = 0;
 476     s->fifopos = 0;
 477     s->fifolen = 0;
 478
 479     return 0;
 480 }
 481
 482 static void spitz_keyboard_register(PXA2xxState *cpu)
 483 {
 484     int i, j;
 485     SpitzKeyboardState *s;
 486
 487     s = (SpitzKeyboardState *)
 488             qemu_mallocz(sizeof(SpitzKeyboardState));
 489     memset(s, 0, sizeof(SpitzKeyboardState));
 490
 491     for (i = 0; i < 0x80; i ++)
 492         s->keymap[i] = -1;
 493     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 494         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 495             if (spitz_keymap[i][j] != -1)
 496                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 497
 498     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 499         s->sense[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpio_key_sense[i]];
 500
 501     for (i = 0; i < 5; i ++)
 502         s->gpiomap[i] = pxa2xx_gpio_in_get(cpu->gpio)[spitz_gpiomap[i]];
 503
 504     s->strobe = qemu_allocate_irqs(spitz_keyboard_strobe, s,
 505                     SPITZ_KEY_STROBE_NUM);
 506     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 507         pxa2xx_gpio_out_set(cpu->gpio, spitz_gpio_key_strobe[i], s->strobe[i]);
 508
 509     spitz_keyboard_pre_map(s);
 510     qemu_add_kbd_event_handler((QEMUPutKBDEvent *) spitz_keyboard_handler, s);
 511
 512     register_savevm(NULL, "spitz_keyboard", 0, 0,
 513                     spitz_keyboard_save, spitz_keyboard_load, s);
 514 }
 515
 516 /* LCD backlight controller */
 517
 518 #define LCDTG_RESCTL    0x00
 519 #define LCDTG_PHACTRL   0x01
 520 #define LCDTG_DUTYCTRL  0x02
 521 #define LCDTG_POWERREG0 0x03
 522 #define LCDTG_POWERREG1 0x04
 523 #define LCDTG_GPOR3     0x05
 524 #define LCDTG_PICTRL    0x06
 525 #define LCDTG_POLCTRL   0x07
 526
 527 typedef struct {
 528     SSISlave ssidev;
 529     int bl_intensity;
 530     int bl_power;
 531 } SpitzLCDTG;
 532
 533 static void spitz_bl_update(SpitzLCDTG *s)
 534 {
 535     if (s->bl_power && s->bl_intensity)
 536         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 537     else
 538         zaurus_printf("LCD Backlight now off\n");
 539 }
 540
 541 /* FIXME: Implement GPIO properly and remove this hack.  */
 542 static SpitzLCDTG *spitz_lcdtg;
 543
 544 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 545 {
 546     SpitzLCDTG *s = spitz_lcdtg;
 547     int prev = s->bl_intensity;
 548
 549     if (level)
 550         s->bl_intensity &= ~0x20;
 551     else
 552         s->bl_intensity |= 0x20;
 553
 554     if (s->bl_power && prev != s->bl_intensity)
 555         spitz_bl_update(s);
 556 }
 557
 558 static inline void spitz_bl_power(void *opaque, int line, int level)
 559 {
 560     SpitzLCDTG *s = spitz_lcdtg;
 561     s->bl_power = !!level;
 562     spitz_bl_update(s);
 563 }
 564
 565 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 566 {
 567     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 568     int addr;
 569     addr = value >> 5;
 570     value &= 0x1f;
 571
 572     switch (addr) {
 573     case LCDTG_RESCTL:
 574         if (value)
 575             zaurus_printf("LCD in QVGA mode\n");
 576         else
 577             zaurus_printf("LCD in VGA mode\n");
 578         break;
 579
 580     case LCDTG_DUTYCTRL:
 581         s->bl_intensity &= ~0x1f;
 582         s->bl_intensity |= value;
 583         if (s->bl_power)
 584             spitz_bl_update(s);
 585         break;
 586
 587     case LCDTG_POWERREG0:
 588         /* Set common voltage to M62332FP */
 589         break;
 590     }
 591     return 0;
 592 }
 593
 594 static void spitz_lcdtg_save(QEMUFile *f, void *opaque)
 595 {
 596     SpitzLCDTG *s = (SpitzLCDTG *)opaque;
 597     qemu_put_be32(f, s->bl_intensity);
 598     qemu_put_be32(f, s->bl_power);
 599 }
 600
 601 static int spitz_lcdtg_load(QEMUFile *f, void *opaque, int version_id)
 602 {
 603     SpitzLCDTG *s = (SpitzLCDTG *)opaque;
 604     s->bl_intensity = qemu_get_be32(f);
 605     s->bl_power = qemu_get_be32(f);
 606     return 0;
 607 }
 608
 609 static int spitz_lcdtg_init(SSISlave *dev)
 610 {
 611     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 612
 613     spitz_lcdtg = s;
 614     s->bl_power = 0;
 615     s->bl_intensity = 0x20;
 616
 617     register_savevm(&dev->qdev, "spitz-lcdtg", -1, 1,
 618                     spitz_lcdtg_save, spitz_lcdtg_load, s);
 619     return 0;
 620 }
 621
 622 /* SSP devices */
 623
 624 #define CORGI_SSP_PORT          2
 625
 626 #define SPITZ_GPIO_LCDCON_CS    53
 627 #define SPITZ_GPIO_ADS7846_CS   14
 628 #define SPITZ_GPIO_MAX1111_CS   20
 629 #define SPITZ_GPIO_TP_INT       11
 630
 631 static DeviceState *max1111;
 632
 633 /* "Demux" the signal based on current chipselect */
 634 typedef struct {
 635     SSISlave ssidev;
 636     SSIBus *bus[3];
 637     int enable[3];
 638 } CorgiSSPState;
 639
 640 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 641 {
 642     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 643     int i;
 644
 645     for (i = 0; i < 3; i++) {
 646         if (s->enable[i]) {
 647             return ssi_transfer(s->bus[i], value);
 648         }
 649     }
 650     return 0;
 651 }
 652
 653 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 654 {
 655     CorgiSSPState *s = (CorgiSSPState *)opaque;
 656     assert(line >= 0 && line < 3);
 657     s->enable[line] = !level;
 658 }
 659
 660 #define MAX1111_BATT_VOLT       1
 661 #define MAX1111_BATT_TEMP       2
 662 #define MAX1111_ACIN_VOLT       3
 663
 664 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 665 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 666 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 667
 668 static void spitz_adc_temp_on(void *opaque, int line, int level)
 669 {
 670     if (!max1111)
 671         return;
 672
 673     if (level)
 674         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 675     else
 676         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 677 }
 678
 679 static void spitz_ssp_save(QEMUFile *f, void *opaque)
 680 {
 681     CorgiSSPState *s = (CorgiSSPState *)opaque;
 682     int i;
 683
 684     for (i = 0; i < 3; i++) {
 685         qemu_put_be32(f, s->enable[i]);
 686     }
 687 }
 688
 689 static int spitz_ssp_load(QEMUFile *f, void *opaque, int version_id)
 690 {
 691     CorgiSSPState *s = (CorgiSSPState *)opaque;
 692     int i;
 693
 694     if (version_id != 1) {
 695         return -EINVAL;
 696     }
 697     for (i = 0; i < 3; i++) {
 698         s->enable[i] = qemu_get_be32(f);
 699     }
 700     return 0;
 701 }
 702
 703 static int corgi_ssp_init(SSISlave *dev)
 704 {
 705     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 706
 707     qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
 708     s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0");
 709     s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1");
 710     s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2");
 711
 712     register_savevm(&dev->qdev, "spitz_ssp", -1, 1,
 713                     spitz_ssp_save, spitz_ssp_load, s);
 714     return 0;
 715 }
 716
 717 static void spitz_ssp_attach(PXA2xxState *cpu)
 718 {
 719     DeviceState *mux;
 720     DeviceState *dev;
 721     void *bus;
 722
 723     mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 724
 725     bus = qdev_get_child_bus(mux, "ssi0");
 726     ssi_create_slave(bus, "spitz-lcdtg");
 727
 728     bus = qdev_get_child_bus(mux, "ssi1");
 729     dev = ssi_create_slave(bus, "ads7846");
 730     qdev_connect_gpio_out(dev, 0,
 731                           pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_TP_INT]);
 732
 733     bus = qdev_get_child_bus(mux, "ssi2");
 734     max1111 = ssi_create_slave(bus, "max1111");
 735     max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
 736     max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 737     max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
 738
 739     pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
 740                         qdev_get_gpio_in(mux, 0));
 741     pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
 742                         qdev_get_gpio_in(mux, 1));
 743     pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
 744                         qdev_get_gpio_in(mux, 2));
 745 }
 746
 747 /* CF Microdrive */
 748
 749 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 750 {
 751     PCMCIACardState *md;
 752     BlockDriverState *bs;
 753     DriveInfo *dinfo;
 754
 755     dinfo = drive_get(IF_IDE, 0, 0);
 756     if (!dinfo)
 757         return;
 758     bs = dinfo->bdrv;
 759     if (bdrv_is_inserted(bs) && !bdrv_is_removable(bs)) {
 760         md = dscm1xxxx_init(dinfo);
 761         pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 762     }
 763 }
 764
 765 /* Wm8750 and Max7310 on I2C */
 766
 767 #define AKITA_MAX_ADDR  0x18
 768 #define SPITZ_WM_ADDRL  0x1b
 769 #define SPITZ_WM_ADDRH  0x1a
 770
 771 #define SPITZ_GPIO_WM   5
 772
 773 static void spitz_wm8750_addr(void *opaque, int line, int level)
 774 {
 775     i2c_slave *wm = (i2c_slave *) opaque;
 776     if (level)
 777         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 778     else
 779         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 780 }
 781
 782 static void spitz_i2c_setup(PXA2xxState *cpu)
 783 {
 784     /* Attach the CPU on one end of our I2C bus.  */
 785     i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 786
 787     DeviceState *wm;
 788
 789     /* Attach a WM8750 to the bus */
 790     wm = i2c_create_slave(bus, "wm8750", 0);
 791
 792     spitz_wm8750_addr(wm, 0, 0);
 793     pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_WM,
 794                     qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]);
 795     /* .. and to the sound interface.  */
 796     cpu->i2s->opaque = wm;
 797     cpu->i2s->codec_out = wm8750_dac_dat;
 798     cpu->i2s->codec_in = wm8750_adc_dat;
 799     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 800 }
 801
 802 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 803 {
 804     /* Attach a Max7310 to Akita I2C bus.  */
 805     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 806                      AKITA_MAX_ADDR);
 807 }
 808
 809 /* Other peripherals */
 810
 811 static void spitz_out_switch(void *opaque, int line, int level)
 812 {
 813     switch (line) {
 814     case 0:
 815         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 816         break;
 817     case 1:
 818         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 819         break;
 820     case 2:
 821         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 822         break;
 823     case 3:
 824         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 825         break;
 826     case 4:
 827         spitz_bl_bit5(opaque, line, level);
 828         break;
 829     case 5:
 830         spitz_bl_power(opaque, line, level);
 831         break;
 832     case 6:
 833         spitz_adc_temp_on(opaque, line, level);
 834         break;
 835     }
 836 }
 837
 838 #define SPITZ_SCP_LED_GREEN             1
 839 #define SPITZ_SCP_JK_B                  2
 840 #define SPITZ_SCP_CHRG_ON               3
 841 #define SPITZ_SCP_MUTE_L                4
 842 #define SPITZ_SCP_MUTE_R                5
 843 #define SPITZ_SCP_CF_POWER              6
 844 #define SPITZ_SCP_LED_ORANGE            7
 845 #define SPITZ_SCP_JK_A                  8
 846 #define SPITZ_SCP_ADC_TEMP_ON           9
 847 #define SPITZ_SCP2_IR_ON                1
 848 #define SPITZ_SCP2_AKIN_PULLUP          2
 849 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 850 #define SPITZ_SCP2_BACKLIGHT_ON         8
 851 #define SPITZ_SCP2_MIC_BIAS             9
 852
 853 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
 854                 ScoopInfo *scp0, ScoopInfo *scp1)
 855 {
 856     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
 857
 858     scoop_gpio_out_set(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 859     scoop_gpio_out_set(scp0, SPITZ_SCP_JK_B, outsignals[1]);
 860     scoop_gpio_out_set(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 861     scoop_gpio_out_set(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 862
 863     if (scp1) {
 864         scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
 865         scoop_gpio_out_set(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
 866     }
 867
 868     scoop_gpio_out_set(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 869 }
 870
 871 #define SPITZ_GPIO_HSYNC                22
 872 #define SPITZ_GPIO_SD_DETECT            9
 873 #define SPITZ_GPIO_SD_WP                81
 874 #define SPITZ_GPIO_ON_RESET             89
 875 #define SPITZ_GPIO_BAT_COVER            90
 876 #define SPITZ_GPIO_CF1_IRQ              105
 877 #define SPITZ_GPIO_CF1_CD               94
 878 #define SPITZ_GPIO_CF2_IRQ              106
 879 #define SPITZ_GPIO_CF2_CD               93
 880
 881 static int spitz_hsync;
 882
 883 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 884 {
 885     PXA2xxState *cpu = (PXA2xxState *) opaque;
 886     qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_HSYNC], spitz_hsync);
 887     spitz_hsync ^= 1;
 888 }
 889
 890 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 891 {
 892     qemu_irq lcd_hsync;
 893     /*
 894      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 895      * read to satisfy broken guests that poll-wait for hsync.
 896      * Simulating a real hsync event would be less practical and
 897      * wouldn't guarantee that a guest ever exits the loop.
 898      */
 899     spitz_hsync = 0;
 900     lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0];
 901     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 902     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 903
 904     /* MMC/SD host */
 905     pxa2xx_mmci_handlers(cpu->mmc,
 906                     pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_WP],
 907                     pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SD_DETECT]);
 908
 909     /* Battery lock always closed */
 910     qemu_irq_raise(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_BAT_COVER]);
 911
 912     /* Handle reset */
 913     pxa2xx_gpio_out_set(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
 914
 915     /* PCMCIA signals: card's IRQ and Card-Detect */
 916     if (slots >= 1)
 917         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 918                         pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_IRQ],
 919                         pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF1_CD]);
 920     if (slots >= 2)
 921         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 922                         pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_IRQ],
 923                         pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_CF2_CD]);
 924
 925     /* Initialise the screen rotation related signals */
 926     spitz_gpio_invert[3] = 0;   /* Always open */
 927     if (graphic_rotate) {       /* Tablet mode */
 928         spitz_gpio_invert[4] = 0;
 929     } else {                    /* Portrait mode */
 930         spitz_gpio_invert[4] = 1;
 931     }
 932     qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWA],
 933                     spitz_gpio_invert[3]);
 934     qemu_set_irq(pxa2xx_gpio_in_get(cpu->gpio)[SPITZ_GPIO_SWB],
 935                     spitz_gpio_invert[4]);
 936 }
 937
 938 /* Board init.  */
 939 enum spitz_model_e { spitz, akita, borzoi, terrier };
 940
 941 #define SPITZ_RAM       0x04000000
 942 #define SPITZ_ROM       0x00800000
 943
 944 static struct arm_boot_info spitz_binfo = {
 945     .loader_start = PXA2XX_SDRAM_BASE,
 946     .ram_size = 0x04000000,
 947 };
 948
 949 static void spitz_common_init(ram_addr_t ram_size,
 950                 const char *kernel_filename,
 951                 const char *kernel_cmdline, const char *initrd_filename,
 952                 const char *cpu_model, enum spitz_model_e model, int arm_id)
 953 {
 954     PXA2xxState *cpu;
 955     ScoopInfo *scp0, *scp1 = NULL;
 956
 957     if (!cpu_model)
 958         cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
 959
 960     /* Setup CPU & memory */
 961     cpu = pxa270_init(spitz_binfo.ram_size, cpu_model);
 962
 963     sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 964
 965     cpu_register_physical_memory(0, SPITZ_ROM,
 966                     qemu_ram_alloc(NULL, "spitz.rom", SPITZ_ROM) | IO_MEM_ROM);
 967
 968     /* Setup peripherals */
 969     spitz_keyboard_register(cpu);
 970
 971     spitz_ssp_attach(cpu);
 972
 973     scp0 = scoop_init(cpu, 0, 0x10800000);
 974     if (model != akita) {
 975             scp1 = scoop_init(cpu, 1, 0x08800040);
 976     }
 977
 978     spitz_scoop_gpio_setup(cpu, scp0, scp1);
 979
 980     spitz_gpio_setup(cpu, (model == akita) ? 1 : 2);
 981
 982     spitz_i2c_setup(cpu);
 983
 984     if (model == akita)
 985         spitz_akita_i2c_setup(cpu);
 986
 987     if (model == terrier)
 988         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 989         spitz_microdrive_attach(cpu, 1);
 990     else if (model != akita)
 991         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 992         spitz_microdrive_attach(cpu, 0);
 993
 994     spitz_binfo.kernel_filename = kernel_filename;
 995     spitz_binfo.kernel_cmdline = kernel_cmdline;
 996     spitz_binfo.initrd_filename = initrd_filename;
 997     spitz_binfo.board_id = arm_id;
 998     arm_load_kernel(cpu->env, &spitz_binfo);
 999     sl_bootparam_write(SL_PXA_PARAM_BASE);
1000 }
1001
1002 static void spitz_init(ram_addr_t ram_size,
1003                 const char *boot_device,
1004                 const char *kernel_filename, const char *kernel_cmdline,
1005                 const char *initrd_filename, const char *cpu_model)
1006 {
1007     spitz_common_init(ram_size, kernel_filename,
1008                 kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
1009 }
1010
1011 static void borzoi_init(ram_addr_t ram_size,
1012                 const char *boot_device,
1013                 const char *kernel_filename, const char *kernel_cmdline,
1014                 const char *initrd_filename, const char *cpu_model)
1015 {
1016     spitz_common_init(ram_size, kernel_filename,
1017                 kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
1018 }
1019
1020 static void akita_init(ram_addr_t ram_size,
1021                 const char *boot_device,
1022                 const char *kernel_filename, const char *kernel_cmdline,
1023                 const char *initrd_filename, const char *cpu_model)
1024 {
1025     spitz_common_init(ram_size, kernel_filename,
1026                 kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
1027 }
1028
1029 static void terrier_init(ram_addr_t ram_size,
1030                 const char *boot_device,
1031                 const char *kernel_filename, const char *kernel_cmdline,
1032                 const char *initrd_filename, const char *cpu_model)
1033 {
1034     spitz_common_init(ram_size, kernel_filename,
1035                 kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
1036 }
1037
1038 static QEMUMachine akitapda_machine = {
1039     .name = "akita",
1040     .desc = "Akita PDA (PXA270)",
1041     .init = akita_init,
1042 };
1043
1044 static QEMUMachine spitzpda_machine = {
1045     .name = "spitz",
1046     .desc = "Spitz PDA (PXA270)",
1047     .init = spitz_init,
1048 };
1049
1050 static QEMUMachine borzoipda_machine = {
1051     .name = "borzoi",
1052     .desc = "Borzoi PDA (PXA270)",
1053     .init = borzoi_init,
1054 };
1055
1056 static QEMUMachine terrierpda_machine = {
1057     .name = "terrier",
1058     .desc = "Terrier PDA (PXA270)",
1059     .init = terrier_init,
1060 };
1061
1062 static void spitz_machine_init(void)
1063 {
1064     qemu_register_machine(&akitapda_machine);
1065     qemu_register_machine(&spitzpda_machine);
1066     qemu_register_machine(&borzoipda_machine);
1067     qemu_register_machine(&terrierpda_machine);
1068 }
1069
1070 machine_init(spitz_machine_init);
1071
1072 static SSISlaveInfo corgi_ssp_info = {
1073     .qdev.name = "corgi-ssp",
1074     .qdev.size = sizeof(CorgiSSPState),
1075     .init = corgi_ssp_init,
1076     .transfer = corgi_ssp_transfer
1077 };
1078
1079 static SSISlaveInfo spitz_lcdtg_info = {
1080     .qdev.name = "spitz-lcdtg",
1081     .qdev.size = sizeof(SpitzLCDTG),
1082     .init = spitz_lcdtg_init,
1083     .transfer = spitz_lcdtg_transfer
1084 };
1085
1086 static void spitz_register_devices(void)
1087 {
1088     ssi_register_slave(&corgi_ssp_info);
1089     ssi_register_slave(&spitz_lcdtg_info);
1090 }
1091
1092 device_init(spitz_register_devices)