target/s390x/misc_helper.c

   1 /*
   2  *  S/390 misc helper routines
   3  *
   4  *  Copyright (c) 2009 Ulrich Hecht
   5  *  Copyright (c) 2009 Alexander Graf
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * Lesser General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "qemu/osdep.h"
  22 #include "cpu.h"
  23 #include "exec/memory.h"
  24 #include "qemu/host-utils.h"
  25 #include "exec/helper-proto.h"
  26 #include "sysemu/kvm.h"
  27 #include "qemu/timer.h"
  28 #include "qemu/main-loop.h"
  29 #include "exec/address-spaces.h"
  30 #ifdef CONFIG_KVM
  31 #include <linux/kvm.h>
  32 #endif
  33 #include "exec/exec-all.h"
  34 #include "exec/cpu_ldst.h"
  35
  36 #if !defined(CONFIG_USER_ONLY)
  37 #include "hw/watchdog/wdt_diag288.h"
  38 #include "sysemu/cpus.h"
  39 #include "sysemu/sysemu.h"
  40 #include "hw/s390x/ebcdic.h"
  41 #include "hw/s390x/ipl.h"
  42 #endif
  43
  44 /* #define DEBUG_HELPER */
  45 #ifdef DEBUG_HELPER
  46 #define HELPER_LOG(x...) qemu_log(x)
  47 #else
  48 #define HELPER_LOG(x...)
  49 #endif
  50
  51 /* Raise an exception dynamically from a helper function.  */
  52 void QEMU_NORETURN runtime_exception(CPUS390XState *env, int excp,
  53                                      uintptr_t retaddr)
  54 {
  55     CPUState *cs = CPU(s390_env_get_cpu(env));
  56     int t;
  57
  58     cs->exception_index = EXCP_PGM;
  59     env->int_pgm_code = excp;
  60
  61     /* Use the (ultimate) callers address to find the insn that trapped.  */
  62     cpu_restore_state(cs, retaddr);
  63
  64     /* Advance past the insn.  */
  65     t = cpu_ldub_code(env, env->psw.addr);
  66     env->int_pgm_ilen = t = get_ilen(t);
  67     env->psw.addr += t;
  68
  69     cpu_loop_exit(cs);
  70 }
  71
  72 /* Raise an exception statically from a TB.  */
  73 void HELPER(exception)(CPUS390XState *env, uint32_t excp)
  74 {
  75     CPUState *cs = CPU(s390_env_get_cpu(env));
  76
  77     HELPER_LOG("%s: exception %d\n", __func__, excp);
  78     cs->exception_index = excp;
  79     cpu_loop_exit(cs);
  80 }
  81
  82 #ifndef CONFIG_USER_ONLY
  83
  84 void program_interrupt(CPUS390XState *env, uint32_t code, int ilen)
  85 {
  86     S390CPU *cpu = s390_env_get_cpu(env);
  87
  88     qemu_log_mask(CPU_LOG_INT, "program interrupt at %#" PRIx64 "\n",
  89                   env->psw.addr);
  90
  91     if (kvm_enabled()) {
  92 #ifdef CONFIG_KVM
  93         struct kvm_s390_irq irq = {
  94             .type = KVM_S390_PROGRAM_INT,
  95             .u.pgm.code = code,
  96         };
  97
  98         kvm_s390_vcpu_interrupt(cpu, &irq);
  99 #endif
 100     } else {
 101         CPUState *cs = CPU(cpu);
 102
 103         env->int_pgm_code = code;
 104         env->int_pgm_ilen = ilen;
 105         cs->exception_index = EXCP_PGM;
 106         cpu_loop_exit(cs);
 107     }
 108 }
 109
 110 /* SCLP service call */
 111 uint32_t HELPER(servc)(CPUS390XState *env, uint64_t r1, uint64_t r2)
 112 {
 113     qemu_mutex_lock_iothread();
 114     int r = sclp_service_call(env, r1, r2);
 115     if (r < 0) {
 116         program_interrupt(env, -r, 4);
 117         r = 0;
 118     }
 119     qemu_mutex_unlock_iothread();
 120     return r;
 121 }
 122
 123 #ifndef CONFIG_USER_ONLY
 124 static int modified_clear_reset(S390CPU *cpu)
 125 {
 126     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 127     CPUState *t;
 128
 129     pause_all_vcpus();
 130     cpu_synchronize_all_states();
 131     CPU_FOREACH(t) {
 132         run_on_cpu(t, s390_do_cpu_full_reset, RUN_ON_CPU_NULL);
 133     }
 134     s390_cmma_reset();
 135     subsystem_reset();
 136     s390_crypto_reset();
 137     scc->load_normal(CPU(cpu));
 138     cpu_synchronize_all_post_reset();
 139     resume_all_vcpus();
 140     return 0;
 141 }
 142
 143 static int load_normal_reset(S390CPU *cpu)
 144 {
 145     S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
 146     CPUState *t;
 147
 148     pause_all_vcpus();
 149     cpu_synchronize_all_states();
 150     CPU_FOREACH(t) {
 151         run_on_cpu(t, s390_do_cpu_reset, RUN_ON_CPU_NULL);
 152     }
 153     s390_cmma_reset();
 154     subsystem_reset();
 155     scc->initial_cpu_reset(CPU(cpu));
 156     scc->load_normal(CPU(cpu));
 157     cpu_synchronize_all_post_reset();
 158     resume_all_vcpus();
 159     return 0;
 160 }
 161
 162 int handle_diag_288(CPUS390XState *env, uint64_t r1, uint64_t r3)
 163 {
 164     uint64_t func = env->regs[r1];
 165     uint64_t timeout = env->regs[r1 + 1];
 166     uint64_t action = env->regs[r3];
 167     Object *obj;
 168     DIAG288State *diag288;
 169     DIAG288Class *diag288_class;
 170
 171     if (r1 % 2 || action != 0) {
 172         return -1;
 173     }
 174
 175     /* Timeout must be more than 15 seconds except for timer deletion */
 176     if (func != WDT_DIAG288_CANCEL && timeout < 15) {
 177         return -1;
 178     }
 179
 180     obj = object_resolve_path_type("", TYPE_WDT_DIAG288, NULL);
 181     if (!obj) {
 182         return -1;
 183     }
 184
 185     diag288 = DIAG288(obj);
 186     diag288_class = DIAG288_GET_CLASS(diag288);
 187     return diag288_class->handle_timer(diag288, func, timeout);
 188 }
 189
 190 #define DIAG_308_RC_OK              0x0001
 191 #define DIAG_308_RC_NO_CONF         0x0102
 192 #define DIAG_308_RC_INVALID         0x0402
 193
 194 void handle_diag_308(CPUS390XState *env, uint64_t r1, uint64_t r3)
 195 {
 196     uint64_t addr =  env->regs[r1];
 197     uint64_t subcode = env->regs[r3];
 198     IplParameterBlock *iplb;
 199
 200     if (env->psw.mask & PSW_MASK_PSTATE) {
 201         program_interrupt(env, PGM_PRIVILEGED, ILEN_LATER_INC);
 202         return;
 203     }
 204
 205     if ((subcode & ~0x0ffffULL) || (subcode > 6)) {
 206         program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 207         return;
 208     }
 209
 210     switch (subcode) {
 211     case 0:
 212         modified_clear_reset(s390_env_get_cpu(env));
 213         if (tcg_enabled()) {
 214             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 215         }
 216         break;
 217     case 1:
 218         load_normal_reset(s390_env_get_cpu(env));
 219         if (tcg_enabled()) {
 220             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 221         }
 222         break;
 223     case 3:
 224         s390_reipl_request();
 225         if (tcg_enabled()) {
 226             cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 227         }
 228         break;
 229     case 5:
 230         if ((r1 & 1) || (addr & 0x0fffULL)) {
 231             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 232             return;
 233         }
 234         if (!address_space_access_valid(&address_space_memory, addr,
 235                                         sizeof(IplParameterBlock), false)) {
 236             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 237             return;
 238         }
 239         iplb = g_malloc0(sizeof(IplParameterBlock));
 240         cpu_physical_memory_read(addr, iplb, sizeof(iplb->len));
 241         if (!iplb_valid_len(iplb)) {
 242             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 243             goto out;
 244         }
 245
 246         cpu_physical_memory_read(addr, iplb, be32_to_cpu(iplb->len));
 247
 248         if (!iplb_valid_ccw(iplb) && !iplb_valid_fcp(iplb)) {
 249             env->regs[r1 + 1] = DIAG_308_RC_INVALID;
 250             goto out;
 251         }
 252
 253         s390_ipl_update_diag308(iplb);
 254         env->regs[r1 + 1] = DIAG_308_RC_OK;
 255 out:
 256         g_free(iplb);
 257         return;
 258     case 6:
 259         if ((r1 & 1) || (addr & 0x0fffULL)) {
 260             program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER_INC);
 261             return;
 262         }
 263         if (!address_space_access_valid(&address_space_memory, addr,
 264                                         sizeof(IplParameterBlock), true)) {
 265             program_interrupt(env, PGM_ADDRESSING, ILEN_LATER_INC);
 266             return;
 267         }
 268         iplb = s390_ipl_get_iplb();
 269         if (iplb) {
 270             cpu_physical_memory_write(addr, iplb, be32_to_cpu(iplb->len));
 271             env->regs[r1 + 1] = DIAG_308_RC_OK;
 272         } else {
 273             env->regs[r1 + 1] = DIAG_308_RC_NO_CONF;
 274         }
 275         return;
 276     default:
 277         hw_error("Unhandled diag308 subcode %" PRIx64, subcode);
 278         break;
 279     }
 280 }
 281 #endif
 282
 283 void HELPER(diag)(CPUS390XState *env, uint32_t r1, uint32_t r3, uint32_t num)
 284 {
 285     uint64_t r;
 286
 287     switch (num) {
 288     case 0x500:
 289         /* KVM hypercall */
 290         r = s390_virtio_hypercall(env);
 291         break;
 292     case 0x44:
 293         /* yield */
 294         r = 0;
 295         break;
 296     case 0x308:
 297         /* ipl */
 298         handle_diag_308(env, r1, r3);
 299         r = 0;
 300         break;
 301     default:
 302         r = -1;
 303         break;
 304     }
 305
 306     if (r) {
 307         program_interrupt(env, PGM_OPERATION, ILEN_LATER_INC);
 308     }
 309 }
 310
 311 /* Set Prefix */
 312 void HELPER(spx)(CPUS390XState *env, uint64_t a1)
 313 {
 314     CPUState *cs = CPU(s390_env_get_cpu(env));
 315     uint32_t prefix = a1 & 0x7fffe000;
 316
 317     env->psa = prefix;
 318     HELPER_LOG("prefix: %#x\n", prefix);
 319     tlb_flush_page(cs, 0);
 320     tlb_flush_page(cs, TARGET_PAGE_SIZE);
 321 }
 322
 323 /* Store Clock */
 324 uint64_t HELPER(stck)(CPUS390XState *env)
 325 {
 326     uint64_t time;
 327
 328     time = env->tod_offset +
 329         time2tod(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - env->tod_basetime);
 330
 331     return time;
 332 }
 333
 334 /* Set Clock Comparator */
 335 void HELPER(sckc)(CPUS390XState *env, uint64_t time)
 336 {
 337     if (time == -1ULL) {
 338         return;
 339     }
 340
 341     env->ckc = time;
 342
 343     /* difference between origins */
 344     time -= env->tod_offset;
 345
 346     /* nanoseconds */
 347     time = tod2time(time);
 348
 349     timer_mod(env->tod_timer, env->tod_basetime + time);
 350 }
 351
 352 /* Store Clock Comparator */
 353 uint64_t HELPER(stckc)(CPUS390XState *env)
 354 {
 355     return env->ckc;
 356 }
 357
 358 /* Set CPU Timer */
 359 void HELPER(spt)(CPUS390XState *env, uint64_t time)
 360 {
 361     if (time == -1ULL) {
 362         return;
 363     }
 364
 365     /* nanoseconds */
 366     time = tod2time(time);
 367
 368     env->cputm = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + time;
 369
 370     timer_mod(env->cpu_timer, env->cputm);
 371 }
 372
 373 /* Store CPU Timer */
 374 uint64_t HELPER(stpt)(CPUS390XState *env)
 375 {
 376     return time2tod(env->cputm - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 377 }
 378
 379 /* Store System Information */
 380 uint32_t HELPER(stsi)(CPUS390XState *env, uint64_t a0,
 381                       uint64_t r0, uint64_t r1)
 382 {
 383     int cc = 0;
 384     int sel1, sel2;
 385
 386     if ((r0 & STSI_LEVEL_MASK) <= STSI_LEVEL_3 &&
 387         ((r0 & STSI_R0_RESERVED_MASK) || (r1 & STSI_R1_RESERVED_MASK))) {
 388         /* valid function code, invalid reserved bits */
 389         program_interrupt(env, PGM_SPECIFICATION, 2);
 390     }
 391
 392     sel1 = r0 & STSI_R0_SEL1_MASK;
 393     sel2 = r1 & STSI_R1_SEL2_MASK;
 394
 395     /* XXX: spec exception if sysib is not 4k-aligned */
 396
 397     switch (r0 & STSI_LEVEL_MASK) {
 398     case STSI_LEVEL_1:
 399         if ((sel1 == 1) && (sel2 == 1)) {
 400             /* Basic Machine Configuration */
 401             struct sysib_111 sysib;
 402
 403             memset(&sysib, 0, sizeof(sysib));
 404             ebcdic_put(sysib.manuf, "QEMU            ", 16);
 405             /* same as machine type number in STORE CPU ID */
 406             ebcdic_put(sysib.type, "QEMU", 4);
 407             /* same as model number in STORE CPU ID */
 408             ebcdic_put(sysib.model, "QEMU            ", 16);
 409             ebcdic_put(sysib.sequence, "QEMU            ", 16);
 410             ebcdic_put(sysib.plant, "QEMU", 4);
 411             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 412         } else if ((sel1 == 2) && (sel2 == 1)) {
 413             /* Basic Machine CPU */
 414             struct sysib_121 sysib;
 415
 416             memset(&sysib, 0, sizeof(sysib));
 417             /* XXX make different for different CPUs? */
 418             ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 419             ebcdic_put(sysib.plant, "QEMU", 4);
 420             stw_p(&sysib.cpu_addr, env->cpu_num);
 421             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 422         } else if ((sel1 == 2) && (sel2 == 2)) {
 423             /* Basic Machine CPUs */
 424             struct sysib_122 sysib;
 425
 426             memset(&sysib, 0, sizeof(sysib));
 427             stl_p(&sysib.capability, 0x443afc29);
 428             /* XXX change when SMP comes */
 429             stw_p(&sysib.total_cpus, 1);
 430             stw_p(&sysib.active_cpus, 1);
 431             stw_p(&sysib.standby_cpus, 0);
 432             stw_p(&sysib.reserved_cpus, 0);
 433             cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 434         } else {
 435             cc = 3;
 436         }
 437         break;
 438     case STSI_LEVEL_2:
 439         {
 440             if ((sel1 == 2) && (sel2 == 1)) {
 441                 /* LPAR CPU */
 442                 struct sysib_221 sysib;
 443
 444                 memset(&sysib, 0, sizeof(sysib));
 445                 /* XXX make different for different CPUs? */
 446                 ebcdic_put(sysib.sequence, "QEMUQEMUQEMUQEMU", 16);
 447                 ebcdic_put(sysib.plant, "QEMU", 4);
 448                 stw_p(&sysib.cpu_addr, env->cpu_num);
 449                 stw_p(&sysib.cpu_id, 0);
 450                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 451             } else if ((sel1 == 2) && (sel2 == 2)) {
 452                 /* LPAR CPUs */
 453                 struct sysib_222 sysib;
 454
 455                 memset(&sysib, 0, sizeof(sysib));
 456                 stw_p(&sysib.lpar_num, 0);
 457                 sysib.lcpuc = 0;
 458                 /* XXX change when SMP comes */
 459                 stw_p(&sysib.total_cpus, 1);
 460                 stw_p(&sysib.conf_cpus, 1);
 461                 stw_p(&sysib.standby_cpus, 0);
 462                 stw_p(&sysib.reserved_cpus, 0);
 463                 ebcdic_put(sysib.name, "QEMU    ", 8);
 464                 stl_p(&sysib.caf, 1000);
 465                 stw_p(&sysib.dedicated_cpus, 0);
 466                 stw_p(&sysib.shared_cpus, 0);
 467                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 468             } else {
 469                 cc = 3;
 470             }
 471             break;
 472         }
 473     case STSI_LEVEL_3:
 474         {
 475             if ((sel1 == 2) && (sel2 == 2)) {
 476                 /* VM CPUs */
 477                 struct sysib_322 sysib;
 478
 479                 memset(&sysib, 0, sizeof(sysib));
 480                 sysib.count = 1;
 481                 /* XXX change when SMP comes */
 482                 stw_p(&sysib.vm[0].total_cpus, 1);
 483                 stw_p(&sysib.vm[0].conf_cpus, 1);
 484                 stw_p(&sysib.vm[0].standby_cpus, 0);
 485                 stw_p(&sysib.vm[0].reserved_cpus, 0);
 486                 ebcdic_put(sysib.vm[0].name, "KVMguest", 8);
 487                 stl_p(&sysib.vm[0].caf, 1000);
 488                 ebcdic_put(sysib.vm[0].cpi, "KVM/Linux       ", 16);
 489                 cpu_physical_memory_write(a0, &sysib, sizeof(sysib));
 490             } else {
 491                 cc = 3;
 492             }
 493             break;
 494         }
 495     case STSI_LEVEL_CURRENT:
 496         env->regs[0] = STSI_LEVEL_3;
 497         break;
 498     default:
 499         cc = 3;
 500         break;
 501     }
 502
 503     return cc;
 504 }
 505
 506 uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t order_code, uint32_t r1,
 507                       uint64_t cpu_addr)
 508 {
 509     int cc = SIGP_CC_ORDER_CODE_ACCEPTED;
 510
 511     HELPER_LOG("%s: %016" PRIx64 " %08x %016" PRIx64 "\n",
 512                __func__, order_code, r1, cpu_addr);
 513
 514     /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register"
 515        as parameter (input). Status (output) is always R1. */
 516
 517     switch (order_code) {
 518     case SIGP_SET_ARCH:
 519         /* switch arch */
 520         break;
 521     case SIGP_SENSE:
 522         /* enumerate CPU status */
 523         if (cpu_addr) {
 524             /* XXX implement when SMP comes */
 525             return 3;
 526         }
 527         env->regs[r1] &= 0xffffffff00000000ULL;
 528         cc = 1;
 529         break;
 530 #if !defined(CONFIG_USER_ONLY)
 531     case SIGP_RESTART:
 532         qemu_system_reset_request();
 533         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 534         break;
 535     case SIGP_STOP:
 536         qemu_system_shutdown_request();
 537         cpu_loop_exit(CPU(s390_env_get_cpu(env)));
 538         break;
 539 #endif
 540     default:
 541         /* unknown sigp */
 542         fprintf(stderr, "XXX unknown sigp: 0x%" PRIx64 "\n", order_code);
 543         cc = SIGP_CC_NOT_OPERATIONAL;
 544     }
 545
 546     return cc;
 547 }
 548 #endif
 549
 550 #ifndef CONFIG_USER_ONLY
 551 void HELPER(xsch)(CPUS390XState *env, uint64_t r1)
 552 {
 553     S390CPU *cpu = s390_env_get_cpu(env);
 554     ioinst_handle_xsch(cpu, r1);
 555 }
 556
 557 void HELPER(csch)(CPUS390XState *env, uint64_t r1)
 558 {
 559     S390CPU *cpu = s390_env_get_cpu(env);
 560     ioinst_handle_csch(cpu, r1);
 561 }
 562
 563 void HELPER(hsch)(CPUS390XState *env, uint64_t r1)
 564 {
 565     S390CPU *cpu = s390_env_get_cpu(env);
 566     ioinst_handle_hsch(cpu, r1);
 567 }
 568
 569 void HELPER(msch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 570 {
 571     S390CPU *cpu = s390_env_get_cpu(env);
 572     ioinst_handle_msch(cpu, r1, inst >> 16);
 573 }
 574
 575 void HELPER(rchp)(CPUS390XState *env, uint64_t r1)
 576 {
 577     S390CPU *cpu = s390_env_get_cpu(env);
 578     ioinst_handle_rchp(cpu, r1);
 579 }
 580
 581 void HELPER(rsch)(CPUS390XState *env, uint64_t r1)
 582 {
 583     S390CPU *cpu = s390_env_get_cpu(env);
 584     ioinst_handle_rsch(cpu, r1);
 585 }
 586
 587 void HELPER(ssch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 588 {
 589     S390CPU *cpu = s390_env_get_cpu(env);
 590     ioinst_handle_ssch(cpu, r1, inst >> 16);
 591 }
 592
 593 void HELPER(stsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 594 {
 595     S390CPU *cpu = s390_env_get_cpu(env);
 596     ioinst_handle_stsch(cpu, r1, inst >> 16);
 597 }
 598
 599 void HELPER(tsch)(CPUS390XState *env, uint64_t r1, uint64_t inst)
 600 {
 601     S390CPU *cpu = s390_env_get_cpu(env);
 602     ioinst_handle_tsch(cpu, r1, inst >> 16);
 603 }
 604
 605 void HELPER(chsc)(CPUS390XState *env, uint64_t inst)
 606 {
 607     S390CPU *cpu = s390_env_get_cpu(env);
 608     ioinst_handle_chsc(cpu, inst >> 16);
 609 }
 610 #endif
 611
 612 #ifndef CONFIG_USER_ONLY
 613 void HELPER(per_check_exception)(CPUS390XState *env)
 614 {
 615     CPUState *cs = CPU(s390_env_get_cpu(env));
 616
 617     if (env->per_perc_atmid) {
 618         env->int_pgm_code = PGM_PER;
 619         env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, env->per_address));
 620
 621         cs->exception_index = EXCP_PGM;
 622         cpu_loop_exit(cs);
 623     }
 624 }
 625
 626 void HELPER(per_branch)(CPUS390XState *env, uint64_t from, uint64_t to)
 627 {
 628     if ((env->cregs[9] & PER_CR9_EVENT_BRANCH)) {
 629         if (!(env->cregs[9] & PER_CR9_CONTROL_BRANCH_ADDRESS)
 630             || get_per_in_range(env, to)) {
 631             env->per_address = from;
 632             env->per_perc_atmid = PER_CODE_EVENT_BRANCH | get_per_atmid(env);
 633         }
 634     }
 635 }
 636
 637 void HELPER(per_ifetch)(CPUS390XState *env, uint64_t addr)
 638 {
 639     if ((env->cregs[9] & PER_CR9_EVENT_IFETCH) && get_per_in_range(env, addr)) {
 640         env->per_address = addr;
 641         env->per_perc_atmid = PER_CODE_EVENT_IFETCH | get_per_atmid(env);
 642
 643         /* If the instruction has to be nullified, trigger the
 644            exception immediately. */
 645         if (env->cregs[9] & PER_CR9_EVENT_NULLIFICATION) {
 646             CPUState *cs = CPU(s390_env_get_cpu(env));
 647
 648             env->int_pgm_code = PGM_PER;
 649             env->int_pgm_ilen = get_ilen(cpu_ldub_code(env, addr));
 650
 651             cs->exception_index = EXCP_PGM;
 652             cpu_loop_exit(cs);
 653         }
 654     }
 655 }
 656 #endif