gic: provide defines for v2/v3 targetlist sizes
[qemu/ar7.git] / include / hw / cpu / a9mpcore.h
blob5d67ca22c49024e39e331e7d44159540cba77848
1 /*
2 * Cortex-A9MPCore internal peripheral emulation.
4 * Copyright (c) 2009 CodeSourcery.
5 * Copyright (c) 2011 Linaro Limited.
6 * Written by Paul Brook, Peter Maydell.
8 * This code is licensed under the GPL.
9 */
10 #ifndef HW_CPU_A9MPCORE_H
11 #define HW_CPU_A9MPCORE_H
13 #include "hw/sysbus.h"
14 #include "hw/intc/arm_gic.h"
15 #include "hw/misc/a9scu.h"
16 #include "hw/timer/arm_mptimer.h"
17 #include "hw/timer/a9gtimer.h"
19 #define TYPE_A9MPCORE_PRIV "a9mpcore_priv"
20 #define A9MPCORE_PRIV(obj) \
21 OBJECT_CHECK(A9MPPrivState, (obj), TYPE_A9MPCORE_PRIV)
23 typedef struct A9MPPrivState {
24 /*< private >*/
25 SysBusDevice parent_obj;
26 /*< public >*/
28 uint32_t num_cpu;
29 MemoryRegion container;
30 uint32_t num_irq;
32 A9SCUState scu;
33 GICState gic;
34 A9GTimerState gtimer;
35 ARMMPTimerState mptimer;
36 ARMMPTimerState wdt;
37 } A9MPPrivState;
39 #endif