tests/fdc-test.c

   1 /*
   2  * Floppy test cases.
   3  *
   4  * Copyright (c) 2012 Kevin Wolf <kwolf@redhat.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include <stdint.h>
  26 #include <string.h>
  27 #include <stdio.h>
  28
  29 #include <glib.h>
  30
  31 #include "libqtest.h"
  32 #include "qemu-common.h"
  33
  34 #define TEST_IMAGE_SIZE 1440 * 1024
  35
  36 #define FLOPPY_BASE 0x3f0
  37 #define FLOPPY_IRQ 6
  38
  39 enum {
  40     reg_sra         = 0x0,
  41     reg_srb         = 0x1,
  42     reg_dor         = 0x2,
  43     reg_msr         = 0x4,
  44     reg_dsr         = 0x4,
  45     reg_fifo        = 0x5,
  46     reg_dir         = 0x7,
  47 };
  48
  49 enum {
  50     CMD_SENSE_INT           = 0x08,
  51     CMD_READ_ID             = 0x0a,
  52     CMD_SEEK                = 0x0f,
  53     CMD_VERIFY              = 0x16,
  54     CMD_READ                = 0xe6,
  55     CMD_RELATIVE_SEEK_OUT   = 0x8f,
  56     CMD_RELATIVE_SEEK_IN    = 0xcf,
  57 };
  58
  59 enum {
  60     BUSY    = 0x10,
  61     NONDMA  = 0x20,
  62     RQM     = 0x80,
  63     DIO     = 0x40,
  64
  65     DSKCHG  = 0x80,
  66 };
  67
  68 static char test_image[] = "/tmp/qtest.XXXXXX";
  69
  70 #define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
  71 #define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
  72
  73 static uint8_t base = 0x70;
  74
  75 enum {
  76     CMOS_FLOPPY     = 0x10,
  77 };
  78
  79 static void floppy_send(uint8_t byte)
  80 {
  81     uint8_t msr;
  82
  83     msr = inb(FLOPPY_BASE + reg_msr);
  84     assert_bit_set(msr, RQM);
  85     assert_bit_clear(msr, DIO);
  86
  87     outb(FLOPPY_BASE + reg_fifo, byte);
  88 }
  89
  90 static uint8_t floppy_recv(void)
  91 {
  92     uint8_t msr;
  93
  94     msr = inb(FLOPPY_BASE + reg_msr);
  95     assert_bit_set(msr, RQM | DIO);
  96
  97     return inb(FLOPPY_BASE + reg_fifo);
  98 }
  99
 100 /* pcn: Present Cylinder Number */
 101 static void ack_irq(uint8_t *pcn)
 102 {
 103     uint8_t ret;
 104
 105     g_assert(get_irq(FLOPPY_IRQ));
 106     floppy_send(CMD_SENSE_INT);
 107     floppy_recv();
 108
 109     ret = floppy_recv();
 110     if (pcn != NULL) {
 111         *pcn = ret;
 112     }
 113
 114     g_assert(!get_irq(FLOPPY_IRQ));
 115 }
 116
 117 static uint8_t send_read_command(uint8_t cmd)
 118 {
 119     uint8_t drive = 0;
 120     uint8_t head = 0;
 121     uint8_t cyl = 0;
 122     uint8_t sect_addr = 1;
 123     uint8_t sect_size = 2;
 124     uint8_t eot = 1;
 125     uint8_t gap = 0x1b;
 126     uint8_t gpl = 0xff;
 127
 128     uint8_t msr = 0;
 129     uint8_t st0;
 130
 131     uint8_t ret = 0;
 132
 133     floppy_send(cmd);
 134     floppy_send(head << 2 | drive);
 135     g_assert(!get_irq(FLOPPY_IRQ));
 136     floppy_send(cyl);
 137     floppy_send(head);
 138     floppy_send(sect_addr);
 139     floppy_send(sect_size);
 140     floppy_send(eot);
 141     floppy_send(gap);
 142     floppy_send(gpl);
 143
 144     uint8_t i = 0;
 145     uint8_t n = 2;
 146     for (; i < n; i++) {
 147         msr = inb(FLOPPY_BASE + reg_msr);
 148         if (msr == 0xd0) {
 149             break;
 150         }
 151         sleep(1);
 152     }
 153
 154     if (i >= n) {
 155         return 1;
 156     }
 157
 158     st0 = floppy_recv();
 159     if (st0 != 0x40) {
 160         ret = 1;
 161     }
 162
 163     floppy_recv();
 164     floppy_recv();
 165     floppy_recv();
 166     floppy_recv();
 167     floppy_recv();
 168     floppy_recv();
 169
 170     return ret;
 171 }
 172
 173 static uint8_t send_read_no_dma_command(int nb_sect, uint8_t expected_st0)
 174 {
 175     uint8_t drive = 0;
 176     uint8_t head = 0;
 177     uint8_t cyl = 0;
 178     uint8_t sect_addr = 1;
 179     uint8_t sect_size = 2;
 180     uint8_t eot = nb_sect;
 181     uint8_t gap = 0x1b;
 182     uint8_t gpl = 0xff;
 183
 184     uint8_t msr = 0;
 185     uint8_t st0;
 186
 187     uint8_t ret = 0;
 188
 189     floppy_send(CMD_READ);
 190     floppy_send(head << 2 | drive);
 191     g_assert(!get_irq(FLOPPY_IRQ));
 192     floppy_send(cyl);
 193     floppy_send(head);
 194     floppy_send(sect_addr);
 195     floppy_send(sect_size);
 196     floppy_send(eot);
 197     floppy_send(gap);
 198     floppy_send(gpl);
 199
 200     uint16_t i = 0;
 201     uint8_t n = 2;
 202     for (; i < n; i++) {
 203         msr = inb(FLOPPY_BASE + reg_msr);
 204         if (msr == (BUSY | NONDMA | DIO | RQM)) {
 205             break;
 206         }
 207         sleep(1);
 208     }
 209
 210     if (i >= n) {
 211         return 1;
 212     }
 213
 214     /* Non-DMA mode */
 215     for (i = 0; i < 512 * 2 * nb_sect; i++) {
 216         msr = inb(FLOPPY_BASE + reg_msr);
 217         assert_bit_set(msr, BUSY | RQM | DIO);
 218         inb(FLOPPY_BASE + reg_fifo);
 219     }
 220
 221     msr = inb(FLOPPY_BASE + reg_msr);
 222     assert_bit_set(msr, BUSY | RQM | DIO);
 223     g_assert(get_irq(FLOPPY_IRQ));
 224
 225     st0 = floppy_recv();
 226     if (st0 != expected_st0) {
 227         ret = 1;
 228     }
 229
 230     floppy_recv();
 231     floppy_recv();
 232     floppy_recv();
 233     floppy_recv();
 234     floppy_recv();
 235     g_assert(get_irq(FLOPPY_IRQ));
 236     floppy_recv();
 237
 238     /* Check that we're back in command phase */
 239     msr = inb(FLOPPY_BASE + reg_msr);
 240     assert_bit_clear(msr, BUSY | DIO);
 241     assert_bit_set(msr, RQM);
 242     g_assert(!get_irq(FLOPPY_IRQ));
 243
 244     return ret;
 245 }
 246
 247 static void send_seek(int cyl)
 248 {
 249     int drive = 0;
 250     int head = 0;
 251
 252     floppy_send(CMD_SEEK);
 253     floppy_send(head << 2 | drive);
 254     g_assert(!get_irq(FLOPPY_IRQ));
 255     floppy_send(cyl);
 256     ack_irq(NULL);
 257 }
 258
 259 static uint8_t cmos_read(uint8_t reg)
 260 {
 261     outb(base + 0, reg);
 262     return inb(base + 1);
 263 }
 264
 265 static void test_cmos(void)
 266 {
 267     uint8_t cmos;
 268
 269     cmos = cmos_read(CMOS_FLOPPY);
 270     g_assert(cmos == 0x40 || cmos == 0x50);
 271 }
 272
 273 static void test_no_media_on_start(void)
 274 {
 275     uint8_t dir;
 276
 277     /* Media changed bit must be set all time after start if there is
 278      * no media in drive. */
 279     dir = inb(FLOPPY_BASE + reg_dir);
 280     assert_bit_set(dir, DSKCHG);
 281     dir = inb(FLOPPY_BASE + reg_dir);
 282     assert_bit_set(dir, DSKCHG);
 283     send_seek(1);
 284     dir = inb(FLOPPY_BASE + reg_dir);
 285     assert_bit_set(dir, DSKCHG);
 286     dir = inb(FLOPPY_BASE + reg_dir);
 287     assert_bit_set(dir, DSKCHG);
 288 }
 289
 290 static void test_read_without_media(void)
 291 {
 292     uint8_t ret;
 293
 294     ret = send_read_command(CMD_READ);
 295     g_assert(ret == 0);
 296 }
 297
 298 static void test_media_insert(void)
 299 {
 300     uint8_t dir;
 301
 302     /* Insert media in drive. DSKCHK should not be reset until a step pulse
 303      * is sent. */
 304     qmp_discard_response("{'execute':'change', 'arguments':{"
 305                          " 'device':'floppy0', 'target': %s, 'arg': 'raw' }}",
 306                          test_image);
 307
 308     dir = inb(FLOPPY_BASE + reg_dir);
 309     assert_bit_set(dir, DSKCHG);
 310     dir = inb(FLOPPY_BASE + reg_dir);
 311     assert_bit_set(dir, DSKCHG);
 312
 313     send_seek(0);
 314     dir = inb(FLOPPY_BASE + reg_dir);
 315     assert_bit_set(dir, DSKCHG);
 316     dir = inb(FLOPPY_BASE + reg_dir);
 317     assert_bit_set(dir, DSKCHG);
 318
 319     /* Step to next track should clear DSKCHG bit. */
 320     send_seek(1);
 321     dir = inb(FLOPPY_BASE + reg_dir);
 322     assert_bit_clear(dir, DSKCHG);
 323     dir = inb(FLOPPY_BASE + reg_dir);
 324     assert_bit_clear(dir, DSKCHG);
 325 }
 326
 327 static void test_media_change(void)
 328 {
 329     uint8_t dir;
 330
 331     test_media_insert();
 332
 333     /* Eject the floppy and check that DSKCHG is set. Reading it out doesn't
 334      * reset the bit. */
 335     qmp_discard_response("{'execute':'eject', 'arguments':{"
 336                          " 'device':'floppy0' }}");
 337
 338     dir = inb(FLOPPY_BASE + reg_dir);
 339     assert_bit_set(dir, DSKCHG);
 340     dir = inb(FLOPPY_BASE + reg_dir);
 341     assert_bit_set(dir, DSKCHG);
 342
 343     send_seek(0);
 344     dir = inb(FLOPPY_BASE + reg_dir);
 345     assert_bit_set(dir, DSKCHG);
 346     dir = inb(FLOPPY_BASE + reg_dir);
 347     assert_bit_set(dir, DSKCHG);
 348
 349     send_seek(1);
 350     dir = inb(FLOPPY_BASE + reg_dir);
 351     assert_bit_set(dir, DSKCHG);
 352     dir = inb(FLOPPY_BASE + reg_dir);
 353     assert_bit_set(dir, DSKCHG);
 354 }
 355
 356 static void test_sense_interrupt(void)
 357 {
 358     int drive = 0;
 359     int head = 0;
 360     int cyl = 0;
 361     int ret = 0;
 362
 363     floppy_send(CMD_SENSE_INT);
 364     ret = floppy_recv();
 365     g_assert(ret == 0x80);
 366
 367     floppy_send(CMD_SEEK);
 368     floppy_send(head << 2 | drive);
 369     g_assert(!get_irq(FLOPPY_IRQ));
 370     floppy_send(cyl);
 371
 372     floppy_send(CMD_SENSE_INT);
 373     ret = floppy_recv();
 374     g_assert(ret == 0x20);
 375     floppy_recv();
 376 }
 377
 378 static void test_relative_seek(void)
 379 {
 380     uint8_t drive = 0;
 381     uint8_t head = 0;
 382     uint8_t cyl = 1;
 383     uint8_t pcn;
 384
 385     /* Send seek to track 0 */
 386     send_seek(0);
 387
 388     /* Send relative seek to increase track by 1 */
 389     floppy_send(CMD_RELATIVE_SEEK_IN);
 390     floppy_send(head << 2 | drive);
 391     g_assert(!get_irq(FLOPPY_IRQ));
 392     floppy_send(cyl);
 393
 394     ack_irq(&pcn);
 395     g_assert(pcn == 1);
 396
 397     /* Send relative seek to decrease track by 1 */
 398     floppy_send(CMD_RELATIVE_SEEK_OUT);
 399     floppy_send(head << 2 | drive);
 400     g_assert(!get_irq(FLOPPY_IRQ));
 401     floppy_send(cyl);
 402
 403     ack_irq(&pcn);
 404     g_assert(pcn == 0);
 405 }
 406
 407 static void test_read_id(void)
 408 {
 409     uint8_t drive = 0;
 410     uint8_t head = 0;
 411     uint8_t cyl;
 412     uint8_t st0;
 413     uint8_t msr;
 414
 415     /* Seek to track 0 and check with READ ID */
 416     send_seek(0);
 417
 418     floppy_send(CMD_READ_ID);
 419     g_assert(!get_irq(FLOPPY_IRQ));
 420     floppy_send(head << 2 | drive);
 421
 422     msr = inb(FLOPPY_BASE + reg_msr);
 423     if (!get_irq(FLOPPY_IRQ)) {
 424         assert_bit_set(msr, BUSY);
 425         assert_bit_clear(msr, RQM);
 426     }
 427
 428     while (!get_irq(FLOPPY_IRQ)) {
 429         /* qemu involves a timer with READ ID... */
 430         clock_step(1000000000LL / 50);
 431     }
 432
 433     msr = inb(FLOPPY_BASE + reg_msr);
 434     assert_bit_set(msr, BUSY | RQM | DIO);
 435
 436     st0 = floppy_recv();
 437     floppy_recv();
 438     floppy_recv();
 439     cyl = floppy_recv();
 440     head = floppy_recv();
 441     floppy_recv();
 442     g_assert(get_irq(FLOPPY_IRQ));
 443     floppy_recv();
 444     g_assert(!get_irq(FLOPPY_IRQ));
 445
 446     g_assert_cmpint(cyl, ==, 0);
 447     g_assert_cmpint(head, ==, 0);
 448     g_assert_cmpint(st0, ==, head << 2);
 449
 450     /* Seek to track 8 on head 1 and check with READ ID */
 451     head = 1;
 452     cyl = 8;
 453
 454     floppy_send(CMD_SEEK);
 455     floppy_send(head << 2 | drive);
 456     g_assert(!get_irq(FLOPPY_IRQ));
 457     floppy_send(cyl);
 458     g_assert(get_irq(FLOPPY_IRQ));
 459     ack_irq(NULL);
 460
 461     floppy_send(CMD_READ_ID);
 462     g_assert(!get_irq(FLOPPY_IRQ));
 463     floppy_send(head << 2 | drive);
 464
 465     msr = inb(FLOPPY_BASE + reg_msr);
 466     if (!get_irq(FLOPPY_IRQ)) {
 467         assert_bit_set(msr, BUSY);
 468         assert_bit_clear(msr, RQM);
 469     }
 470
 471     while (!get_irq(FLOPPY_IRQ)) {
 472         /* qemu involves a timer with READ ID... */
 473         clock_step(1000000000LL / 50);
 474     }
 475
 476     msr = inb(FLOPPY_BASE + reg_msr);
 477     assert_bit_set(msr, BUSY | RQM | DIO);
 478
 479     st0 = floppy_recv();
 480     floppy_recv();
 481     floppy_recv();
 482     cyl = floppy_recv();
 483     head = floppy_recv();
 484     floppy_recv();
 485     g_assert(get_irq(FLOPPY_IRQ));
 486     floppy_recv();
 487     g_assert(!get_irq(FLOPPY_IRQ));
 488
 489     g_assert_cmpint(cyl, ==, 8);
 490     g_assert_cmpint(head, ==, 1);
 491     g_assert_cmpint(st0, ==, head << 2);
 492 }
 493
 494 static void test_read_no_dma_1(void)
 495 {
 496     uint8_t ret;
 497
 498     outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
 499     send_seek(0);
 500     ret = send_read_no_dma_command(1, 0x04);
 501     g_assert(ret == 0);
 502 }
 503
 504 static void test_read_no_dma_18(void)
 505 {
 506     uint8_t ret;
 507
 508     outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
 509     send_seek(0);
 510     ret = send_read_no_dma_command(18, 0x04);
 511     g_assert(ret == 0);
 512 }
 513
 514 static void test_read_no_dma_19(void)
 515 {
 516     uint8_t ret;
 517
 518     outb(FLOPPY_BASE + reg_dor, inb(FLOPPY_BASE + reg_dor) & ~0x08);
 519     send_seek(0);
 520     ret = send_read_no_dma_command(19, 0x20);
 521     g_assert(ret == 0);
 522 }
 523
 524 static void test_verify(void)
 525 {
 526     uint8_t ret;
 527
 528     ret = send_read_command(CMD_VERIFY);
 529     g_assert(ret == 0);
 530 }
 531
 532 /* success if no crash or abort */
 533 static void fuzz_registers(void)
 534 {
 535     unsigned int i;
 536
 537     for (i = 0; i < 1000; i++) {
 538         uint8_t reg, val;
 539
 540         reg = (uint8_t)g_test_rand_int_range(0, 8);
 541         val = (uint8_t)g_test_rand_int_range(0, 256);
 542
 543         outb(FLOPPY_BASE + reg, val);
 544         inb(FLOPPY_BASE + reg);
 545     }
 546 }
 547
 548 int main(int argc, char **argv)
 549 {
 550     const char *arch = qtest_get_arch();
 551     int fd;
 552     int ret;
 553
 554     /* Check architecture */
 555     if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
 556         g_test_message("Skipping test for non-x86\n");
 557         return 0;
 558     }
 559
 560     /* Create a temporary raw image */
 561     fd = mkstemp(test_image);
 562     g_assert(fd >= 0);
 563     ret = ftruncate(fd, TEST_IMAGE_SIZE);
 564     g_assert(ret == 0);
 565     close(fd);
 566
 567     /* Run the tests */
 568     g_test_init(&argc, &argv, NULL);
 569
 570     qtest_start(NULL);
 571     qtest_irq_intercept_in(global_qtest, "ioapic");
 572     qtest_add_func("/fdc/cmos", test_cmos);
 573     qtest_add_func("/fdc/no_media_on_start", test_no_media_on_start);
 574     qtest_add_func("/fdc/read_without_media", test_read_without_media);
 575     qtest_add_func("/fdc/media_change", test_media_change);
 576     qtest_add_func("/fdc/sense_interrupt", test_sense_interrupt);
 577     qtest_add_func("/fdc/relative_seek", test_relative_seek);
 578     qtest_add_func("/fdc/read_id", test_read_id);
 579     qtest_add_func("/fdc/verify", test_verify);
 580     qtest_add_func("/fdc/media_insert", test_media_insert);
 581     qtest_add_func("/fdc/read_no_dma_1", test_read_no_dma_1);
 582     qtest_add_func("/fdc/read_no_dma_18", test_read_no_dma_18);
 583     qtest_add_func("/fdc/read_no_dma_19", test_read_no_dma_19);
 584     qtest_add_func("/fdc/fuzz-registers", fuzz_registers);
 585
 586     ret = g_test_run();
 587
 588     /* Cleanup */
 589     qtest_end();
 590     unlink(test_image);
 591
 592     return ret;
 593 }