2 * CRIS virtual CPU header
4 * Copyright (c) 2007 AXIS Communications AB
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
24 #include "qemu-common.h"
26 #define TARGET_LONG_BITS 32
28 #define CPUArchState struct CPUCRISState
30 #include "exec/cpu-defs.h"
32 #define ELF_MACHINE EM_CRIS
36 #define EXCP_BUSFAULT 3
40 /* CRIS-specific interrupt pending bits. */
41 #define CPU_INTERRUPT_NMI CPU_INTERRUPT_TGT_EXT_3
43 /* CRUS CPU device objects interrupt lines. */
44 #define CRIS_CPU_IRQ 0
45 #define CRIS_CPU_NMI 1
47 /* Register aliases. R0 - R15 */
52 /* Support regs, P0 - P15 */
60 #define PR_PREFIX 6 /* On CRISv10 P6 is reserved, we use it as prefix. */
73 #define Q_FLAG 0x80000000
74 #define M_FLAG_V32 0x40000000
75 #define PFIX_FLAG 0x800 /* CRISv10 Only. */
76 #define F_FLAG_V10 0x400
77 #define P_FLAG_V10 0x200
81 #define M_FLAG_V10 0x80
89 #define ALU_FLAGS 0x1F
91 /* Condition codes. */
109 #define NB_MMU_MODES 2
116 typedef struct CPUCRISState
{
118 /* P0 - P15 are referred to as special registers in the docs. */
121 /* Pseudo register for the PC. Not directly accessible on CRIS. */
124 /* Pseudo register for the kernel stack. */
132 /* Condition flag tracking. */
138 /* size of the operation, 1 = byte, 2 = word, 4 = dword. */
140 /* X flag at the time of cc snapshot. */
143 /* CRIS has certain insns that lockout interrupts. */
145 int interrupt_vector
;
149 /* FIXME: add a check in the translator to avoid writing to support
150 register sets beyond the 4th. The ISA allows up to 256! but in
151 practice there is no core that implements more than 4.
153 Support function registers are used to control units close to the
154 core. Accesses do not pass down the normal hierarchy.
156 uint32_t sregs
[4][16];
158 /* Linear feedback shift reg in the mmu. Used to provide pseudo
159 randomness for the 'hint' the mmu gives to sw for choosing valid
160 sets on TLB refills. */
161 uint32_t mmu_rand_lfsr
;
164 * We just store the stores to the tlbset here for later evaluation
165 * when the hw needs access to them.
167 * One for I and another for D.
169 TLBSet tlbsets
[2][4][16];
173 /* Members from load_info on are preserved across resets. */
179 CRISCPU
*cpu_cris_init(const char *cpu_model
);
180 int cpu_cris_exec(CPUState
*cpu
);
181 /* you can call this signal handler from your SIGBUS and SIGSEGV
182 signal handlers to inform the virtual CPU of exceptions. non zero
183 is returned if the signal was handled by the virtual CPU. */
184 int cpu_cris_signal_handler(int host_signum
, void *pinfo
,
187 void cris_initialize_tcg(void);
188 void cris_initialize_crisv10_tcg(void);
191 CC_OP_DYNAMIC
, /* Use env->cc_op */
218 /* CRIS uses 8k pages. */
219 #define TARGET_PAGE_BITS 13
220 #define MMAP_SHIFT TARGET_PAGE_BITS
222 #define TARGET_PHYS_ADDR_SPACE_BITS 32
223 #define TARGET_VIRT_ADDR_SPACE_BITS 32
225 #define cpu_init(cpu_model) CPU(cpu_cris_init(cpu_model))
227 #define cpu_exec cpu_cris_exec
228 #define cpu_gen_code cpu_cris_gen_code
229 #define cpu_signal_handler cpu_cris_signal_handler
231 /* MMU modes definitions */
232 #define MMU_MODE0_SUFFIX _kernel
233 #define MMU_MODE1_SUFFIX _user
234 #define MMU_USER_IDX 1
235 static inline int cpu_mmu_index (CPUCRISState
*env
, bool ifetch
)
237 return !!(env
->pregs
[PR_CCS
] & U_FLAG
);
240 int cris_cpu_handle_mmu_fault(CPUState
*cpu
, vaddr address
, int rw
,
243 /* Support function regs. */
244 #define SFR_RW_GC_CFG 0][0
245 #define SFR_RW_MM_CFG env->pregs[PR_SRS]][0
246 #define SFR_RW_MM_KBASE_LO env->pregs[PR_SRS]][1
247 #define SFR_RW_MM_KBASE_HI env->pregs[PR_SRS]][2
248 #define SFR_R_MM_CAUSE env->pregs[PR_SRS]][3
249 #define SFR_RW_MM_TLB_SEL env->pregs[PR_SRS]][4
250 #define SFR_RW_MM_TLB_LO env->pregs[PR_SRS]][5
251 #define SFR_RW_MM_TLB_HI env->pregs[PR_SRS]][6
253 #include "exec/cpu-all.h"
255 static inline void cpu_get_tb_cpu_state(CPUCRISState
*env
, target_ulong
*pc
,
256 target_ulong
*cs_base
, int *flags
)
260 *flags
= env
->dslot
|
261 (env
->pregs
[PR_CCS
] & (S_FLAG
| P_FLAG
| U_FLAG
262 | X_FLAG
| PFIX_FLAG
));
265 #define cpu_list cris_cpu_list
266 void cris_cpu_list(FILE *f
, fprintf_function cpu_fprintf
);
268 #include "exec/exec-all.h"