ati-vga: Implement DDC and EDID info from monitor
[qemu/ar7.git] / hw / timer / ds1338.c
blob30d2d21408a16842c247938dd96fa79fcde113b7
1 /*
2 * MAXIM DS1338 I2C RTC+NVRAM
4 * Copyright (c) 2009 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GNU GPL v2.
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
13 #include "qemu/osdep.h"
14 #include "qemu-common.h"
15 #include "hw/i2c/i2c.h"
16 #include "qemu/bcd.h"
17 #include "qemu/module.h"
19 /* Size of NVRAM including both the user-accessible area and the
20 * secondary register area.
22 #define NVRAM_SIZE 64
24 /* Flags definitions */
25 #define SECONDS_CH 0x80
26 #define HOURS_12 0x40
27 #define HOURS_PM 0x20
28 #define CTRL_OSF 0x20
30 #define TYPE_DS1338 "ds1338"
31 #define DS1338(obj) OBJECT_CHECK(DS1338State, (obj), TYPE_DS1338)
33 typedef struct DS1338State {
34 I2CSlave parent_obj;
36 int64_t offset;
37 uint8_t wday_offset;
38 uint8_t nvram[NVRAM_SIZE];
39 int32_t ptr;
40 bool addr_byte;
41 } DS1338State;
43 static const VMStateDescription vmstate_ds1338 = {
44 .name = "ds1338",
45 .version_id = 2,
46 .minimum_version_id = 1,
47 .fields = (VMStateField[]) {
48 VMSTATE_I2C_SLAVE(parent_obj, DS1338State),
49 VMSTATE_INT64(offset, DS1338State),
50 VMSTATE_UINT8_V(wday_offset, DS1338State, 2),
51 VMSTATE_UINT8_ARRAY(nvram, DS1338State, NVRAM_SIZE),
52 VMSTATE_INT32(ptr, DS1338State),
53 VMSTATE_BOOL(addr_byte, DS1338State),
54 VMSTATE_END_OF_LIST()
58 static void capture_current_time(DS1338State *s)
60 /* Capture the current time into the secondary registers
61 * which will be actually read by the data transfer operation.
63 struct tm now;
64 qemu_get_timedate(&now, s->offset);
65 s->nvram[0] = to_bcd(now.tm_sec);
66 s->nvram[1] = to_bcd(now.tm_min);
67 if (s->nvram[2] & HOURS_12) {
68 int tmp = now.tm_hour;
69 if (tmp % 12 == 0) {
70 tmp += 12;
72 if (tmp <= 12) {
73 s->nvram[2] = HOURS_12 | to_bcd(tmp);
74 } else {
75 s->nvram[2] = HOURS_12 | HOURS_PM | to_bcd(tmp - 12);
77 } else {
78 s->nvram[2] = to_bcd(now.tm_hour);
80 s->nvram[3] = (now.tm_wday + s->wday_offset) % 7 + 1;
81 s->nvram[4] = to_bcd(now.tm_mday);
82 s->nvram[5] = to_bcd(now.tm_mon + 1);
83 s->nvram[6] = to_bcd(now.tm_year - 100);
86 static void inc_regptr(DS1338State *s)
88 /* The register pointer wraps around after 0x3F; wraparound
89 * causes the current time/date to be retransferred into
90 * the secondary registers.
92 s->ptr = (s->ptr + 1) & (NVRAM_SIZE - 1);
93 if (!s->ptr) {
94 capture_current_time(s);
98 static int ds1338_event(I2CSlave *i2c, enum i2c_event event)
100 DS1338State *s = DS1338(i2c);
102 switch (event) {
103 case I2C_START_RECV:
104 /* In h/w, capture happens on any START condition, not just a
105 * START_RECV, but there is no need to actually capture on
106 * START_SEND, because the guest can't get at that data
107 * without going through a START_RECV which would overwrite it.
109 capture_current_time(s);
110 break;
111 case I2C_START_SEND:
112 s->addr_byte = true;
113 break;
114 default:
115 break;
118 return 0;
121 static uint8_t ds1338_recv(I2CSlave *i2c)
123 DS1338State *s = DS1338(i2c);
124 uint8_t res;
126 res = s->nvram[s->ptr];
127 inc_regptr(s);
128 return res;
131 static int ds1338_send(I2CSlave *i2c, uint8_t data)
133 DS1338State *s = DS1338(i2c);
135 if (s->addr_byte) {
136 s->ptr = data & (NVRAM_SIZE - 1);
137 s->addr_byte = false;
138 return 0;
140 if (s->ptr < 7) {
141 /* Time register. */
142 struct tm now;
143 qemu_get_timedate(&now, s->offset);
144 switch(s->ptr) {
145 case 0:
146 /* TODO: Implement CH (stop) bit. */
147 now.tm_sec = from_bcd(data & 0x7f);
148 break;
149 case 1:
150 now.tm_min = from_bcd(data & 0x7f);
151 break;
152 case 2:
153 if (data & HOURS_12) {
154 int tmp = from_bcd(data & (HOURS_PM - 1));
155 if (data & HOURS_PM) {
156 tmp += 12;
158 if (tmp % 12 == 0) {
159 tmp -= 12;
161 now.tm_hour = tmp;
162 } else {
163 now.tm_hour = from_bcd(data & (HOURS_12 - 1));
165 break;
166 case 3:
168 /* The day field is supposed to contain a value in
169 the range 1-7. Otherwise behavior is undefined.
171 int user_wday = (data & 7) - 1;
172 s->wday_offset = (user_wday - now.tm_wday + 7) % 7;
174 break;
175 case 4:
176 now.tm_mday = from_bcd(data & 0x3f);
177 break;
178 case 5:
179 now.tm_mon = from_bcd(data & 0x1f) - 1;
180 break;
181 case 6:
182 now.tm_year = from_bcd(data) + 100;
183 break;
185 s->offset = qemu_timedate_diff(&now);
186 } else if (s->ptr == 7) {
187 /* Control register. */
189 /* Ensure bits 2, 3 and 6 will read back as zero. */
190 data &= 0xB3;
192 /* Attempting to write the OSF flag to logic 1 leaves the
193 value unchanged. */
194 data = (data & ~CTRL_OSF) | (data & s->nvram[s->ptr] & CTRL_OSF);
196 s->nvram[s->ptr] = data;
197 } else {
198 s->nvram[s->ptr] = data;
200 inc_regptr(s);
201 return 0;
204 static void ds1338_reset(DeviceState *dev)
206 DS1338State *s = DS1338(dev);
208 /* The clock is running and synchronized with the host */
209 s->offset = 0;
210 s->wday_offset = 0;
211 memset(s->nvram, 0, NVRAM_SIZE);
212 s->ptr = 0;
213 s->addr_byte = false;
216 static void ds1338_class_init(ObjectClass *klass, void *data)
218 DeviceClass *dc = DEVICE_CLASS(klass);
219 I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
221 k->event = ds1338_event;
222 k->recv = ds1338_recv;
223 k->send = ds1338_send;
224 dc->reset = ds1338_reset;
225 dc->vmsd = &vmstate_ds1338;
228 static const TypeInfo ds1338_info = {
229 .name = TYPE_DS1338,
230 .parent = TYPE_I2C_SLAVE,
231 .instance_size = sizeof(DS1338State),
232 .class_init = ds1338_class_init,
235 static void ds1338_register_types(void)
237 type_register_static(&ds1338_info);
240 type_init(ds1338_register_types)