hw/intc/etraxfs_pic.c

   1 /*
   2  * QEMU ETRAX Interrupt Controller.
   3  *
   4  * Copyright (c) 2008 Edgar E. Iglesias, Axis Communications AB.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include "qemu/osdep.h"
  26 #include "hw/sysbus.h"
  27 #include "qemu/module.h"
  28 #include "hw/hw.h"
  29 //#include "pc.h"
  30 //#include "etraxfs.h"
  31
  32 #define D(x)
  33
  34 #define R_RW_MASK   0
  35 #define R_R_VECT    1
  36 #define R_R_MASKED_VECT 2
  37 #define R_R_NMI     3
  38 #define R_R_GURU    4
  39 #define R_MAX       5
  40
  41 #define TYPE_ETRAX_FS_PIC "etraxfs,pic"
  42 #define ETRAX_FS_PIC(obj) \
  43     OBJECT_CHECK(struct etrax_pic, (obj), TYPE_ETRAX_FS_PIC)
  44
  45 struct etrax_pic
  46 {
  47     SysBusDevice parent_obj;
  48
  49     MemoryRegion mmio;
  50     void *interrupt_vector;
  51     qemu_irq parent_irq;
  52     qemu_irq parent_nmi;
  53     uint32_t regs[R_MAX];
  54 };
  55
  56 static void pic_update(struct etrax_pic *fs)
  57 {
  58     uint32_t vector = 0;
  59     int i;
  60
  61     fs->regs[R_R_MASKED_VECT] = fs->regs[R_R_VECT] & fs->regs[R_RW_MASK];
  62
  63     /* The ETRAX interrupt controller signals interrupts to the core
  64        through an interrupt request wire and an irq vector bus. If
  65        multiple interrupts are simultaneously active it chooses vector
  66        0x30 and lets the sw choose the priorities.  */
  67     if (fs->regs[R_R_MASKED_VECT]) {
  68         uint32_t mv = fs->regs[R_R_MASKED_VECT];
  69         for (i = 0; i < 31; i++) {
  70             if (mv & 1) {
  71                 vector = 0x31 + i;
  72                 /* Check for multiple interrupts.  */
  73                 if (mv > 1)
  74                     vector = 0x30;
  75                 break;
  76             }
  77             mv >>= 1;
  78         }
  79     }
  80
  81     if (fs->interrupt_vector) {
  82         /* hack alert: ptr property */
  83         *(uint32_t*)(fs->interrupt_vector) = vector;
  84     }
  85     qemu_set_irq(fs->parent_irq, !!vector);
  86 }
  87
  88 static uint64_t
  89 pic_read(void *opaque, hwaddr addr, unsigned int size)
  90 {
  91     struct etrax_pic *fs = opaque;
  92     uint32_t rval;
  93
  94     rval = fs->regs[addr >> 2];
  95     D(printf("%s %x=%x\n", __func__, addr, rval));
  96     return rval;
  97 }
  98
  99 static void pic_write(void *opaque, hwaddr addr,
 100                       uint64_t value, unsigned int size)
 101 {
 102     struct etrax_pic *fs = opaque;
 103     D(printf("%s addr=%x val=%x\n", __func__, addr, value));
 104
 105     if (addr == R_RW_MASK) {
 106         fs->regs[R_RW_MASK] = value;
 107         pic_update(fs);
 108     }
 109 }
 110
 111 static const MemoryRegionOps pic_ops = {
 112     .read = pic_read,
 113     .write = pic_write,
 114     .endianness = DEVICE_NATIVE_ENDIAN,
 115     .valid = {
 116         .min_access_size = 4,
 117         .max_access_size = 4
 118     }
 119 };
 120
 121 static void nmi_handler(void *opaque, int irq, int level)
 122 {
 123     struct etrax_pic *fs = (void *)opaque;
 124     uint32_t mask;
 125
 126     mask = 1 << irq;
 127     if (level)
 128         fs->regs[R_R_NMI] |= mask;
 129     else
 130         fs->regs[R_R_NMI] &= ~mask;
 131
 132     qemu_set_irq(fs->parent_nmi, !!fs->regs[R_R_NMI]);
 133 }
 134
 135 static void irq_handler(void *opaque, int irq, int level)
 136 {
 137     struct etrax_pic *fs = (void *)opaque;
 138
 139     if (irq >= 30) {
 140         nmi_handler(opaque, irq, level);
 141         return;
 142     }
 143
 144     irq -= 1;
 145     fs->regs[R_R_VECT] &= ~(1 << irq);
 146     fs->regs[R_R_VECT] |= (!!level << irq);
 147     pic_update(fs);
 148 }
 149
 150 static void etraxfs_pic_init(Object *obj)
 151 {
 152     DeviceState *dev = DEVICE(obj);
 153     struct etrax_pic *s = ETRAX_FS_PIC(obj);
 154     SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
 155
 156     qdev_init_gpio_in(dev, irq_handler, 32);
 157     sysbus_init_irq(sbd, &s->parent_irq);
 158     sysbus_init_irq(sbd, &s->parent_nmi);
 159
 160     memory_region_init_io(&s->mmio, obj, &pic_ops, s,
 161                           "etraxfs-pic", R_MAX * 4);
 162     sysbus_init_mmio(sbd, &s->mmio);
 163 }
 164
 165 static Property etraxfs_pic_properties[] = {
 166     DEFINE_PROP_PTR("interrupt_vector", struct etrax_pic, interrupt_vector),
 167     DEFINE_PROP_END_OF_LIST(),
 168 };
 169
 170 static void etraxfs_pic_class_init(ObjectClass *klass, void *data)
 171 {
 172     DeviceClass *dc = DEVICE_CLASS(klass);
 173
 174     dc->props = etraxfs_pic_properties;
 175     /*
 176      * Note: pointer property "interrupt_vector" may remain null, thus
 177      * no need for dc->user_creatable = false;
 178      */
 179 }
 180
 181 static const TypeInfo etraxfs_pic_info = {
 182     .name          = TYPE_ETRAX_FS_PIC,
 183     .parent        = TYPE_SYS_BUS_DEVICE,
 184     .instance_size = sizeof(struct etrax_pic),
 185     .instance_init = etraxfs_pic_init,
 186     .class_init    = etraxfs_pic_class_init,
 187 };
 188
 189 static void etraxfs_pic_register_types(void)
 190 {
 191     type_register_static(&etraxfs_pic_info);
 192 }
 193
 194 type_init(etraxfs_pic_register_types)