2 * Arm PrimeCell PL110 Color LCD Controller
4 * Copyright (c) 2005-2009 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the GNU LGPL
10 #include "qemu/osdep.h"
11 #include "hw/sysbus.h"
12 #include "ui/console.h"
13 #include "framebuffer.h"
14 #include "ui/pixel_ops.h"
15 #include "qemu/timer.h"
17 #include "qemu/module.h"
19 #define PL110_CR_EN 0x001
20 #define PL110_CR_BGR 0x100
21 #define PL110_CR_BEBO 0x200
22 #define PL110_CR_BEPO 0x400
23 #define PL110_CR_PWR 0x800
24 #define PL110_IE_NB 0x004
25 #define PL110_IE_VC 0x008
35 BPP_16_565
, /* PL111 only */
36 BPP_12
/* PL111 only */
40 /* The Versatile/PB uses a slightly modified PL110 controller. */
48 #define TYPE_PL110 "pl110"
49 #define PL110(obj) OBJECT_CHECK(PL110State, (obj), TYPE_PL110)
51 typedef struct PL110State
{
52 SysBusDevice parent_obj
;
55 MemoryRegionSection fbsection
;
57 QEMUTimer
*vblank_timer
;
68 enum pl110_bppmode bpp
;
71 uint32_t palette
[256];
72 uint32_t raw_palette
[128];
76 static int vmstate_pl110_post_load(void *opaque
, int version_id
);
78 static const VMStateDescription vmstate_pl110
= {
81 .minimum_version_id
= 1,
82 .post_load
= vmstate_pl110_post_load
,
83 .fields
= (VMStateField
[]) {
84 VMSTATE_INT32(version
, PL110State
),
85 VMSTATE_UINT32_ARRAY(timing
, PL110State
, 4),
86 VMSTATE_UINT32(cr
, PL110State
),
87 VMSTATE_UINT32(upbase
, PL110State
),
88 VMSTATE_UINT32(lpbase
, PL110State
),
89 VMSTATE_UINT32(int_status
, PL110State
),
90 VMSTATE_UINT32(int_mask
, PL110State
),
91 VMSTATE_INT32(cols
, PL110State
),
92 VMSTATE_INT32(rows
, PL110State
),
93 VMSTATE_UINT32(bpp
, PL110State
),
94 VMSTATE_INT32(invalidate
, PL110State
),
95 VMSTATE_UINT32_ARRAY(palette
, PL110State
, 256),
96 VMSTATE_UINT32_ARRAY(raw_palette
, PL110State
, 128),
97 VMSTATE_UINT32_V(mux_ctrl
, PL110State
, 2),
102 static const unsigned char pl110_id
[] =
103 { 0x10, 0x11, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
105 static const unsigned char pl111_id
[] = {
106 0x11, 0x11, 0x24, 0x00, 0x0d, 0xf0, 0x05, 0xb1
110 /* Indexed by pl110_version */
111 static const unsigned char *idregs
[] = {
113 /* The ARM documentation (DDI0224C) says the CLCDC on the Versatile board
114 * has a different ID (0x93, 0x10, 0x04, 0x00, ...). However the hardware
115 * itself has the same ID values as a stock PL110, and guests (in
116 * particular Linux) rely on this. We emulate what the hardware does,
117 * rather than what the docs claim it ought to do.
124 #include "pl110_template.h"
126 #include "pl110_template.h"
128 #include "pl110_template.h"
130 #include "pl110_template.h"
132 #include "pl110_template.h"
134 static int pl110_enabled(PL110State
*s
)
136 return (s
->cr
& PL110_CR_EN
) && (s
->cr
& PL110_CR_PWR
);
139 static void pl110_update_display(void *opaque
)
141 PL110State
*s
= (PL110State
*)opaque
;
143 DisplaySurface
*surface
= qemu_console_surface(s
->con
);
152 if (!pl110_enabled(s
)) {
156 sbd
= SYS_BUS_DEVICE(s
);
158 switch (surface_bits_per_pixel(surface
)) {
162 fntable
= pl110_draw_fn_8
;
166 fntable
= pl110_draw_fn_15
;
170 fntable
= pl110_draw_fn_16
;
174 fntable
= pl110_draw_fn_24
;
178 fntable
= pl110_draw_fn_32
;
182 fprintf(stderr
, "pl110: Bad color depth\n");
185 if (s
->cr
& PL110_CR_BGR
)
190 if ((s
->version
!= PL111
) && (s
->bpp
== BPP_16
)) {
191 /* The PL110's native 16 bit mode is 5551; however
192 * most boards with a PL110 implement an external
193 * mux which allows bits to be reshuffled to give
194 * 565 format. The mux is typically controlled by
195 * an external system register.
196 * This is controlled by a GPIO input pin
197 * so boards can wire it up to their register.
199 * The PL111 straightforwardly implements both
200 * 5551 and 565 under control of the bpp field
201 * in the LCDControl register.
203 switch (s
->mux_ctrl
) {
204 case 3: /* 565 BGR */
205 bpp_offset
= (BPP_16_565
- BPP_16
);
209 case 0: /* 888; also if we have loaded vmstate from an old version */
210 case 2: /* 565 RGB */
212 /* treat as 565 but honour BGR bit */
213 bpp_offset
+= (BPP_16_565
- BPP_16
);
218 if (s
->cr
& PL110_CR_BEBO
)
219 fn
= fntable
[s
->bpp
+ 8 + bpp_offset
];
220 else if (s
->cr
& PL110_CR_BEPO
)
221 fn
= fntable
[s
->bpp
+ 16 + bpp_offset
];
223 fn
= fntable
[s
->bpp
+ bpp_offset
];
247 dest_width
*= s
->cols
;
250 framebuffer_update_memory_section(&s
->fbsection
,
251 sysbus_address_space(sbd
),
256 framebuffer_update_display(surface
, &s
->fbsection
,
258 src_width
, dest_width
, 0,
264 dpy_gfx_update(s
->con
, 0, first
, s
->cols
, last
- first
+ 1);
269 static void pl110_invalidate_display(void * opaque
)
271 PL110State
*s
= (PL110State
*)opaque
;
273 if (pl110_enabled(s
)) {
274 qemu_console_resize(s
->con
, s
->cols
, s
->rows
);
278 static void pl110_update_palette(PL110State
*s
, int n
)
280 DisplaySurface
*surface
= qemu_console_surface(s
->con
);
283 unsigned int r
, g
, b
;
285 raw
= s
->raw_palette
[n
];
287 for (i
= 0; i
< 2; i
++) {
288 r
= (raw
& 0x1f) << 3;
290 g
= (raw
& 0x1f) << 3;
292 b
= (raw
& 0x1f) << 3;
293 /* The I bit is ignored. */
295 switch (surface_bits_per_pixel(surface
)) {
297 s
->palette
[n
] = rgb_to_pixel8(r
, g
, b
);
300 s
->palette
[n
] = rgb_to_pixel15(r
, g
, b
);
303 s
->palette
[n
] = rgb_to_pixel16(r
, g
, b
);
307 s
->palette
[n
] = rgb_to_pixel32(r
, g
, b
);
314 static void pl110_resize(PL110State
*s
, int width
, int height
)
316 if (width
!= s
->cols
|| height
!= s
->rows
) {
317 if (pl110_enabled(s
)) {
318 qemu_console_resize(s
->con
, width
, height
);
325 /* Update interrupts. */
326 static void pl110_update(PL110State
*s
)
328 /* Raise IRQ if enabled and any status bit is 1 */
329 if (s
->int_status
& s
->int_mask
) {
330 qemu_irq_raise(s
->irq
);
332 qemu_irq_lower(s
->irq
);
336 static void pl110_vblank_interrupt(void *opaque
)
338 PL110State
*s
= opaque
;
340 /* Fire the vertical compare and next base IRQs and re-arm */
341 s
->int_status
|= (PL110_IE_NB
| PL110_IE_VC
);
342 timer_mod(s
->vblank_timer
,
343 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) +
344 NANOSECONDS_PER_SECOND
/ 60);
348 static uint64_t pl110_read(void *opaque
, hwaddr offset
,
351 PL110State
*s
= (PL110State
*)opaque
;
353 if (offset
>= 0xfe0 && offset
< 0x1000) {
354 return idregs
[s
->version
][(offset
- 0xfe0) >> 2];
356 if (offset
>= 0x200 && offset
< 0x400) {
357 return s
->raw_palette
[(offset
- 0x200) >> 2];
359 switch (offset
>> 2) {
360 case 0: /* LCDTiming0 */
362 case 1: /* LCDTiming1 */
364 case 2: /* LCDTiming2 */
366 case 3: /* LCDTiming3 */
368 case 4: /* LCDUPBASE */
370 case 5: /* LCDLPBASE */
372 case 6: /* LCDIMSC */
373 if (s
->version
!= PL110
) {
377 case 7: /* LCDControl */
378 if (s
->version
!= PL110
) {
383 return s
->int_status
;
385 return s
->int_status
& s
->int_mask
;
386 case 11: /* LCDUPCURR */
387 /* TODO: Implement vertical refresh. */
389 case 12: /* LCDLPCURR */
392 qemu_log_mask(LOG_GUEST_ERROR
,
393 "pl110_read: Bad offset %x\n", (int)offset
);
398 static void pl110_write(void *opaque
, hwaddr offset
,
399 uint64_t val
, unsigned size
)
401 PL110State
*s
= (PL110State
*)opaque
;
404 /* For simplicity invalidate the display whenever a control register
407 if (offset
>= 0x200 && offset
< 0x400) {
409 n
= (offset
- 0x200) >> 2;
410 s
->raw_palette
[(offset
- 0x200) >> 2] = val
;
411 pl110_update_palette(s
, n
);
414 switch (offset
>> 2) {
415 case 0: /* LCDTiming0 */
417 n
= ((val
& 0xfc) + 4) * 4;
418 pl110_resize(s
, n
, s
->rows
);
420 case 1: /* LCDTiming1 */
422 n
= (val
& 0x3ff) + 1;
423 pl110_resize(s
, s
->cols
, n
);
425 case 2: /* LCDTiming2 */
428 case 3: /* LCDTiming3 */
431 case 4: /* LCDUPBASE */
434 case 5: /* LCDLPBASE */
437 case 6: /* LCDIMSC */
438 if (s
->version
!= PL110
) {
445 case 7: /* LCDControl */
446 if (s
->version
!= PL110
) {
451 s
->bpp
= (val
>> 1) & 7;
452 if (pl110_enabled(s
)) {
453 qemu_console_resize(s
->con
, s
->cols
, s
->rows
);
454 timer_mod(s
->vblank_timer
,
455 qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL
) +
456 NANOSECONDS_PER_SECOND
/ 60);
458 timer_del(s
->vblank_timer
);
461 case 10: /* LCDICR */
462 s
->int_status
&= ~val
;
466 qemu_log_mask(LOG_GUEST_ERROR
,
467 "pl110_write: Bad offset %x\n", (int)offset
);
471 static const MemoryRegionOps pl110_ops
= {
473 .write
= pl110_write
,
474 .endianness
= DEVICE_NATIVE_ENDIAN
,
477 static void pl110_mux_ctrl_set(void *opaque
, int line
, int level
)
479 PL110State
*s
= (PL110State
*)opaque
;
483 static int vmstate_pl110_post_load(void *opaque
, int version_id
)
485 PL110State
*s
= opaque
;
486 /* Make sure we redraw, and at the right size */
487 pl110_invalidate_display(s
);
491 static const GraphicHwOps pl110_gfx_ops
= {
492 .invalidate
= pl110_invalidate_display
,
493 .gfx_update
= pl110_update_display
,
496 static void pl110_realize(DeviceState
*dev
, Error
**errp
)
498 PL110State
*s
= PL110(dev
);
499 SysBusDevice
*sbd
= SYS_BUS_DEVICE(dev
);
501 memory_region_init_io(&s
->iomem
, OBJECT(s
), &pl110_ops
, s
, "pl110", 0x1000);
502 sysbus_init_mmio(sbd
, &s
->iomem
);
503 sysbus_init_irq(sbd
, &s
->irq
);
504 s
->vblank_timer
= timer_new_ns(QEMU_CLOCK_VIRTUAL
,
505 pl110_vblank_interrupt
, s
);
506 qdev_init_gpio_in(dev
, pl110_mux_ctrl_set
, 1);
507 s
->con
= graphic_console_init(dev
, 0, &pl110_gfx_ops
, s
);
510 static void pl110_init(Object
*obj
)
512 PL110State
*s
= PL110(obj
);
517 static void pl110_versatile_init(Object
*obj
)
519 PL110State
*s
= PL110(obj
);
521 s
->version
= PL110_VERSATILE
;
524 static void pl111_init(Object
*obj
)
526 PL110State
*s
= PL110(obj
);
531 static void pl110_class_init(ObjectClass
*klass
, void *data
)
533 DeviceClass
*dc
= DEVICE_CLASS(klass
);
535 set_bit(DEVICE_CATEGORY_DISPLAY
, dc
->categories
);
536 dc
->vmsd
= &vmstate_pl110
;
537 dc
->realize
= pl110_realize
;
540 static const TypeInfo pl110_info
= {
542 .parent
= TYPE_SYS_BUS_DEVICE
,
543 .instance_size
= sizeof(PL110State
),
544 .instance_init
= pl110_init
,
545 .class_init
= pl110_class_init
,
548 static const TypeInfo pl110_versatile_info
= {
549 .name
= "pl110_versatile",
550 .parent
= TYPE_PL110
,
551 .instance_init
= pl110_versatile_init
,
554 static const TypeInfo pl111_info
= {
556 .parent
= TYPE_PL110
,
557 .instance_init
= pl111_init
,
560 static void pl110_register_types(void)
562 type_register_static(&pl110_info
);
563 type_register_static(&pl110_versatile_info
);
564 type_register_static(&pl111_info
);
567 type_init(pl110_register_types
)