hw/arm/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qapi/error.h"
  15 #include "hw/arm/pxa.h"
  16 #include "hw/arm/boot.h"
  17 #include "sysemu/runstate.h"
  18 #include "sysemu/sysemu.h"
  19 #include "hw/pcmcia.h"
  20 #include "hw/qdev-properties.h"
  21 #include "hw/i2c/i2c.h"
  22 #include "hw/irq.h"
  23 #include "hw/ssi/ssi.h"
  24 #include "hw/block/flash.h"
  25 #include "qemu/timer.h"
  26 #include "hw/arm/sharpsl.h"
  27 #include "ui/console.h"
  28 #include "hw/audio/wm8750.h"
  29 #include "audio/audio.h"
  30 #include "hw/boards.h"
  31 #include "hw/sysbus.h"
  32 #include "migration/vmstate.h"
  33 #include "exec/address-spaces.h"
  34 #include "cpu.h"
  35
  36 #undef REG_FMT
  37 #define REG_FMT                 "0x%02lx"
  38
  39 /* Spitz Flash */
  40 #define FLASH_BASE              0x0c000000
  41 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  42 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  43 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  44 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  45 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  46 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  47 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  48
  49 #define FLASHCTL_CE0            (1 << 0)
  50 #define FLASHCTL_CLE            (1 << 1)
  51 #define FLASHCTL_ALE            (1 << 2)
  52 #define FLASHCTL_WP             (1 << 3)
  53 #define FLASHCTL_CE1            (1 << 4)
  54 #define FLASHCTL_RYBY           (1 << 5)
  55 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  56
  57 #define TYPE_SL_NAND "sl-nand"
  58 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  59
  60 typedef struct {
  61     SysBusDevice parent_obj;
  62
  63     MemoryRegion iomem;
  64     DeviceState *nand;
  65     uint8_t ctl;
  66     uint8_t manf_id;
  67     uint8_t chip_id;
  68     ECCState ecc;
  69 } SLNANDState;
  70
  71 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
  72 {
  73     SLNANDState *s = (SLNANDState *) opaque;
  74     int ryby;
  75
  76     switch (addr) {
  77 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
  78     case FLASH_ECCLPLB:
  79         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
  80                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
  81
  82 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
  83     case FLASH_ECCLPUB:
  84         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
  85                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
  86
  87     case FLASH_ECCCP:
  88         return s->ecc.cp;
  89
  90     case FLASH_ECCCNTR:
  91         return s->ecc.count & 0xff;
  92
  93     case FLASH_FLASHCTL:
  94         nand_getpins(s->nand, &ryby);
  95         if (ryby)
  96             return s->ctl | FLASHCTL_RYBY;
  97         else
  98             return s->ctl;
  99
 100     case FLASH_FLASHIO:
 101         if (size == 4) {
 102             return ecc_digest(&s->ecc, nand_getio(s->nand)) |
 103                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
 104         }
 105         return ecc_digest(&s->ecc, nand_getio(s->nand));
 106
 107     default:
 108         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 109     }
 110     return 0;
 111 }
 112
 113 static void sl_write(void *opaque, hwaddr addr,
 114                      uint64_t value, unsigned size)
 115 {
 116     SLNANDState *s = (SLNANDState *) opaque;
 117
 118     switch (addr) {
 119     case FLASH_ECCCLRR:
 120         /* Value is ignored.  */
 121         ecc_reset(&s->ecc);
 122         break;
 123
 124     case FLASH_FLASHCTL:
 125         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 126         nand_setpins(s->nand,
 127                         s->ctl & FLASHCTL_CLE,
 128                         s->ctl & FLASHCTL_ALE,
 129                         s->ctl & FLASHCTL_NCE,
 130                         s->ctl & FLASHCTL_WP,
 131                         0);
 132         break;
 133
 134     case FLASH_FLASHIO:
 135         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 136         break;
 137
 138     default:
 139         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 140     }
 141 }
 142
 143 enum {
 144     FLASH_128M,
 145     FLASH_1024M,
 146 };
 147
 148 static const MemoryRegionOps sl_ops = {
 149     .read = sl_read,
 150     .write = sl_write,
 151     .endianness = DEVICE_NATIVE_ENDIAN,
 152 };
 153
 154 static void sl_flash_register(PXA2xxState *cpu, int size)
 155 {
 156     DeviceState *dev;
 157
 158     dev = qdev_create(NULL, TYPE_SL_NAND);
 159
 160     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 161     if (size == FLASH_128M)
 162         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 163     else if (size == FLASH_1024M)
 164         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 165
 166     qdev_init_nofail(dev);
 167     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 168 }
 169
 170 static void sl_nand_init(Object *obj)
 171 {
 172     SLNANDState *s = SL_NAND(obj);
 173     SysBusDevice *dev = SYS_BUS_DEVICE(obj);
 174
 175     s->ctl = 0;
 176
 177     memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
 178     sysbus_init_mmio(dev, &s->iomem);
 179 }
 180
 181 static void sl_nand_realize(DeviceState *dev, Error **errp)
 182 {
 183     SLNANDState *s = SL_NAND(dev);
 184     DriveInfo *nand;
 185
 186     /* FIXME use a qdev drive property instead of drive_get() */
 187     nand = drive_get(IF_MTD, 0, 0);
 188     s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
 189                         s->manf_id, s->chip_id);
 190 }
 191
 192 /* Spitz Keyboard */
 193
 194 #define SPITZ_KEY_STROBE_NUM    11
 195 #define SPITZ_KEY_SENSE_NUM     7
 196
 197 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 198     12, 17, 91, 34, 36, 38, 39
 199 };
 200
 201 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 202     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 203 };
 204
 205 /* Eighth additional row maps the special keys */
 206 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 207     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 208     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 209     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 210     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 211     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 212     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 213     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 214     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 215 };
 216
 217 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 218 #define SPITZ_GPIO_SYNC         16      /* Sync button */
 219 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 220 #define SPITZ_GPIO_SWA          97      /* Lid */
 221 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 222
 223 /* The special buttons are mapped to unused keys */
 224 static const int spitz_gpiomap[5] = {
 225     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 226     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 227 };
 228
 229 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
 230 #define SPITZ_KEYBOARD(obj) \
 231     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 232
 233 typedef struct {
 234     SysBusDevice parent_obj;
 235
 236     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 237     qemu_irq gpiomap[5];
 238     int keymap[0x80];
 239     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 240     uint16_t strobe_state;
 241     uint16_t sense_state;
 242
 243     uint16_t pre_map[0x100];
 244     uint16_t modifiers;
 245     uint16_t imodifiers;
 246     uint8_t fifo[16];
 247     int fifopos, fifolen;
 248     QEMUTimer *kbdtimer;
 249 } SpitzKeyboardState;
 250
 251 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 252 {
 253     int i;
 254     uint16_t strobe, sense = 0;
 255     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 256         strobe = s->keyrow[i] & s->strobe_state;
 257         if (strobe) {
 258             sense |= 1 << i;
 259             if (!(s->sense_state & (1 << i)))
 260                 qemu_irq_raise(s->sense[i]);
 261         } else if (s->sense_state & (1 << i))
 262             qemu_irq_lower(s->sense[i]);
 263     }
 264
 265     s->sense_state = sense;
 266 }
 267
 268 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 269 {
 270     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 271
 272     if (level)
 273         s->strobe_state |= 1 << line;
 274     else
 275         s->strobe_state &= ~(1 << line);
 276     spitz_keyboard_sense_update(s);
 277 }
 278
 279 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 280 {
 281     int spitz_keycode = s->keymap[keycode & 0x7f];
 282     if (spitz_keycode == -1)
 283         return;
 284
 285     /* Handle the additional keys */
 286     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 287         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 288         return;
 289     }
 290
 291     if (keycode & 0x80)
 292         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 293     else
 294         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 295
 296     spitz_keyboard_sense_update(s);
 297 }
 298
 299 #define SPITZ_MOD_SHIFT   (1 << 7)
 300 #define SPITZ_MOD_CTRL    (1 << 8)
 301 #define SPITZ_MOD_FN      (1 << 9)
 302
 303 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 304
 305 static void spitz_keyboard_handler(void *opaque, int keycode)
 306 {
 307     SpitzKeyboardState *s = opaque;
 308     uint16_t code;
 309     int mapcode;
 310     switch (keycode) {
 311     case 0x2a:  /* Left Shift */
 312         s->modifiers |= 1;
 313         break;
 314     case 0xaa:
 315         s->modifiers &= ~1;
 316         break;
 317     case 0x36:  /* Right Shift */
 318         s->modifiers |= 2;
 319         break;
 320     case 0xb6:
 321         s->modifiers &= ~2;
 322         break;
 323     case 0x1d:  /* Control */
 324         s->modifiers |= 4;
 325         break;
 326     case 0x9d:
 327         s->modifiers &= ~4;
 328         break;
 329     case 0x38:  /* Alt */
 330         s->modifiers |= 8;
 331         break;
 332     case 0xb8:
 333         s->modifiers &= ~8;
 334         break;
 335     }
 336
 337     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 338             (keycode | SPITZ_MOD_SHIFT) :
 339             (keycode & ~SPITZ_MOD_SHIFT))];
 340
 341     if (code != mapcode) {
 342 #if 0
 343         if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
 344             QUEUE_KEY(0x2a | (keycode & 0x80));
 345         }
 346         if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
 347             QUEUE_KEY(0x1d | (keycode & 0x80));
 348         }
 349         if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
 350             QUEUE_KEY(0x38 | (keycode & 0x80));
 351         }
 352         if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
 353             QUEUE_KEY(0x2a | (~keycode & 0x80));
 354         }
 355         if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
 356             QUEUE_KEY(0x36 | (~keycode & 0x80));
 357         }
 358 #else
 359         if (keycode & 0x80) {
 360             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 361                 QUEUE_KEY(0x2a | 0x80);
 362             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 363                 QUEUE_KEY(0x1d | 0x80);
 364             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 365                 QUEUE_KEY(0x38 | 0x80);
 366             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 367                 QUEUE_KEY(0x2a);
 368             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 369                 QUEUE_KEY(0x36);
 370             s->imodifiers = 0;
 371         } else {
 372             if ((code & SPITZ_MOD_SHIFT) &&
 373                 !((s->modifiers | s->imodifiers) & 1)) {
 374                 QUEUE_KEY(0x2a);
 375                 s->imodifiers |= 1;
 376             }
 377             if ((code & SPITZ_MOD_CTRL) &&
 378                 !((s->modifiers | s->imodifiers) & 4)) {
 379                 QUEUE_KEY(0x1d);
 380                 s->imodifiers |= 4;
 381             }
 382             if ((code & SPITZ_MOD_FN) &&
 383                 !((s->modifiers | s->imodifiers) & 8)) {
 384                 QUEUE_KEY(0x38);
 385                 s->imodifiers |= 8;
 386             }
 387             if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
 388                             !(s->imodifiers & 0x10)) {
 389                 QUEUE_KEY(0x2a | 0x80);
 390                 s->imodifiers |= 0x10;
 391             }
 392             if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
 393                             !(s->imodifiers & 0x20)) {
 394                 QUEUE_KEY(0x36 | 0x80);
 395                 s->imodifiers |= 0x20;
 396             }
 397         }
 398 #endif
 399     }
 400
 401     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 402 }
 403
 404 static void spitz_keyboard_tick(void *opaque)
 405 {
 406     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 407
 408     if (s->fifolen) {
 409         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 410         s->fifolen --;
 411         if (s->fifopos >= 16)
 412             s->fifopos = 0;
 413     }
 414
 415     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
 416                    NANOSECONDS_PER_SECOND / 32);
 417 }
 418
 419 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 420 {
 421     int i;
 422     for (i = 0; i < 0x100; i ++)
 423         s->pre_map[i] = i;
 424     s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
 425     s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
 426     s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
 427     s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
 428     s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
 429     s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
 430     s->pre_map[0x28]                   = 0x08 | SPITZ_MOD_SHIFT; /* ' */
 431     s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
 432     s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
 433     s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
 434     s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
 435     s->pre_map[0xd3]                   = 0x0e | SPITZ_MOD_FN;    /* Delete */
 436     s->pre_map[0x3a]                   = 0x0f | SPITZ_MOD_FN;    /* Caps_Lock */
 437     s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;    /* ^ */
 438     s->pre_map[0x0d]                   = 0x12 | SPITZ_MOD_FN;    /* equal */
 439     s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;    /* plus */
 440     s->pre_map[0x1a]                   = 0x14 | SPITZ_MOD_FN;    /* [ */
 441     s->pre_map[0x1b]                   = 0x15 | SPITZ_MOD_FN;    /* ] */
 442     s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;    /* { */
 443     s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;    /* } */
 444     s->pre_map[0x27]                   = 0x22 | SPITZ_MOD_FN;    /* semicolon */
 445     s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;    /* colon */
 446     s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;    /* asterisk */
 447     s->pre_map[0x2b]                   = 0x25 | SPITZ_MOD_FN;    /* backslash */
 448     s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;    /* bar */
 449     s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;    /* _ */
 450     s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;    /* less */
 451     s->pre_map[0x35]                   = 0x33 | SPITZ_MOD_SHIFT; /* slash */
 452     s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;    /* greater */
 453     s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
 454     s->pre_map[0x49]                   = 0x48 | SPITZ_MOD_FN;    /* Page_Up */
 455     s->pre_map[0x51]                   = 0x50 | SPITZ_MOD_FN;    /* Page_Down */
 456
 457     s->modifiers = 0;
 458     s->imodifiers = 0;
 459     s->fifopos = 0;
 460     s->fifolen = 0;
 461 }
 462
 463 #undef SPITZ_MOD_SHIFT
 464 #undef SPITZ_MOD_CTRL
 465 #undef SPITZ_MOD_FN
 466
 467 static int spitz_keyboard_post_load(void *opaque, int version_id)
 468 {
 469     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 470
 471     /* Release all pressed keys */
 472     memset(s->keyrow, 0, sizeof(s->keyrow));
 473     spitz_keyboard_sense_update(s);
 474     s->modifiers = 0;
 475     s->imodifiers = 0;
 476     s->fifopos = 0;
 477     s->fifolen = 0;
 478
 479     return 0;
 480 }
 481
 482 static void spitz_keyboard_register(PXA2xxState *cpu)
 483 {
 484     int i;
 485     DeviceState *dev;
 486     SpitzKeyboardState *s;
 487
 488     dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
 489     s = SPITZ_KEYBOARD(dev);
 490
 491     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 492         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 493
 494     for (i = 0; i < 5; i ++)
 495         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 496
 497     if (!graphic_rotate)
 498         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 499
 500     for (i = 0; i < 5; i++)
 501         qemu_set_irq(s->gpiomap[i], 0);
 502
 503     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 504         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 505                 qdev_get_gpio_in(dev, i));
 506
 507     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 508
 509     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 510 }
 511
 512 static void spitz_keyboard_init(Object *obj)
 513 {
 514     DeviceState *dev = DEVICE(obj);
 515     SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
 516     int i, j;
 517
 518     for (i = 0; i < 0x80; i ++)
 519         s->keymap[i] = -1;
 520     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 521         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 522             if (spitz_keymap[i][j] != -1)
 523                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 524
 525     spitz_keyboard_pre_map(s);
 526
 527     s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
 528     qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 529     qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
 530 }
 531
 532 /* LCD backlight controller */
 533
 534 #define LCDTG_RESCTL    0x00
 535 #define LCDTG_PHACTRL   0x01
 536 #define LCDTG_DUTYCTRL  0x02
 537 #define LCDTG_POWERREG0 0x03
 538 #define LCDTG_POWERREG1 0x04
 539 #define LCDTG_GPOR3     0x05
 540 #define LCDTG_PICTRL    0x06
 541 #define LCDTG_POLCTRL   0x07
 542
 543 typedef struct {
 544     SSISlave ssidev;
 545     uint32_t bl_intensity;
 546     uint32_t bl_power;
 547 } SpitzLCDTG;
 548
 549 static void spitz_bl_update(SpitzLCDTG *s)
 550 {
 551     if (s->bl_power && s->bl_intensity)
 552         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 553     else
 554         zaurus_printf("LCD Backlight now off\n");
 555 }
 556
 557 /* FIXME: Implement GPIO properly and remove this hack.  */
 558 static SpitzLCDTG *spitz_lcdtg;
 559
 560 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 561 {
 562     SpitzLCDTG *s = spitz_lcdtg;
 563     int prev = s->bl_intensity;
 564
 565     if (level)
 566         s->bl_intensity &= ~0x20;
 567     else
 568         s->bl_intensity |= 0x20;
 569
 570     if (s->bl_power && prev != s->bl_intensity)
 571         spitz_bl_update(s);
 572 }
 573
 574 static inline void spitz_bl_power(void *opaque, int line, int level)
 575 {
 576     SpitzLCDTG *s = spitz_lcdtg;
 577     s->bl_power = !!level;
 578     spitz_bl_update(s);
 579 }
 580
 581 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 582 {
 583     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 584     int addr;
 585     addr = value >> 5;
 586     value &= 0x1f;
 587
 588     switch (addr) {
 589     case LCDTG_RESCTL:
 590         if (value)
 591             zaurus_printf("LCD in QVGA mode\n");
 592         else
 593             zaurus_printf("LCD in VGA mode\n");
 594         break;
 595
 596     case LCDTG_DUTYCTRL:
 597         s->bl_intensity &= ~0x1f;
 598         s->bl_intensity |= value;
 599         if (s->bl_power)
 600             spitz_bl_update(s);
 601         break;
 602
 603     case LCDTG_POWERREG0:
 604         /* Set common voltage to M62332FP */
 605         break;
 606     }
 607     return 0;
 608 }
 609
 610 static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
 611 {
 612     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 613
 614     spitz_lcdtg = s;
 615     s->bl_power = 0;
 616     s->bl_intensity = 0x20;
 617 }
 618
 619 /* SSP devices */
 620
 621 #define CORGI_SSP_PORT          2
 622
 623 #define SPITZ_GPIO_LCDCON_CS    53
 624 #define SPITZ_GPIO_ADS7846_CS   14
 625 #define SPITZ_GPIO_MAX1111_CS   20
 626 #define SPITZ_GPIO_TP_INT       11
 627
 628 static DeviceState *max1111;
 629
 630 /* "Demux" the signal based on current chipselect */
 631 typedef struct {
 632     SSISlave ssidev;
 633     SSIBus *bus[3];
 634     uint32_t enable[3];
 635 } CorgiSSPState;
 636
 637 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 638 {
 639     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 640     int i;
 641
 642     for (i = 0; i < 3; i++) {
 643         if (s->enable[i]) {
 644             return ssi_transfer(s->bus[i], value);
 645         }
 646     }
 647     return 0;
 648 }
 649
 650 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 651 {
 652     CorgiSSPState *s = (CorgiSSPState *)opaque;
 653     assert(line >= 0 && line < 3);
 654     s->enable[line] = !level;
 655 }
 656
 657 #define MAX1111_BATT_VOLT       1
 658 #define MAX1111_BATT_TEMP       2
 659 #define MAX1111_ACIN_VOLT       3
 660
 661 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 662 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 663 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 664
 665 static void spitz_adc_temp_on(void *opaque, int line, int level)
 666 {
 667     if (!max1111)
 668         return;
 669
 670     if (level)
 671         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 672     else
 673         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 674 }
 675
 676 static void corgi_ssp_realize(SSISlave *d, Error **errp)
 677 {
 678     DeviceState *dev = DEVICE(d);
 679     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
 680
 681     qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
 682     s->bus[0] = ssi_create_bus(dev, "ssi0");
 683     s->bus[1] = ssi_create_bus(dev, "ssi1");
 684     s->bus[2] = ssi_create_bus(dev, "ssi2");
 685 }
 686
 687 static void spitz_ssp_attach(PXA2xxState *cpu)
 688 {
 689     DeviceState *mux;
 690     DeviceState *dev;
 691     void *bus;
 692
 693     mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 694
 695     bus = qdev_get_child_bus(mux, "ssi0");
 696     ssi_create_slave(bus, "spitz-lcdtg");
 697
 698     bus = qdev_get_child_bus(mux, "ssi1");
 699     dev = ssi_create_slave(bus, "ads7846");
 700     qdev_connect_gpio_out(dev, 0,
 701                           qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
 702
 703     bus = qdev_get_child_bus(mux, "ssi2");
 704     max1111 = ssi_create_slave(bus, "max1111");
 705     max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
 706     max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 707     max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
 708
 709     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
 710                         qdev_get_gpio_in(mux, 0));
 711     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
 712                         qdev_get_gpio_in(mux, 1));
 713     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
 714                         qdev_get_gpio_in(mux, 2));
 715 }
 716
 717 /* CF Microdrive */
 718
 719 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 720 {
 721     PCMCIACardState *md;
 722     DriveInfo *dinfo;
 723
 724     dinfo = drive_get(IF_IDE, 0, 0);
 725     if (!dinfo || dinfo->media_cd)
 726         return;
 727     md = dscm1xxxx_init(dinfo);
 728     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 729 }
 730
 731 /* Wm8750 and Max7310 on I2C */
 732
 733 #define AKITA_MAX_ADDR  0x18
 734 #define SPITZ_WM_ADDRL  0x1b
 735 #define SPITZ_WM_ADDRH  0x1a
 736
 737 #define SPITZ_GPIO_WM   5
 738
 739 static void spitz_wm8750_addr(void *opaque, int line, int level)
 740 {
 741     I2CSlave *wm = (I2CSlave *) opaque;
 742     if (level)
 743         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 744     else
 745         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 746 }
 747
 748 static void spitz_i2c_setup(PXA2xxState *cpu)
 749 {
 750     /* Attach the CPU on one end of our I2C bus.  */
 751     I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 752
 753     DeviceState *wm;
 754
 755     /* Attach a WM8750 to the bus */
 756     wm = i2c_create_slave(bus, TYPE_WM8750, 0);
 757
 758     spitz_wm8750_addr(wm, 0, 0);
 759     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 760                           qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
 761     /* .. and to the sound interface.  */
 762     cpu->i2s->opaque = wm;
 763     cpu->i2s->codec_out = wm8750_dac_dat;
 764     cpu->i2s->codec_in = wm8750_adc_dat;
 765     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 766 }
 767
 768 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 769 {
 770     /* Attach a Max7310 to Akita I2C bus.  */
 771     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 772                      AKITA_MAX_ADDR);
 773 }
 774
 775 /* Other peripherals */
 776
 777 static void spitz_out_switch(void *opaque, int line, int level)
 778 {
 779     switch (line) {
 780     case 0:
 781         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 782         break;
 783     case 1:
 784         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 785         break;
 786     case 2:
 787         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 788         break;
 789     case 3:
 790         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 791         break;
 792     case 4:
 793         spitz_bl_bit5(opaque, line, level);
 794         break;
 795     case 5:
 796         spitz_bl_power(opaque, line, level);
 797         break;
 798     case 6:
 799         spitz_adc_temp_on(opaque, line, level);
 800         break;
 801     }
 802 }
 803
 804 #define SPITZ_SCP_LED_GREEN             1
 805 #define SPITZ_SCP_JK_B                  2
 806 #define SPITZ_SCP_CHRG_ON               3
 807 #define SPITZ_SCP_MUTE_L                4
 808 #define SPITZ_SCP_MUTE_R                5
 809 #define SPITZ_SCP_CF_POWER              6
 810 #define SPITZ_SCP_LED_ORANGE            7
 811 #define SPITZ_SCP_JK_A                  8
 812 #define SPITZ_SCP_ADC_TEMP_ON           9
 813 #define SPITZ_SCP2_IR_ON                1
 814 #define SPITZ_SCP2_AKIN_PULLUP          2
 815 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 816 #define SPITZ_SCP2_BACKLIGHT_ON         8
 817 #define SPITZ_SCP2_MIC_BIAS             9
 818
 819 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
 820                 DeviceState *scp0, DeviceState *scp1)
 821 {
 822     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
 823
 824     qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 825     qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
 826     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 827     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 828
 829     if (scp1) {
 830         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
 831         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
 832     }
 833
 834     qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 835 }
 836
 837 #define SPITZ_GPIO_HSYNC                22
 838 #define SPITZ_GPIO_SD_DETECT            9
 839 #define SPITZ_GPIO_SD_WP                81
 840 #define SPITZ_GPIO_ON_RESET             89
 841 #define SPITZ_GPIO_BAT_COVER            90
 842 #define SPITZ_GPIO_CF1_IRQ              105
 843 #define SPITZ_GPIO_CF1_CD               94
 844 #define SPITZ_GPIO_CF2_IRQ              106
 845 #define SPITZ_GPIO_CF2_CD               93
 846
 847 static int spitz_hsync;
 848
 849 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 850 {
 851     PXA2xxState *cpu = (PXA2xxState *) opaque;
 852     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 853     spitz_hsync ^= 1;
 854 }
 855
 856 static void spitz_reset(void *opaque, int line, int level)
 857 {
 858     if (level) {
 859         qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 860     }
 861 }
 862
 863 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 864 {
 865     qemu_irq lcd_hsync;
 866     qemu_irq reset;
 867
 868     /*
 869      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 870      * read to satisfy broken guests that poll-wait for hsync.
 871      * Simulating a real hsync event would be less practical and
 872      * wouldn't guarantee that a guest ever exits the loop.
 873      */
 874     spitz_hsync = 0;
 875     lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
 876     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 877     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 878
 879     /* MMC/SD host */
 880     pxa2xx_mmci_handlers(cpu->mmc,
 881                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 882                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 883
 884     /* Battery lock always closed */
 885     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 886
 887     /* Handle reset */
 888     reset = qemu_allocate_irq(spitz_reset, cpu, 0);
 889     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
 890
 891     /* PCMCIA signals: card's IRQ and Card-Detect */
 892     if (slots >= 1)
 893         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 894                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 895                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 896     if (slots >= 2)
 897         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 898                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 899                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 900 }
 901
 902 /* Board init.  */
 903 enum spitz_model_e { spitz, akita, borzoi, terrier };
 904
 905 #define SPITZ_RAM       0x04000000
 906 #define SPITZ_ROM       0x00800000
 907
 908 static struct arm_boot_info spitz_binfo = {
 909     .loader_start = PXA2XX_SDRAM_BASE,
 910     .ram_size = 0x04000000,
 911 };
 912
 913 static void spitz_common_init(MachineState *machine,
 914                               enum spitz_model_e model, int arm_id)
 915 {
 916     PXA2xxState *mpu;
 917     DeviceState *scp0, *scp1 = NULL;
 918     MemoryRegion *address_space_mem = get_system_memory();
 919     MemoryRegion *rom = g_new(MemoryRegion, 1);
 920
 921     /* Setup CPU & memory */
 922     mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
 923                       machine->cpu_type);
 924
 925     sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 926
 927     memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
 928     memory_region_set_readonly(rom, true);
 929     memory_region_add_subregion(address_space_mem, 0, rom);
 930
 931     /* Setup peripherals */
 932     spitz_keyboard_register(mpu);
 933
 934     spitz_ssp_attach(mpu);
 935
 936     scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
 937     if (model != akita) {
 938         scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
 939     }
 940
 941     spitz_scoop_gpio_setup(mpu, scp0, scp1);
 942
 943     spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
 944
 945     spitz_i2c_setup(mpu);
 946
 947     if (model == akita)
 948         spitz_akita_i2c_setup(mpu);
 949
 950     if (model == terrier)
 951         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 952         spitz_microdrive_attach(mpu, 1);
 953     else if (model != akita)
 954         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 955         spitz_microdrive_attach(mpu, 0);
 956
 957     spitz_binfo.board_id = arm_id;
 958     arm_load_kernel(mpu->cpu, machine, &spitz_binfo);
 959     sl_bootparam_write(SL_PXA_PARAM_BASE);
 960 }
 961
 962 static void spitz_init(MachineState *machine)
 963 {
 964     spitz_common_init(machine, spitz, 0x2c9);
 965 }
 966
 967 static void borzoi_init(MachineState *machine)
 968 {
 969     spitz_common_init(machine, borzoi, 0x33f);
 970 }
 971
 972 static void akita_init(MachineState *machine)
 973 {
 974     spitz_common_init(machine, akita, 0x2e8);
 975 }
 976
 977 static void terrier_init(MachineState *machine)
 978 {
 979     spitz_common_init(machine, terrier, 0x33f);
 980 }
 981
 982 static void akitapda_class_init(ObjectClass *oc, void *data)
 983 {
 984     MachineClass *mc = MACHINE_CLASS(oc);
 985
 986     mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
 987     mc->init = akita_init;
 988     mc->ignore_memory_transaction_failures = true;
 989     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
 990 }
 991
 992 static const TypeInfo akitapda_type = {
 993     .name = MACHINE_TYPE_NAME("akita"),
 994     .parent = TYPE_MACHINE,
 995     .class_init = akitapda_class_init,
 996 };
 997
 998 static void spitzpda_class_init(ObjectClass *oc, void *data)
 999 {
1000     MachineClass *mc = MACHINE_CLASS(oc);
1001
1002     mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
1003     mc->init = spitz_init;
1004     mc->block_default_type = IF_IDE;
1005     mc->ignore_memory_transaction_failures = true;
1006     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1007 }
1008
1009 static const TypeInfo spitzpda_type = {
1010     .name = MACHINE_TYPE_NAME("spitz"),
1011     .parent = TYPE_MACHINE,
1012     .class_init = spitzpda_class_init,
1013 };
1014
1015 static void borzoipda_class_init(ObjectClass *oc, void *data)
1016 {
1017     MachineClass *mc = MACHINE_CLASS(oc);
1018
1019     mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
1020     mc->init = borzoi_init;
1021     mc->block_default_type = IF_IDE;
1022     mc->ignore_memory_transaction_failures = true;
1023     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
1024 }
1025
1026 static const TypeInfo borzoipda_type = {
1027     .name = MACHINE_TYPE_NAME("borzoi"),
1028     .parent = TYPE_MACHINE,
1029     .class_init = borzoipda_class_init,
1030 };
1031
1032 static void terrierpda_class_init(ObjectClass *oc, void *data)
1033 {
1034     MachineClass *mc = MACHINE_CLASS(oc);
1035
1036     mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
1037     mc->init = terrier_init;
1038     mc->block_default_type = IF_IDE;
1039     mc->ignore_memory_transaction_failures = true;
1040     mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
1041 }
1042
1043 static const TypeInfo terrierpda_type = {
1044     .name = MACHINE_TYPE_NAME("terrier"),
1045     .parent = TYPE_MACHINE,
1046     .class_init = terrierpda_class_init,
1047 };
1048
1049 static void spitz_machine_init(void)
1050 {
1051     type_register_static(&akitapda_type);
1052     type_register_static(&spitzpda_type);
1053     type_register_static(&borzoipda_type);
1054     type_register_static(&terrierpda_type);
1055 }
1056
1057 type_init(spitz_machine_init)
1058
1059 static bool is_version_0(void *opaque, int version_id)
1060 {
1061     return version_id == 0;
1062 }
1063
1064 static VMStateDescription vmstate_sl_nand_info = {
1065     .name = "sl-nand",
1066     .version_id = 0,
1067     .minimum_version_id = 0,
1068     .fields = (VMStateField[]) {
1069         VMSTATE_UINT8(ctl, SLNANDState),
1070         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1071         VMSTATE_END_OF_LIST(),
1072     },
1073 };
1074
1075 static Property sl_nand_properties[] = {
1076     DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1077     DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1078     DEFINE_PROP_END_OF_LIST(),
1079 };
1080
1081 static void sl_nand_class_init(ObjectClass *klass, void *data)
1082 {
1083     DeviceClass *dc = DEVICE_CLASS(klass);
1084
1085     dc->vmsd = &vmstate_sl_nand_info;
1086     device_class_set_props(dc, sl_nand_properties);
1087     dc->realize = sl_nand_realize;
1088     /* Reason: init() method uses drive_get() */
1089     dc->user_creatable = false;
1090 }
1091
1092 static const TypeInfo sl_nand_info = {
1093     .name          = TYPE_SL_NAND,
1094     .parent        = TYPE_SYS_BUS_DEVICE,
1095     .instance_size = sizeof(SLNANDState),
1096     .instance_init = sl_nand_init,
1097     .class_init    = sl_nand_class_init,
1098 };
1099
1100 static VMStateDescription vmstate_spitz_kbd = {
1101     .name = "spitz-keyboard",
1102     .version_id = 1,
1103     .minimum_version_id = 0,
1104     .post_load = spitz_keyboard_post_load,
1105     .fields = (VMStateField[]) {
1106         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1107         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1108         VMSTATE_UNUSED_TEST(is_version_0, 5),
1109         VMSTATE_END_OF_LIST(),
1110     },
1111 };
1112
1113 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1114 {
1115     DeviceClass *dc = DEVICE_CLASS(klass);
1116
1117     dc->vmsd = &vmstate_spitz_kbd;
1118 }
1119
1120 static const TypeInfo spitz_keyboard_info = {
1121     .name          = TYPE_SPITZ_KEYBOARD,
1122     .parent        = TYPE_SYS_BUS_DEVICE,
1123     .instance_size = sizeof(SpitzKeyboardState),
1124     .instance_init = spitz_keyboard_init,
1125     .class_init    = spitz_keyboard_class_init,
1126 };
1127
1128 static const VMStateDescription vmstate_corgi_ssp_regs = {
1129     .name = "corgi-ssp",
1130     .version_id = 2,
1131     .minimum_version_id = 2,
1132     .fields = (VMStateField[]) {
1133         VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1134         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1135         VMSTATE_END_OF_LIST(),
1136     }
1137 };
1138
1139 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1140 {
1141     DeviceClass *dc = DEVICE_CLASS(klass);
1142     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1143
1144     k->realize = corgi_ssp_realize;
1145     k->transfer = corgi_ssp_transfer;
1146     dc->vmsd = &vmstate_corgi_ssp_regs;
1147 }
1148
1149 static const TypeInfo corgi_ssp_info = {
1150     .name          = "corgi-ssp",
1151     .parent        = TYPE_SSI_SLAVE,
1152     .instance_size = sizeof(CorgiSSPState),
1153     .class_init    = corgi_ssp_class_init,
1154 };
1155
1156 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1157     .name = "spitz-lcdtg",
1158     .version_id = 1,
1159     .minimum_version_id = 1,
1160     .fields = (VMStateField[]) {
1161         VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1162         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1163         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1164         VMSTATE_END_OF_LIST(),
1165     }
1166 };
1167
1168 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1169 {
1170     DeviceClass *dc = DEVICE_CLASS(klass);
1171     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1172
1173     k->realize = spitz_lcdtg_realize;
1174     k->transfer = spitz_lcdtg_transfer;
1175     dc->vmsd = &vmstate_spitz_lcdtg_regs;
1176 }
1177
1178 static const TypeInfo spitz_lcdtg_info = {
1179     .name          = "spitz-lcdtg",
1180     .parent        = TYPE_SSI_SLAVE,
1181     .instance_size = sizeof(SpitzLCDTG),
1182     .class_init    = spitz_lcdtg_class_init,
1183 };
1184
1185 static void spitz_register_types(void)
1186 {
1187     type_register_static(&corgi_ssp_info);
1188     type_register_static(&spitz_lcdtg_info);
1189     type_register_static(&spitz_keyboard_info);
1190     type_register_static(&sl_nand_info);
1191 }
1192
1193 type_init(spitz_register_types)