hw/pci-bridge/pci_bridge_dev.c

   1 /*
   2  * Standard PCI Bridge Device
   3  *
   4  * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com>
   5  *
   6  * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License along
  19  * with this program; if not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "hw/pci/pci_bridge.h"
  23 #include "hw/pci/pci_ids.h"
  24 #include "hw/pci/msi.h"
  25 #include "hw/pci/shpc.h"
  26 #include "hw/pci/slotid_cap.h"
  27 #include "exec/memory.h"
  28 #include "hw/pci/pci_bus.h"
  29 #include "hw/hotplug.h"
  30
  31 #define TYPE_PCI_BRIDGE_DEV      "pci-bridge"
  32 #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat"
  33 #define PCI_BRIDGE_DEV(obj) \
  34     OBJECT_CHECK(PCIBridgeDev, (obj), TYPE_PCI_BRIDGE_DEV)
  35
  36 struct PCIBridgeDev {
  37     /*< private >*/
  38     PCIBridge parent_obj;
  39     /*< public >*/
  40
  41     MemoryRegion bar;
  42     uint8_t chassis_nr;
  43 #define PCI_BRIDGE_DEV_F_MSI_REQ 0
  44 #define PCI_BRIDGE_DEV_F_SHPC_REQ 1
  45     uint32_t flags;
  46 };
  47 typedef struct PCIBridgeDev PCIBridgeDev;
  48
  49 static int pci_bridge_dev_initfn(PCIDevice *dev)
  50 {
  51     PCIBridge *br = PCI_BRIDGE(dev);
  52     PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
  53     int err;
  54
  55     err = pci_bridge_initfn(dev, TYPE_PCI_BUS);
  56     if (err) {
  57         goto bridge_error;
  58     }
  59     if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) {
  60         dev->config[PCI_INTERRUPT_PIN] = 0x1;
  61         memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar",
  62                            shpc_bar_size(dev));
  63         err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0);
  64         if (err) {
  65             goto shpc_error;
  66         }
  67     } else {
  68         /* MSI is not applicable without SHPC */
  69         bridge_dev->flags &= ~(1 << PCI_BRIDGE_DEV_F_MSI_REQ);
  70     }
  71     err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0);
  72     if (err) {
  73         goto slotid_error;
  74     }
  75     if ((bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_MSI_REQ)) &&
  76         msi_supported) {
  77         err = msi_init(dev, 0, 1, true, true);
  78         if (err < 0) {
  79             goto msi_error;
  80         }
  81     }
  82     if (shpc_present(dev)) {
  83         /* TODO: spec recommends using 64 bit prefetcheable BAR.
  84          * Check whether that works well. */
  85         pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
  86                          PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar);
  87     }
  88     return 0;
  89 msi_error:
  90     slotid_cap_cleanup(dev);
  91 slotid_error:
  92     if (shpc_present(dev)) {
  93         shpc_cleanup(dev, &bridge_dev->bar);
  94     }
  95 shpc_error:
  96     pci_bridge_exitfn(dev);
  97 bridge_error:
  98     return err;
  99 }
 100
 101 static void pci_bridge_dev_exitfn(PCIDevice *dev)
 102 {
 103     PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
 104     if (msi_present(dev)) {
 105         msi_uninit(dev);
 106     }
 107     slotid_cap_cleanup(dev);
 108     if (shpc_present(dev)) {
 109         shpc_cleanup(dev, &bridge_dev->bar);
 110     }
 111     pci_bridge_exitfn(dev);
 112 }
 113
 114 static void pci_bridge_dev_instance_finalize(Object *obj)
 115 {
 116     /* this function is idempotent and handles (PCIDevice.shpc == NULL) */
 117     shpc_free(PCI_DEVICE(obj));
 118 }
 119
 120 static void pci_bridge_dev_write_config(PCIDevice *d,
 121                                         uint32_t address, uint32_t val, int len)
 122 {
 123     pci_bridge_write_config(d, address, val, len);
 124     if (msi_present(d)) {
 125         msi_write_config(d, address, val, len);
 126     }
 127     if (shpc_present(d)) {
 128         shpc_cap_write_config(d, address, val, len);
 129     }
 130 }
 131
 132 static void qdev_pci_bridge_dev_reset(DeviceState *qdev)
 133 {
 134     PCIDevice *dev = PCI_DEVICE(qdev);
 135
 136     pci_bridge_reset(qdev);
 137     if (shpc_present(dev)) {
 138         shpc_reset(dev);
 139     }
 140 }
 141
 142 static Property pci_bridge_dev_properties[] = {
 143                     /* Note: 0 is not a legal chassis number. */
 144     DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr,
 145                       0),
 146     DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, flags,
 147                     PCI_BRIDGE_DEV_F_MSI_REQ, true),
 148     DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags,
 149                     PCI_BRIDGE_DEV_F_SHPC_REQ, true),
 150     DEFINE_PROP_END_OF_LIST(),
 151 };
 152
 153 static bool pci_device_shpc_present(void *opaque, int version_id)
 154 {
 155     PCIDevice *dev = opaque;
 156
 157     return shpc_present(dev);
 158 }
 159
 160 static const VMStateDescription pci_bridge_dev_vmstate = {
 161     .name = "pci_bridge",
 162     .fields = (VMStateField[]) {
 163         VMSTATE_PCI_DEVICE(parent_obj, PCIBridge),
 164         SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present),
 165         VMSTATE_END_OF_LIST()
 166     }
 167 };
 168
 169 static void pci_bridge_dev_hotplug_cb(HotplugHandler *hotplug_dev,
 170                                       DeviceState *dev, Error **errp)
 171 {
 172     PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
 173
 174     if (!shpc_present(pci_hotplug_dev)) {
 175         error_setg(errp, "standard hotplug controller has been disabled for "
 176                    "this %s", TYPE_PCI_BRIDGE_DEV);
 177         return;
 178     }
 179     shpc_device_hotplug_cb(hotplug_dev, dev, errp);
 180 }
 181
 182 static void pci_bridge_dev_hot_unplug_request_cb(HotplugHandler *hotplug_dev,
 183                                                  DeviceState *dev,
 184                                                  Error **errp)
 185 {
 186     PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
 187
 188     if (!shpc_present(pci_hotplug_dev)) {
 189         error_setg(errp, "standard hotplug controller has been disabled for "
 190                    "this %s", TYPE_PCI_BRIDGE_DEV);
 191         return;
 192     }
 193     shpc_device_hot_unplug_request_cb(hotplug_dev, dev, errp);
 194 }
 195
 196 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data)
 197 {
 198     DeviceClass *dc = DEVICE_CLASS(klass);
 199     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 200     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
 201
 202     k->init = pci_bridge_dev_initfn;
 203     k->exit = pci_bridge_dev_exitfn;
 204     k->config_write = pci_bridge_dev_write_config;
 205     k->vendor_id = PCI_VENDOR_ID_REDHAT;
 206     k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE;
 207     k->class_id = PCI_CLASS_BRIDGE_PCI;
 208     k->is_bridge = 1,
 209     dc->desc = "Standard PCI Bridge";
 210     dc->reset = qdev_pci_bridge_dev_reset;
 211     dc->props = pci_bridge_dev_properties;
 212     dc->vmsd = &pci_bridge_dev_vmstate;
 213     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
 214     hc->plug = pci_bridge_dev_hotplug_cb;
 215     hc->unplug_request = pci_bridge_dev_hot_unplug_request_cb;
 216 }
 217
 218 static const TypeInfo pci_bridge_dev_info = {
 219     .name              = TYPE_PCI_BRIDGE_DEV,
 220     .parent            = TYPE_PCI_BRIDGE,
 221     .instance_size     = sizeof(PCIBridgeDev),
 222     .class_init        = pci_bridge_dev_class_init,
 223     .instance_finalize = pci_bridge_dev_instance_finalize,
 224     .interfaces = (InterfaceInfo[]) {
 225         { TYPE_HOTPLUG_HANDLER },
 226         { }
 227     }
 228 };
 229
 230 /*
 231  * Multiseat bridge.  Same as the standard pci bridge, only with a
 232  * different pci id, so we can match it easily in the guest for
 233  * automagic multiseat configuration.  See docs/multiseat.txt for more.
 234  */
 235 static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data)
 236 {
 237     DeviceClass *dc = DEVICE_CLASS(klass);
 238     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 239
 240     k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT;
 241     dc->desc = "Standard PCI Bridge (multiseat)";
 242 }
 243
 244 static const TypeInfo pci_bridge_dev_seat_info = {
 245     .name              = TYPE_PCI_BRIDGE_SEAT_DEV,
 246     .parent            = TYPE_PCI_BRIDGE_DEV,
 247     .instance_size     = sizeof(PCIBridgeDev),
 248     .class_init        = pci_bridge_dev_seat_class_init,
 249 };
 250
 251 static void pci_bridge_dev_register(void)
 252 {
 253     type_register_static(&pci_bridge_dev_info);
 254     type_register_static(&pci_bridge_dev_seat_info);
 255 }
 256
 257 type_init(pci_bridge_dev_register);