hw/ppc/mpc8544_guts.c

   1 /*
   2  * QEMU PowerPC MPC8544 global util pseudo-device
   3  *
   4  * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
   5  *
   6  * Author: Alexander Graf, <alex@csgraf.de>
   7  *
   8  * This is free software; you can redistribute it and/or modify
   9  * it under the terms of  the GNU General  Public License as published by
  10  * the Free Software Foundation;  either version 2 of the  License, or
  11  * (at your option) any later version.
  12  *
  13  * *****************************************************************
  14  *
  15  * The documentation for this device is noted in the MPC8544 documentation,
  16  * file name "MPC8544ERM.pdf". You can easily find it on the web.
  17  *
  18  */
  19
  20 #include "qemu/osdep.h"
  21 #include "qemu/module.h"
  22 #include "sysemu/runstate.h"
  23 #include "cpu.h"
  24 #include "hw/sysbus.h"
  25 #include "qom/object.h"
  26
  27 #define MPC8544_GUTS_MMIO_SIZE        0x1000
  28 #define MPC8544_GUTS_RSTCR_RESET      0x02
  29
  30 #define MPC8544_GUTS_ADDR_PORPLLSR    0x00
  31 #define MPC8544_GUTS_ADDR_PORBMSR     0x04
  32 #define MPC8544_GUTS_ADDR_PORIMPSCR   0x08
  33 #define MPC8544_GUTS_ADDR_PORDEVSR    0x0C
  34 #define MPC8544_GUTS_ADDR_PORDBGMSR   0x10
  35 #define MPC8544_GUTS_ADDR_PORDEVSR2   0x14
  36 #define MPC8544_GUTS_ADDR_GPPORCR     0x20
  37 #define MPC8544_GUTS_ADDR_GPIOCR      0x30
  38 #define MPC8544_GUTS_ADDR_GPOUTDR     0x40
  39 #define MPC8544_GUTS_ADDR_GPINDR      0x50
  40 #define MPC8544_GUTS_ADDR_PMUXCR      0x60
  41 #define MPC8544_GUTS_ADDR_DEVDISR     0x70
  42 #define MPC8544_GUTS_ADDR_POWMGTCSR   0x80
  43 #define MPC8544_GUTS_ADDR_MCPSUMR     0x90
  44 #define MPC8544_GUTS_ADDR_RSTRSCR     0x94
  45 #define MPC8544_GUTS_ADDR_PVR         0xA0
  46 #define MPC8544_GUTS_ADDR_SVR         0xA4
  47 #define MPC8544_GUTS_ADDR_RSTCR       0xB0
  48 #define MPC8544_GUTS_ADDR_IOVSELSR    0xC0
  49 #define MPC8544_GUTS_ADDR_DDRCSR      0xB20
  50 #define MPC8544_GUTS_ADDR_DDRCDR      0xB24
  51 #define MPC8544_GUTS_ADDR_DDRCLKDR    0xB28
  52 #define MPC8544_GUTS_ADDR_CLKOCR      0xE00
  53 #define MPC8544_GUTS_ADDR_SRDS1CR1    0xF04
  54 #define MPC8544_GUTS_ADDR_SRDS2CR1    0xF10
  55 #define MPC8544_GUTS_ADDR_SRDS2CR3    0xF18
  56
  57 #define TYPE_MPC8544_GUTS "mpc8544-guts"
  58 typedef struct GutsState GutsState;
  59 DECLARE_INSTANCE_CHECKER(GutsState, MPC8544_GUTS,
  60                          TYPE_MPC8544_GUTS)
  61
  62 struct GutsState {
  63     /*< private >*/
  64     SysBusDevice parent_obj;
  65     /*< public >*/
  66
  67     MemoryRegion iomem;
  68 };
  69
  70
  71 static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
  72                                   unsigned size)
  73 {
  74     uint32_t value = 0;
  75     PowerPCCPU *cpu = POWERPC_CPU(current_cpu);
  76     CPUPPCState *env = &cpu->env;
  77
  78     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
  79     switch (addr) {
  80     case MPC8544_GUTS_ADDR_PVR:
  81         value = env->spr[SPR_PVR];
  82         break;
  83     case MPC8544_GUTS_ADDR_SVR:
  84         value = env->spr[SPR_E500_SVR];
  85         break;
  86     default:
  87         fprintf(stderr, "guts: Unknown register read: %x\n", (int)addr);
  88         break;
  89     }
  90
  91     return value;
  92 }
  93
  94 static void mpc8544_guts_write(void *opaque, hwaddr addr,
  95                                uint64_t value, unsigned size)
  96 {
  97     addr &= MPC8544_GUTS_MMIO_SIZE - 1;
  98
  99     switch (addr) {
 100     case MPC8544_GUTS_ADDR_RSTCR:
 101         if (value & MPC8544_GUTS_RSTCR_RESET) {
 102             qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
 103         }
 104         break;
 105     default:
 106         fprintf(stderr, "guts: Unknown register write: %x = %x\n",
 107                 (int)addr, (unsigned)value);
 108         break;
 109     }
 110 }
 111
 112 static const MemoryRegionOps mpc8544_guts_ops = {
 113     .read = mpc8544_guts_read,
 114     .write = mpc8544_guts_write,
 115     .endianness = DEVICE_BIG_ENDIAN,
 116     .valid = {
 117         .min_access_size = 4,
 118         .max_access_size = 4,
 119     },
 120 };
 121
 122 static void mpc8544_guts_initfn(Object *obj)
 123 {
 124     SysBusDevice *d = SYS_BUS_DEVICE(obj);
 125     GutsState *s = MPC8544_GUTS(obj);
 126
 127     memory_region_init_io(&s->iomem, OBJECT(s), &mpc8544_guts_ops, s,
 128                           "mpc8544.guts", MPC8544_GUTS_MMIO_SIZE);
 129     sysbus_init_mmio(d, &s->iomem);
 130 }
 131
 132 static const TypeInfo mpc8544_guts_info = {
 133     .name          = TYPE_MPC8544_GUTS,
 134     .parent        = TYPE_SYS_BUS_DEVICE,
 135     .instance_size = sizeof(GutsState),
 136     .instance_init = mpc8544_guts_initfn,
 137 };
 138
 139 static void mpc8544_guts_register_types(void)
 140 {
 141     type_register_static(&mpc8544_guts_info);
 142 }
 143
 144 type_init(mpc8544_guts_register_types)