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Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
[qemu/ar7.git] / hw / virtio / virtio-pci.c
blobce928f2429274ee132f7b7d7a96abb072815185f
1 /*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
14 * Contributions after 2012-01-13 are licensed under the terms of the
15 * GNU GPL, version 2 or (at your option) any later version.
16 */
17
18 #include "qemu/osdep.h"
19
20 #include "standard-headers/linux/virtio_pci.h"
21 #include "hw/virtio/virtio.h"
22 #include "hw/pci/pci.h"
23 #include "hw/pci/pci_bus.h"
24 #include "qapi/error.h"
25 #include "qemu/error-report.h"
26 #include "qemu/module.h"
27 #include "hw/pci/msi.h"
28 #include "hw/pci/msix.h"
29 #include "hw/loader.h"
30 #include "sysemu/kvm.h"
31 #include "virtio-pci.h"
32 #include "qemu/range.h"
33 #include "hw/virtio/virtio-bus.h"
34 #include "qapi/visitor.h"
35
36 #define VIRTIO_PCI_REGION_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_present(dev))
37
38 #undef VIRTIO_PCI_CONFIG
39
40 /* The remaining space is defined by each driver as the per-driver
41 * configuration space */
42 #define VIRTIO_PCI_CONFIG_SIZE(dev) VIRTIO_PCI_CONFIG_OFF(msix_enabled(dev))
43
44 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
45 VirtIOPCIProxy *dev);
46 static void virtio_pci_reset(DeviceState *qdev);
47
48 /* virtio device */
49 /* DeviceState to VirtIOPCIProxy. For use off data-path. TODO: use QOM. */
50 static inline VirtIOPCIProxy *to_virtio_pci_proxy(DeviceState *d)
51 {
52 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
53 }
54
55 /* DeviceState to VirtIOPCIProxy. Note: used on datapath,
56 * be careful and test performance if you change this.
57 */
58 static inline VirtIOPCIProxy *to_virtio_pci_proxy_fast(DeviceState *d)
59 {
60 return container_of(d, VirtIOPCIProxy, pci_dev.qdev);
61 }
62
63 static void virtio_pci_notify(DeviceState *d, uint16_t vector)
64 {
65 VirtIOPCIProxy *proxy = to_virtio_pci_proxy_fast(d);
66
67 if (msix_enabled(&proxy->pci_dev))
68 msix_notify(&proxy->pci_dev, vector);
69 else {
70 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
71 pci_set_irq(&proxy->pci_dev, atomic_read(&vdev->isr) & 1);
72 }
73 }
74
75 static void virtio_pci_save_config(DeviceState *d, QEMUFile *f)
76 {
77 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
78 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
79
80 pci_device_save(&proxy->pci_dev, f);
81 msix_save(&proxy->pci_dev, f);
82 if (msix_present(&proxy->pci_dev))
83 qemu_put_be16(f, vdev->config_vector);
84 }
85
86 static const VMStateDescription vmstate_virtio_pci_modern_queue_state = {
87 .name = "virtio_pci/modern_queue_state",
88 .version_id = 1,
89 .minimum_version_id = 1,
90 .fields = (VMStateField[]) {
91 VMSTATE_UINT16(num, VirtIOPCIQueue),
92 VMSTATE_UNUSED(1), /* enabled was stored as be16 */
93 VMSTATE_BOOL(enabled, VirtIOPCIQueue),
94 VMSTATE_UINT32_ARRAY(desc, VirtIOPCIQueue, 2),
95 VMSTATE_UINT32_ARRAY(avail, VirtIOPCIQueue, 2),
96 VMSTATE_UINT32_ARRAY(used, VirtIOPCIQueue, 2),
97 VMSTATE_END_OF_LIST()
98 }
99 };
100
101 static bool virtio_pci_modern_state_needed(void *opaque)
102 {
103 VirtIOPCIProxy *proxy = opaque;
104
105 return virtio_pci_modern(proxy);
106 }
107
108 static const VMStateDescription vmstate_virtio_pci_modern_state_sub = {
109 .name = "virtio_pci/modern_state",
110 .version_id = 1,
111 .minimum_version_id = 1,
112 .needed = &virtio_pci_modern_state_needed,
113 .fields = (VMStateField[]) {
114 VMSTATE_UINT32(dfselect, VirtIOPCIProxy),
115 VMSTATE_UINT32(gfselect, VirtIOPCIProxy),
116 VMSTATE_UINT32_ARRAY(guest_features, VirtIOPCIProxy, 2),
117 VMSTATE_STRUCT_ARRAY(vqs, VirtIOPCIProxy, VIRTIO_QUEUE_MAX, 0,
118 vmstate_virtio_pci_modern_queue_state,
119 VirtIOPCIQueue),
120 VMSTATE_END_OF_LIST()
121 }
122 };
123
124 static const VMStateDescription vmstate_virtio_pci = {
125 .name = "virtio_pci",
126 .version_id = 1,
127 .minimum_version_id = 1,
128 .minimum_version_id_old = 1,
129 .fields = (VMStateField[]) {
130 VMSTATE_END_OF_LIST()
131 },
132 .subsections = (const VMStateDescription*[]) {
133 &vmstate_virtio_pci_modern_state_sub,
134 NULL
135 }
136 };
137
138 static bool virtio_pci_has_extra_state(DeviceState *d)
139 {
140 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
141
142 return proxy->flags & VIRTIO_PCI_FLAG_MIGRATE_EXTRA;
143 }
144
145 static void virtio_pci_save_extra_state(DeviceState *d, QEMUFile *f)
146 {
147 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
148
149 vmstate_save_state(f, &vmstate_virtio_pci, proxy, NULL);
150 }
151
152 static int virtio_pci_load_extra_state(DeviceState *d, QEMUFile *f)
153 {
154 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
155
156 return vmstate_load_state(f, &vmstate_virtio_pci, proxy, 1);
157 }
158
159 static void virtio_pci_save_queue(DeviceState *d, int n, QEMUFile *f)
160 {
161 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
162 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
163
164 if (msix_present(&proxy->pci_dev))
165 qemu_put_be16(f, virtio_queue_vector(vdev, n));
166 }
167
168 static int virtio_pci_load_config(DeviceState *d, QEMUFile *f)
169 {
170 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
171 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
172
173 int ret;
174 ret = pci_device_load(&proxy->pci_dev, f);
175 if (ret) {
176 return ret;
177 }
178 msix_unuse_all_vectors(&proxy->pci_dev);
179 msix_load(&proxy->pci_dev, f);
180 if (msix_present(&proxy->pci_dev)) {
181 qemu_get_be16s(f, &vdev->config_vector);
182 } else {
183 vdev->config_vector = VIRTIO_NO_VECTOR;
184 }
185 if (vdev->config_vector != VIRTIO_NO_VECTOR) {
186 return msix_vector_use(&proxy->pci_dev, vdev->config_vector);
187 }
188 return 0;
189 }
190
191 static int virtio_pci_load_queue(DeviceState *d, int n, QEMUFile *f)
192 {
193 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
194 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
195
196 uint16_t vector;
197 if (msix_present(&proxy->pci_dev)) {
198 qemu_get_be16s(f, &vector);
199 } else {
200 vector = VIRTIO_NO_VECTOR;
201 }
202 virtio_queue_set_vector(vdev, n, vector);
203 if (vector != VIRTIO_NO_VECTOR) {
204 return msix_vector_use(&proxy->pci_dev, vector);
205 }
206
207 return 0;
208 }
209
210 static bool virtio_pci_ioeventfd_enabled(DeviceState *d)
211 {
212 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
213
214 return (proxy->flags & VIRTIO_PCI_FLAG_USE_IOEVENTFD) != 0;
215 }
216
217 #define QEMU_VIRTIO_PCI_QUEUE_MEM_MULT 0x1000
218
219 static inline int virtio_pci_queue_mem_mult(struct VirtIOPCIProxy *proxy)
220 {
221 return (proxy->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ) ?
222 QEMU_VIRTIO_PCI_QUEUE_MEM_MULT : 4;
223 }
224
225 static int virtio_pci_ioeventfd_assign(DeviceState *d, EventNotifier *notifier,
226 int n, bool assign)
227 {
228 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
229 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
230 VirtQueue *vq = virtio_get_queue(vdev, n);
231 bool legacy = virtio_pci_legacy(proxy);
232 bool modern = virtio_pci_modern(proxy);
233 bool fast_mmio = kvm_ioeventfd_any_length_enabled();
234 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
235 MemoryRegion *modern_mr = &proxy->notify.mr;
236 MemoryRegion *modern_notify_mr = &proxy->notify_pio.mr;
237 MemoryRegion *legacy_mr = &proxy->bar;
238 hwaddr modern_addr = virtio_pci_queue_mem_mult(proxy) *
239 virtio_get_queue_index(vq);
240 hwaddr legacy_addr = VIRTIO_PCI_QUEUE_NOTIFY;
241
242 if (assign) {
243 if (modern) {
244 if (fast_mmio) {
245 memory_region_add_eventfd(modern_mr, modern_addr, 0,
246 false, n, notifier);
247 } else {
248 memory_region_add_eventfd(modern_mr, modern_addr, 2,
249 false, n, notifier);
250 }
251 if (modern_pio) {
252 memory_region_add_eventfd(modern_notify_mr, 0, 2,
253 true, n, notifier);
254 }
255 }
256 if (legacy) {
257 memory_region_add_eventfd(legacy_mr, legacy_addr, 2,
258 true, n, notifier);
259 }
260 } else {
261 if (modern) {
262 if (fast_mmio) {
263 memory_region_del_eventfd(modern_mr, modern_addr, 0,
264 false, n, notifier);
265 } else {
266 memory_region_del_eventfd(modern_mr, modern_addr, 2,
267 false, n, notifier);
268 }
269 if (modern_pio) {
270 memory_region_del_eventfd(modern_notify_mr, 0, 2,
271 true, n, notifier);
272 }
273 }
274 if (legacy) {
275 memory_region_del_eventfd(legacy_mr, legacy_addr, 2,
276 true, n, notifier);
277 }
278 }
279 return 0;
280 }
281
282 static void virtio_pci_start_ioeventfd(VirtIOPCIProxy *proxy)
283 {
284 virtio_bus_start_ioeventfd(&proxy->bus);
285 }
286
287 static void virtio_pci_stop_ioeventfd(VirtIOPCIProxy *proxy)
288 {
289 virtio_bus_stop_ioeventfd(&proxy->bus);
290 }
291
292 static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
293 {
294 VirtIOPCIProxy *proxy = opaque;
295 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
296 hwaddr pa;
297
298 switch (addr) {
299 case VIRTIO_PCI_GUEST_FEATURES:
300 /* Guest does not negotiate properly? We have to assume nothing. */
301 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
302 val = virtio_bus_get_vdev_bad_features(&proxy->bus);
303 }
304 virtio_set_features(vdev, val);
305 break;
306 case VIRTIO_PCI_QUEUE_PFN:
307 pa = (hwaddr)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
308 if (pa == 0) {
309 virtio_pci_reset(DEVICE(proxy));
310 }
311 else
312 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
313 break;
314 case VIRTIO_PCI_QUEUE_SEL:
315 if (val < VIRTIO_QUEUE_MAX)
316 vdev->queue_sel = val;
317 break;
318 case VIRTIO_PCI_QUEUE_NOTIFY:
319 if (val < VIRTIO_QUEUE_MAX) {
320 virtio_queue_notify(vdev, val);
321 }
322 break;
323 case VIRTIO_PCI_STATUS:
324 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
325 virtio_pci_stop_ioeventfd(proxy);
326 }
327
328 virtio_set_status(vdev, val & 0xFF);
329
330 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
331 virtio_pci_start_ioeventfd(proxy);
332 }
333
334 if (vdev->status == 0) {
335 virtio_pci_reset(DEVICE(proxy));
336 }
337
338 /* Linux before 2.6.34 drives the device without enabling
339 the PCI device bus master bit. Enable it automatically
340 for the guest. This is a PCI spec violation but so is
341 initiating DMA with bus master bit clear. */
342 if (val == (VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER)) {
343 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
344 proxy->pci_dev.config[PCI_COMMAND] |
345 PCI_COMMAND_MASTER, 1);
346 }
347 break;
348 case VIRTIO_MSI_CONFIG_VECTOR:
349 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
350 /* Make it possible for guest to discover an error took place. */
351 if (msix_vector_use(&proxy->pci_dev, val) < 0)
352 val = VIRTIO_NO_VECTOR;
353 vdev->config_vector = val;
354 break;
355 case VIRTIO_MSI_QUEUE_VECTOR:
356 msix_vector_unuse(&proxy->pci_dev,
357 virtio_queue_vector(vdev, vdev->queue_sel));
358 /* Make it possible for guest to discover an error took place. */
359 if (msix_vector_use(&proxy->pci_dev, val) < 0)
360 val = VIRTIO_NO_VECTOR;
361 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
362 break;
363 default:
364 error_report("%s: unexpected address 0x%x value 0x%x",
365 __func__, addr, val);
366 break;
367 }
368 }
369
370 static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
371 {
372 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
373 uint32_t ret = 0xFFFFFFFF;
374
375 switch (addr) {
376 case VIRTIO_PCI_HOST_FEATURES:
377 ret = vdev->host_features;
378 break;
379 case VIRTIO_PCI_GUEST_FEATURES:
380 ret = vdev->guest_features;
381 break;
382 case VIRTIO_PCI_QUEUE_PFN:
383 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
384 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
385 break;
386 case VIRTIO_PCI_QUEUE_NUM:
387 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
388 break;
389 case VIRTIO_PCI_QUEUE_SEL:
390 ret = vdev->queue_sel;
391 break;
392 case VIRTIO_PCI_STATUS:
393 ret = vdev->status;
394 break;
395 case VIRTIO_PCI_ISR:
396 /* reading from the ISR also clears it. */
397 ret = atomic_xchg(&vdev->isr, 0);
398 pci_irq_deassert(&proxy->pci_dev);
399 break;
400 case VIRTIO_MSI_CONFIG_VECTOR:
401 ret = vdev->config_vector;
402 break;
403 case VIRTIO_MSI_QUEUE_VECTOR:
404 ret = virtio_queue_vector(vdev, vdev->queue_sel);
405 break;
406 default:
407 break;
408 }
409
410 return ret;
411 }
412
413 static uint64_t virtio_pci_config_read(void *opaque, hwaddr addr,
414 unsigned size)
415 {
416 VirtIOPCIProxy *proxy = opaque;
417 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
418 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
419 uint64_t val = 0;
420 if (addr < config) {
421 return virtio_ioport_read(proxy, addr);
422 }
423 addr -= config;
424
425 switch (size) {
426 case 1:
427 val = virtio_config_readb(vdev, addr);
428 break;
429 case 2:
430 val = virtio_config_readw(vdev, addr);
431 if (virtio_is_big_endian(vdev)) {
432 val = bswap16(val);
433 }
434 break;
435 case 4:
436 val = virtio_config_readl(vdev, addr);
437 if (virtio_is_big_endian(vdev)) {
438 val = bswap32(val);
439 }
440 break;
441 }
442 return val;
443 }
444
445 static void virtio_pci_config_write(void *opaque, hwaddr addr,
446 uint64_t val, unsigned size)
447 {
448 VirtIOPCIProxy *proxy = opaque;
449 uint32_t config = VIRTIO_PCI_CONFIG_SIZE(&proxy->pci_dev);
450 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
451 if (addr < config) {
452 virtio_ioport_write(proxy, addr, val);
453 return;
454 }
455 addr -= config;
456 /*
457 * Virtio-PCI is odd. Ioports are LE but config space is target native
458 * endian.
459 */
460 switch (size) {
461 case 1:
462 virtio_config_writeb(vdev, addr, val);
463 break;
464 case 2:
465 if (virtio_is_big_endian(vdev)) {
466 val = bswap16(val);
467 }
468 virtio_config_writew(vdev, addr, val);
469 break;
470 case 4:
471 if (virtio_is_big_endian(vdev)) {
472 val = bswap32(val);
473 }
474 virtio_config_writel(vdev, addr, val);
475 break;
476 }
477 }
478
479 static const MemoryRegionOps virtio_pci_config_ops = {
480 .read = virtio_pci_config_read,
481 .write = virtio_pci_config_write,
482 .impl = {
483 .min_access_size = 1,
484 .max_access_size = 4,
485 },
486 .endianness = DEVICE_LITTLE_ENDIAN,
487 };
488
489 static MemoryRegion *virtio_address_space_lookup(VirtIOPCIProxy *proxy,
490 hwaddr *off, int len)
491 {
492 int i;
493 VirtIOPCIRegion *reg;
494
495 for (i = 0; i < ARRAY_SIZE(proxy->regs); ++i) {
496 reg = &proxy->regs[i];
497 if (*off >= reg->offset &&
498 *off + len <= reg->offset + reg->size) {
499 *off -= reg->offset;
500 return &reg->mr;
501 }
502 }
503
504 return NULL;
505 }
506
507 /* Below are generic functions to do memcpy from/to an address space,
508 * without byteswaps, with input validation.
509 *
510 * As regular address_space_* APIs all do some kind of byteswap at least for
511 * some host/target combinations, we are forced to explicitly convert to a
512 * known-endianness integer value.
513 * It doesn't really matter which endian format to go through, so the code
514 * below selects the endian that causes the least amount of work on the given
515 * host.
516 *
517 * Note: host pointer must be aligned.
518 */
519 static
520 void virtio_address_space_write(VirtIOPCIProxy *proxy, hwaddr addr,
521 const uint8_t *buf, int len)
522 {
523 uint64_t val;
524 MemoryRegion *mr;
525
526 /* address_space_* APIs assume an aligned address.
527 * As address is under guest control, handle illegal values.
528 */
529 addr &= ~(len - 1);
530
531 mr = virtio_address_space_lookup(proxy, &addr, len);
532 if (!mr) {
533 return;
534 }
535
536 /* Make sure caller aligned buf properly */
537 assert(!(((uintptr_t)buf) & (len - 1)));
538
539 switch (len) {
540 case 1:
541 val = pci_get_byte(buf);
542 break;
543 case 2:
544 val = cpu_to_le16(pci_get_word(buf));
545 break;
546 case 4:
547 val = cpu_to_le32(pci_get_long(buf));
548 break;
549 default:
550 /* As length is under guest control, handle illegal values. */
551 return;
552 }
553 memory_region_dispatch_write(mr, addr, val, len, MEMTXATTRS_UNSPECIFIED);
554 }
555
556 static void
557 virtio_address_space_read(VirtIOPCIProxy *proxy, hwaddr addr,
558 uint8_t *buf, int len)
559 {
560 uint64_t val;
561 MemoryRegion *mr;
562
563 /* address_space_* APIs assume an aligned address.
564 * As address is under guest control, handle illegal values.
565 */
566 addr &= ~(len - 1);
567
568 mr = virtio_address_space_lookup(proxy, &addr, len);
569 if (!mr) {
570 return;
571 }
572
573 /* Make sure caller aligned buf properly */
574 assert(!(((uintptr_t)buf) & (len - 1)));
575
576 memory_region_dispatch_read(mr, addr, &val, len, MEMTXATTRS_UNSPECIFIED);
577 switch (len) {
578 case 1:
579 pci_set_byte(buf, val);
580 break;
581 case 2:
582 pci_set_word(buf, le16_to_cpu(val));
583 break;
584 case 4:
585 pci_set_long(buf, le32_to_cpu(val));
586 break;
587 default:
588 /* As length is under guest control, handle illegal values. */
589 break;
590 }
591 }
592
593 static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
594 uint32_t val, int len)
595 {
596 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
597 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
598 struct virtio_pci_cfg_cap *cfg;
599
600 pci_default_write_config(pci_dev, address, val, len);
601
602 if (range_covers_byte(address, len, PCI_COMMAND) &&
603 !(pci_dev->config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
604 virtio_pci_stop_ioeventfd(proxy);
605 virtio_set_status(vdev, vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
606 }
607
608 if (proxy->config_cap &&
609 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
610 pci_cfg_data),
611 sizeof cfg->pci_cfg_data)) {
612 uint32_t off;
613 uint32_t len;
614
615 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
616 off = le32_to_cpu(cfg->cap.offset);
617 len = le32_to_cpu(cfg->cap.length);
618
619 if (len == 1 || len == 2 || len == 4) {
620 assert(len <= sizeof cfg->pci_cfg_data);
621 virtio_address_space_write(proxy, off, cfg->pci_cfg_data, len);
622 }
623 }
624 }
625
626 static uint32_t virtio_read_config(PCIDevice *pci_dev,
627 uint32_t address, int len)
628 {
629 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
630 struct virtio_pci_cfg_cap *cfg;
631
632 if (proxy->config_cap &&
633 ranges_overlap(address, len, proxy->config_cap + offsetof(struct virtio_pci_cfg_cap,
634 pci_cfg_data),
635 sizeof cfg->pci_cfg_data)) {
636 uint32_t off;
637 uint32_t len;
638
639 cfg = (void *)(proxy->pci_dev.config + proxy->config_cap);
640 off = le32_to_cpu(cfg->cap.offset);
641 len = le32_to_cpu(cfg->cap.length);
642
643 if (len == 1 || len == 2 || len == 4) {
644 assert(len <= sizeof cfg->pci_cfg_data);
645 virtio_address_space_read(proxy, off, cfg->pci_cfg_data, len);
646 }
647 }
648
649 return pci_default_read_config(pci_dev, address, len);
650 }
651
652 static int kvm_virtio_pci_vq_vector_use(VirtIOPCIProxy *proxy,
653 unsigned int queue_no,
654 unsigned int vector)
655 {
656 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
657 int ret;
658
659 if (irqfd->users == 0) {
660 ret = kvm_irqchip_add_msi_route(kvm_state, vector, &proxy->pci_dev);
661 if (ret < 0) {
662 return ret;
663 }
664 irqfd->virq = ret;
665 }
666 irqfd->users++;
667 return 0;
668 }
669
670 static void kvm_virtio_pci_vq_vector_release(VirtIOPCIProxy *proxy,
671 unsigned int vector)
672 {
673 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
674 if (--irqfd->users == 0) {
675 kvm_irqchip_release_virq(kvm_state, irqfd->virq);
676 }
677 }
678
679 static int kvm_virtio_pci_irqfd_use(VirtIOPCIProxy *proxy,
680 unsigned int queue_no,
681 unsigned int vector)
682 {
683 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
684 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
685 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
686 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
687 return kvm_irqchip_add_irqfd_notifier_gsi(kvm_state, n, NULL, irqfd->virq);
688 }
689
690 static void kvm_virtio_pci_irqfd_release(VirtIOPCIProxy *proxy,
691 unsigned int queue_no,
692 unsigned int vector)
693 {
694 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
695 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
696 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
697 VirtIOIRQFD *irqfd = &proxy->vector_irqfd[vector];
698 int ret;
699
700 ret = kvm_irqchip_remove_irqfd_notifier_gsi(kvm_state, n, irqfd->virq);
701 assert(ret == 0);
702 }
703
704 static int kvm_virtio_pci_vector_use(VirtIOPCIProxy *proxy, int nvqs)
705 {
706 PCIDevice *dev = &proxy->pci_dev;
707 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
708 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
709 unsigned int vector;
710 int ret, queue_no;
711
712 for (queue_no = 0; queue_no < nvqs; queue_no++) {
713 if (!virtio_queue_get_num(vdev, queue_no)) {
714 break;
715 }
716 vector = virtio_queue_vector(vdev, queue_no);
717 if (vector >= msix_nr_vectors_allocated(dev)) {
718 continue;
719 }
720 ret = kvm_virtio_pci_vq_vector_use(proxy, queue_no, vector);
721 if (ret < 0) {
722 goto undo;
723 }
724 /* If guest supports masking, set up irqfd now.
725 * Otherwise, delay until unmasked in the frontend.
726 */
727 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
728 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
729 if (ret < 0) {
730 kvm_virtio_pci_vq_vector_release(proxy, vector);
731 goto undo;
732 }
733 }
734 }
735 return 0;
736
737 undo:
738 while (--queue_no >= 0) {
739 vector = virtio_queue_vector(vdev, queue_no);
740 if (vector >= msix_nr_vectors_allocated(dev)) {
741 continue;
742 }
743 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
744 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
745 }
746 kvm_virtio_pci_vq_vector_release(proxy, vector);
747 }
748 return ret;
749 }
750
751 static void kvm_virtio_pci_vector_release(VirtIOPCIProxy *proxy, int nvqs)
752 {
753 PCIDevice *dev = &proxy->pci_dev;
754 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
755 unsigned int vector;
756 int queue_no;
757 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
758
759 for (queue_no = 0; queue_no < nvqs; queue_no++) {
760 if (!virtio_queue_get_num(vdev, queue_no)) {
761 break;
762 }
763 vector = virtio_queue_vector(vdev, queue_no);
764 if (vector >= msix_nr_vectors_allocated(dev)) {
765 continue;
766 }
767 /* If guest supports masking, clean up irqfd now.
768 * Otherwise, it was cleaned when masked in the frontend.
769 */
770 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
771 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
772 }
773 kvm_virtio_pci_vq_vector_release(proxy, vector);
774 }
775 }
776
777 static int virtio_pci_vq_vector_unmask(VirtIOPCIProxy *proxy,
778 unsigned int queue_no,
779 unsigned int vector,
780 MSIMessage msg)
781 {
782 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
783 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
784 VirtQueue *vq = virtio_get_queue(vdev, queue_no);
785 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
786 VirtIOIRQFD *irqfd;
787 int ret = 0;
788
789 if (proxy->vector_irqfd) {
790 irqfd = &proxy->vector_irqfd[vector];
791 if (irqfd->msg.data != msg.data || irqfd->msg.address != msg.address) {
792 ret = kvm_irqchip_update_msi_route(kvm_state, irqfd->virq, msg,
793 &proxy->pci_dev);
794 if (ret < 0) {
795 return ret;
796 }
797 kvm_irqchip_commit_routes(kvm_state);
798 }
799 }
800
801 /* If guest supports masking, irqfd is already setup, unmask it.
802 * Otherwise, set it up now.
803 */
804 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
805 k->guest_notifier_mask(vdev, queue_no, false);
806 /* Test after unmasking to avoid losing events. */
807 if (k->guest_notifier_pending &&
808 k->guest_notifier_pending(vdev, queue_no)) {
809 event_notifier_set(n);
810 }
811 } else {
812 ret = kvm_virtio_pci_irqfd_use(proxy, queue_no, vector);
813 }
814 return ret;
815 }
816
817 static void virtio_pci_vq_vector_mask(VirtIOPCIProxy *proxy,
818 unsigned int queue_no,
819 unsigned int vector)
820 {
821 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
822 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
823
824 /* If guest supports masking, keep irqfd but mask it.
825 * Otherwise, clean it up now.
826 */
827 if (vdev->use_guest_notifier_mask && k->guest_notifier_mask) {
828 k->guest_notifier_mask(vdev, queue_no, true);
829 } else {
830 kvm_virtio_pci_irqfd_release(proxy, queue_no, vector);
831 }
832 }
833
834 static int virtio_pci_vector_unmask(PCIDevice *dev, unsigned vector,
835 MSIMessage msg)
836 {
837 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
838 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
839 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
840 int ret, index, unmasked = 0;
841
842 while (vq) {
843 index = virtio_get_queue_index(vq);
844 if (!virtio_queue_get_num(vdev, index)) {
845 break;
846 }
847 if (index < proxy->nvqs_with_notifiers) {
848 ret = virtio_pci_vq_vector_unmask(proxy, index, vector, msg);
849 if (ret < 0) {
850 goto undo;
851 }
852 ++unmasked;
853 }
854 vq = virtio_vector_next_queue(vq);
855 }
856
857 return 0;
858
859 undo:
860 vq = virtio_vector_first_queue(vdev, vector);
861 while (vq && unmasked >= 0) {
862 index = virtio_get_queue_index(vq);
863 if (index < proxy->nvqs_with_notifiers) {
864 virtio_pci_vq_vector_mask(proxy, index, vector);
865 --unmasked;
866 }
867 vq = virtio_vector_next_queue(vq);
868 }
869 return ret;
870 }
871
872 static void virtio_pci_vector_mask(PCIDevice *dev, unsigned vector)
873 {
874 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
875 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
876 VirtQueue *vq = virtio_vector_first_queue(vdev, vector);
877 int index;
878
879 while (vq) {
880 index = virtio_get_queue_index(vq);
881 if (!virtio_queue_get_num(vdev, index)) {
882 break;
883 }
884 if (index < proxy->nvqs_with_notifiers) {
885 virtio_pci_vq_vector_mask(proxy, index, vector);
886 }
887 vq = virtio_vector_next_queue(vq);
888 }
889 }
890
891 static void virtio_pci_vector_poll(PCIDevice *dev,
892 unsigned int vector_start,
893 unsigned int vector_end)
894 {
895 VirtIOPCIProxy *proxy = container_of(dev, VirtIOPCIProxy, pci_dev);
896 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
897 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
898 int queue_no;
899 unsigned int vector;
900 EventNotifier *notifier;
901 VirtQueue *vq;
902
903 for (queue_no = 0; queue_no < proxy->nvqs_with_notifiers; queue_no++) {
904 if (!virtio_queue_get_num(vdev, queue_no)) {
905 break;
906 }
907 vector = virtio_queue_vector(vdev, queue_no);
908 if (vector < vector_start || vector >= vector_end ||
909 !msix_is_masked(dev, vector)) {
910 continue;
911 }
912 vq = virtio_get_queue(vdev, queue_no);
913 notifier = virtio_queue_get_guest_notifier(vq);
914 if (k->guest_notifier_pending) {
915 if (k->guest_notifier_pending(vdev, queue_no)) {
916 msix_set_pending(dev, vector);
917 }
918 } else if (event_notifier_test_and_clear(notifier)) {
919 msix_set_pending(dev, vector);
920 }
921 }
922 }
923
924 static int virtio_pci_set_guest_notifier(DeviceState *d, int n, bool assign,
925 bool with_irqfd)
926 {
927 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
928 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
929 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
930 VirtQueue *vq = virtio_get_queue(vdev, n);
931 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
932
933 if (assign) {
934 int r = event_notifier_init(notifier, 0);
935 if (r < 0) {
936 return r;
937 }
938 virtio_queue_set_guest_notifier_fd_handler(vq, true, with_irqfd);
939 } else {
940 virtio_queue_set_guest_notifier_fd_handler(vq, false, with_irqfd);
941 event_notifier_cleanup(notifier);
942 }
943
944 if (!msix_enabled(&proxy->pci_dev) &&
945 vdev->use_guest_notifier_mask &&
946 vdc->guest_notifier_mask) {
947 vdc->guest_notifier_mask(vdev, n, !assign);
948 }
949
950 return 0;
951 }
952
953 static bool virtio_pci_query_guest_notifiers(DeviceState *d)
954 {
955 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
956 return msix_enabled(&proxy->pci_dev);
957 }
958
959 static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
960 {
961 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
962 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
963 VirtioDeviceClass *k = VIRTIO_DEVICE_GET_CLASS(vdev);
964 int r, n;
965 bool with_irqfd = msix_enabled(&proxy->pci_dev) &&
966 kvm_msi_via_irqfd_enabled();
967
968 nvqs = MIN(nvqs, VIRTIO_QUEUE_MAX);
969
970 /* When deassigning, pass a consistent nvqs value
971 * to avoid leaking notifiers.
972 */
973 assert(assign || nvqs == proxy->nvqs_with_notifiers);
974
975 proxy->nvqs_with_notifiers = nvqs;
976
977 /* Must unset vector notifier while guest notifier is still assigned */
978 if ((proxy->vector_irqfd || k->guest_notifier_mask) && !assign) {
979 msix_unset_vector_notifiers(&proxy->pci_dev);
980 if (proxy->vector_irqfd) {
981 kvm_virtio_pci_vector_release(proxy, nvqs);
982 g_free(proxy->vector_irqfd);
983 proxy->vector_irqfd = NULL;
984 }
985 }
986
987 for (n = 0; n < nvqs; n++) {
988 if (!virtio_queue_get_num(vdev, n)) {
989 break;
990 }
991
992 r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
993 if (r < 0) {
994 goto assign_error;
995 }
996 }
997
998 /* Must set vector notifier after guest notifier has been assigned */
999 if ((with_irqfd || k->guest_notifier_mask) && assign) {
1000 if (with_irqfd) {
1001 proxy->vector_irqfd =
1002 g_malloc0(sizeof(*proxy->vector_irqfd) *
1003 msix_nr_vectors_allocated(&proxy->pci_dev));
1004 r = kvm_virtio_pci_vector_use(proxy, nvqs);
1005 if (r < 0) {
1006 goto assign_error;
1007 }
1008 }
1009 r = msix_set_vector_notifiers(&proxy->pci_dev,
1010 virtio_pci_vector_unmask,
1011 virtio_pci_vector_mask,
1012 virtio_pci_vector_poll);
1013 if (r < 0) {
1014 goto notifiers_error;
1015 }
1016 }
1017
1018 return 0;
1019
1020 notifiers_error:
1021 if (with_irqfd) {
1022 assert(assign);
1023 kvm_virtio_pci_vector_release(proxy, nvqs);
1024 }
1025
1026 assign_error:
1027 /* We get here on assignment failure. Recover by undoing for VQs 0 .. n. */
1028 assert(assign);
1029 while (--n >= 0) {
1030 virtio_pci_set_guest_notifier(d, n, !assign, with_irqfd);
1031 }
1032 return r;
1033 }
1034
1035 static int virtio_pci_set_host_notifier_mr(DeviceState *d, int n,
1036 MemoryRegion *mr, bool assign)
1037 {
1038 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1039 int offset;
1040
1041 if (n >= VIRTIO_QUEUE_MAX || !virtio_pci_modern(proxy) ||
1042 virtio_pci_queue_mem_mult(proxy) != memory_region_size(mr)) {
1043 return -1;
1044 }
1045
1046 if (assign) {
1047 offset = virtio_pci_queue_mem_mult(proxy) * n;
1048 memory_region_add_subregion_overlap(&proxy->notify.mr, offset, mr, 1);
1049 } else {
1050 memory_region_del_subregion(&proxy->notify.mr, mr);
1051 }
1052
1053 return 0;
1054 }
1055
1056 static void virtio_pci_vmstate_change(DeviceState *d, bool running)
1057 {
1058 VirtIOPCIProxy *proxy = to_virtio_pci_proxy(d);
1059 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1060
1061 if (running) {
1062 /* Old QEMU versions did not set bus master enable on status write.
1063 * Detect DRIVER set and enable it.
1064 */
1065 if ((proxy->flags & VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION) &&
1066 (vdev->status & VIRTIO_CONFIG_S_DRIVER) &&
1067 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
1068 pci_default_write_config(&proxy->pci_dev, PCI_COMMAND,
1069 proxy->pci_dev.config[PCI_COMMAND] |
1070 PCI_COMMAND_MASTER, 1);
1071 }
1072 virtio_pci_start_ioeventfd(proxy);
1073 } else {
1074 virtio_pci_stop_ioeventfd(proxy);
1075 }
1076 }
1077
1078 /*
1079 * virtio-pci: This is the PCIDevice which has a virtio-pci-bus.
1080 */
1081
1082 static int virtio_pci_query_nvectors(DeviceState *d)
1083 {
1084 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1085
1086 return proxy->nvectors;
1087 }
1088
1089 static AddressSpace *virtio_pci_get_dma_as(DeviceState *d)
1090 {
1091 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1092 PCIDevice *dev = &proxy->pci_dev;
1093
1094 return pci_get_address_space(dev);
1095 }
1096
1097 static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy,
1098 struct virtio_pci_cap *cap)
1099 {
1100 PCIDevice *dev = &proxy->pci_dev;
1101 int offset;
1102
1103 offset = pci_add_capability(dev, PCI_CAP_ID_VNDR, 0,
1104 cap->cap_len, &error_abort);
1105
1106 assert(cap->cap_len >= sizeof *cap);
1107 memcpy(dev->config + offset + PCI_CAP_FLAGS, &cap->cap_len,
1108 cap->cap_len - PCI_CAP_FLAGS);
1109
1110 return offset;
1111 }
1112
1113 static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr,
1114 unsigned size)
1115 {
1116 VirtIOPCIProxy *proxy = opaque;
1117 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1118 uint32_t val = 0;
1119 int i;
1120
1121 switch (addr) {
1122 case VIRTIO_PCI_COMMON_DFSELECT:
1123 val = proxy->dfselect;
1124 break;
1125 case VIRTIO_PCI_COMMON_DF:
1126 if (proxy->dfselect <= 1) {
1127 VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);
1128
1129 val = (vdev->host_features & ~vdc->legacy_features) >>
1130 (32 * proxy->dfselect);
1131 }
1132 break;
1133 case VIRTIO_PCI_COMMON_GFSELECT:
1134 val = proxy->gfselect;
1135 break;
1136 case VIRTIO_PCI_COMMON_GF:
1137 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1138 val = proxy->guest_features[proxy->gfselect];
1139 }
1140 break;
1141 case VIRTIO_PCI_COMMON_MSIX:
1142 val = vdev->config_vector;
1143 break;
1144 case VIRTIO_PCI_COMMON_NUMQ:
1145 for (i = 0; i < VIRTIO_QUEUE_MAX; ++i) {
1146 if (virtio_queue_get_num(vdev, i)) {
1147 val = i + 1;
1148 }
1149 }
1150 break;
1151 case VIRTIO_PCI_COMMON_STATUS:
1152 val = vdev->status;
1153 break;
1154 case VIRTIO_PCI_COMMON_CFGGENERATION:
1155 val = vdev->generation;
1156 break;
1157 case VIRTIO_PCI_COMMON_Q_SELECT:
1158 val = vdev->queue_sel;
1159 break;
1160 case VIRTIO_PCI_COMMON_Q_SIZE:
1161 val = virtio_queue_get_num(vdev, vdev->queue_sel);
1162 break;
1163 case VIRTIO_PCI_COMMON_Q_MSIX:
1164 val = virtio_queue_vector(vdev, vdev->queue_sel);
1165 break;
1166 case VIRTIO_PCI_COMMON_Q_ENABLE:
1167 val = proxy->vqs[vdev->queue_sel].enabled;
1168 break;
1169 case VIRTIO_PCI_COMMON_Q_NOFF:
1170 /* Simply map queues in order */
1171 val = vdev->queue_sel;
1172 break;
1173 case VIRTIO_PCI_COMMON_Q_DESCLO:
1174 val = proxy->vqs[vdev->queue_sel].desc[0];
1175 break;
1176 case VIRTIO_PCI_COMMON_Q_DESCHI:
1177 val = proxy->vqs[vdev->queue_sel].desc[1];
1178 break;
1179 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1180 val = proxy->vqs[vdev->queue_sel].avail[0];
1181 break;
1182 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1183 val = proxy->vqs[vdev->queue_sel].avail[1];
1184 break;
1185 case VIRTIO_PCI_COMMON_Q_USEDLO:
1186 val = proxy->vqs[vdev->queue_sel].used[0];
1187 break;
1188 case VIRTIO_PCI_COMMON_Q_USEDHI:
1189 val = proxy->vqs[vdev->queue_sel].used[1];
1190 break;
1191 default:
1192 val = 0;
1193 }
1194
1195 return val;
1196 }
1197
1198 static void virtio_pci_common_write(void *opaque, hwaddr addr,
1199 uint64_t val, unsigned size)
1200 {
1201 VirtIOPCIProxy *proxy = opaque;
1202 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1203
1204 switch (addr) {
1205 case VIRTIO_PCI_COMMON_DFSELECT:
1206 proxy->dfselect = val;
1207 break;
1208 case VIRTIO_PCI_COMMON_GFSELECT:
1209 proxy->gfselect = val;
1210 break;
1211 case VIRTIO_PCI_COMMON_GF:
1212 if (proxy->gfselect < ARRAY_SIZE(proxy->guest_features)) {
1213 proxy->guest_features[proxy->gfselect] = val;
1214 virtio_set_features(vdev,
1215 (((uint64_t)proxy->guest_features[1]) << 32) |
1216 proxy->guest_features[0]);
1217 }
1218 break;
1219 case VIRTIO_PCI_COMMON_MSIX:
1220 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
1221 /* Make it possible for guest to discover an error took place. */
1222 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1223 val = VIRTIO_NO_VECTOR;
1224 }
1225 vdev->config_vector = val;
1226 break;
1227 case VIRTIO_PCI_COMMON_STATUS:
1228 if (!(val & VIRTIO_CONFIG_S_DRIVER_OK)) {
1229 virtio_pci_stop_ioeventfd(proxy);
1230 }
1231
1232 virtio_set_status(vdev, val & 0xFF);
1233
1234 if (val & VIRTIO_CONFIG_S_DRIVER_OK) {
1235 virtio_pci_start_ioeventfd(proxy);
1236 }
1237
1238 if (vdev->status == 0) {
1239 virtio_pci_reset(DEVICE(proxy));
1240 }
1241
1242 break;
1243 case VIRTIO_PCI_COMMON_Q_SELECT:
1244 if (val < VIRTIO_QUEUE_MAX) {
1245 vdev->queue_sel = val;
1246 }
1247 break;
1248 case VIRTIO_PCI_COMMON_Q_SIZE:
1249 proxy->vqs[vdev->queue_sel].num = val;
1250 break;
1251 case VIRTIO_PCI_COMMON_Q_MSIX:
1252 msix_vector_unuse(&proxy->pci_dev,
1253 virtio_queue_vector(vdev, vdev->queue_sel));
1254 /* Make it possible for guest to discover an error took place. */
1255 if (msix_vector_use(&proxy->pci_dev, val) < 0) {
1256 val = VIRTIO_NO_VECTOR;
1257 }
1258 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
1259 break;
1260 case VIRTIO_PCI_COMMON_Q_ENABLE:
1261 virtio_queue_set_num(vdev, vdev->queue_sel,
1262 proxy->vqs[vdev->queue_sel].num);
1263 virtio_queue_set_rings(vdev, vdev->queue_sel,
1264 ((uint64_t)proxy->vqs[vdev->queue_sel].desc[1]) << 32 |
1265 proxy->vqs[vdev->queue_sel].desc[0],
1266 ((uint64_t)proxy->vqs[vdev->queue_sel].avail[1]) << 32 |
1267 proxy->vqs[vdev->queue_sel].avail[0],
1268 ((uint64_t)proxy->vqs[vdev->queue_sel].used[1]) << 32 |
1269 proxy->vqs[vdev->queue_sel].used[0]);
1270 proxy->vqs[vdev->queue_sel].enabled = 1;
1271 break;
1272 case VIRTIO_PCI_COMMON_Q_DESCLO:
1273 proxy->vqs[vdev->queue_sel].desc[0] = val;
1274 break;
1275 case VIRTIO_PCI_COMMON_Q_DESCHI:
1276 proxy->vqs[vdev->queue_sel].desc[1] = val;
1277 break;
1278 case VIRTIO_PCI_COMMON_Q_AVAILLO:
1279 proxy->vqs[vdev->queue_sel].avail[0] = val;
1280 break;
1281 case VIRTIO_PCI_COMMON_Q_AVAILHI:
1282 proxy->vqs[vdev->queue_sel].avail[1] = val;
1283 break;
1284 case VIRTIO_PCI_COMMON_Q_USEDLO:
1285 proxy->vqs[vdev->queue_sel].used[0] = val;
1286 break;
1287 case VIRTIO_PCI_COMMON_Q_USEDHI:
1288 proxy->vqs[vdev->queue_sel].used[1] = val;
1289 break;
1290 default:
1291 break;
1292 }
1293 }
1294
1295
1296 static uint64_t virtio_pci_notify_read(void *opaque, hwaddr addr,
1297 unsigned size)
1298 {
1299 return 0;
1300 }
1301
1302 static void virtio_pci_notify_write(void *opaque, hwaddr addr,
1303 uint64_t val, unsigned size)
1304 {
1305 VirtIODevice *vdev = opaque;
1306 VirtIOPCIProxy *proxy = VIRTIO_PCI(DEVICE(vdev)->parent_bus->parent);
1307 unsigned queue = addr / virtio_pci_queue_mem_mult(proxy);
1308
1309 if (queue < VIRTIO_QUEUE_MAX) {
1310 virtio_queue_notify(vdev, queue);
1311 }
1312 }
1313
1314 static void virtio_pci_notify_write_pio(void *opaque, hwaddr addr,
1315 uint64_t val, unsigned size)
1316 {
1317 VirtIODevice *vdev = opaque;
1318 unsigned queue = val;
1319
1320 if (queue < VIRTIO_QUEUE_MAX) {
1321 virtio_queue_notify(vdev, queue);
1322 }
1323 }
1324
1325 static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
1326 unsigned size)
1327 {
1328 VirtIOPCIProxy *proxy = opaque;
1329 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1330 uint64_t val = atomic_xchg(&vdev->isr, 0);
1331 pci_irq_deassert(&proxy->pci_dev);
1332
1333 return val;
1334 }
1335
1336 static void virtio_pci_isr_write(void *opaque, hwaddr addr,
1337 uint64_t val, unsigned size)
1338 {
1339 }
1340
1341 static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
1342 unsigned size)
1343 {
1344 VirtIODevice *vdev = opaque;
1345 uint64_t val = 0;
1346
1347 switch (size) {
1348 case 1:
1349 val = virtio_config_modern_readb(vdev, addr);
1350 break;
1351 case 2:
1352 val = virtio_config_modern_readw(vdev, addr);
1353 break;
1354 case 4:
1355 val = virtio_config_modern_readl(vdev, addr);
1356 break;
1357 }
1358 return val;
1359 }
1360
1361 static void virtio_pci_device_write(void *opaque, hwaddr addr,
1362 uint64_t val, unsigned size)
1363 {
1364 VirtIODevice *vdev = opaque;
1365 switch (size) {
1366 case 1:
1367 virtio_config_modern_writeb(vdev, addr, val);
1368 break;
1369 case 2:
1370 virtio_config_modern_writew(vdev, addr, val);
1371 break;
1372 case 4:
1373 virtio_config_modern_writel(vdev, addr, val);
1374 break;
1375 }
1376 }
1377
1378 static void virtio_pci_modern_regions_init(VirtIOPCIProxy *proxy)
1379 {
1380 static const MemoryRegionOps common_ops = {
1381 .read = virtio_pci_common_read,
1382 .write = virtio_pci_common_write,
1383 .impl = {
1384 .min_access_size = 1,
1385 .max_access_size = 4,
1386 },
1387 .endianness = DEVICE_LITTLE_ENDIAN,
1388 };
1389 static const MemoryRegionOps isr_ops = {
1390 .read = virtio_pci_isr_read,
1391 .write = virtio_pci_isr_write,
1392 .impl = {
1393 .min_access_size = 1,
1394 .max_access_size = 4,
1395 },
1396 .endianness = DEVICE_LITTLE_ENDIAN,
1397 };
1398 static const MemoryRegionOps device_ops = {
1399 .read = virtio_pci_device_read,
1400 .write = virtio_pci_device_write,
1401 .impl = {
1402 .min_access_size = 1,
1403 .max_access_size = 4,
1404 },
1405 .endianness = DEVICE_LITTLE_ENDIAN,
1406 };
1407 static const MemoryRegionOps notify_ops = {
1408 .read = virtio_pci_notify_read,
1409 .write = virtio_pci_notify_write,
1410 .impl = {
1411 .min_access_size = 1,
1412 .max_access_size = 4,
1413 },
1414 .endianness = DEVICE_LITTLE_ENDIAN,
1415 };
1416 static const MemoryRegionOps notify_pio_ops = {
1417 .read = virtio_pci_notify_read,
1418 .write = virtio_pci_notify_write_pio,
1419 .impl = {
1420 .min_access_size = 1,
1421 .max_access_size = 4,
1422 },
1423 .endianness = DEVICE_LITTLE_ENDIAN,
1424 };
1425
1426
1427 memory_region_init_io(&proxy->common.mr, OBJECT(proxy),
1428 &common_ops,
1429 proxy,
1430 "virtio-pci-common",
1431 proxy->common.size);
1432
1433 memory_region_init_io(&proxy->isr.mr, OBJECT(proxy),
1434 &isr_ops,
1435 proxy,
1436 "virtio-pci-isr",
1437 proxy->isr.size);
1438
1439 memory_region_init_io(&proxy->device.mr, OBJECT(proxy),
1440 &device_ops,
1441 virtio_bus_get_device(&proxy->bus),
1442 "virtio-pci-device",
1443 proxy->device.size);
1444
1445 memory_region_init_io(&proxy->notify.mr, OBJECT(proxy),
1446 &notify_ops,
1447 virtio_bus_get_device(&proxy->bus),
1448 "virtio-pci-notify",
1449 proxy->notify.size);
1450
1451 memory_region_init_io(&proxy->notify_pio.mr, OBJECT(proxy),
1452 &notify_pio_ops,
1453 virtio_bus_get_device(&proxy->bus),
1454 "virtio-pci-notify-pio",
1455 proxy->notify_pio.size);
1456 }
1457
1458 static void virtio_pci_modern_region_map(VirtIOPCIProxy *proxy,
1459 VirtIOPCIRegion *region,
1460 struct virtio_pci_cap *cap,
1461 MemoryRegion *mr,
1462 uint8_t bar)
1463 {
1464 memory_region_add_subregion(mr, region->offset, &region->mr);
1465
1466 cap->cfg_type = region->type;
1467 cap->bar = bar;
1468 cap->offset = cpu_to_le32(region->offset);
1469 cap->length = cpu_to_le32(region->size);
1470 virtio_pci_add_mem_cap(proxy, cap);
1471
1472 }
1473
1474 static void virtio_pci_modern_mem_region_map(VirtIOPCIProxy *proxy,
1475 VirtIOPCIRegion *region,
1476 struct virtio_pci_cap *cap)
1477 {
1478 virtio_pci_modern_region_map(proxy, region, cap,
1479 &proxy->modern_bar, proxy->modern_mem_bar_idx);
1480 }
1481
1482 static void virtio_pci_modern_io_region_map(VirtIOPCIProxy *proxy,
1483 VirtIOPCIRegion *region,
1484 struct virtio_pci_cap *cap)
1485 {
1486 virtio_pci_modern_region_map(proxy, region, cap,
1487 &proxy->io_bar, proxy->modern_io_bar_idx);
1488 }
1489
1490 static void virtio_pci_modern_mem_region_unmap(VirtIOPCIProxy *proxy,
1491 VirtIOPCIRegion *region)
1492 {
1493 memory_region_del_subregion(&proxy->modern_bar,
1494 &region->mr);
1495 }
1496
1497 static void virtio_pci_modern_io_region_unmap(VirtIOPCIProxy *proxy,
1498 VirtIOPCIRegion *region)
1499 {
1500 memory_region_del_subregion(&proxy->io_bar,
1501 &region->mr);
1502 }
1503
1504 static void virtio_pci_pre_plugged(DeviceState *d, Error **errp)
1505 {
1506 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1507 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1508
1509 if (virtio_pci_modern(proxy)) {
1510 virtio_add_feature(&vdev->host_features, VIRTIO_F_VERSION_1);
1511 }
1512
1513 virtio_add_feature(&vdev->host_features, VIRTIO_F_BAD_FEATURE);
1514 }
1515
1516 /* This is called by virtio-bus just after the device is plugged. */
1517 static void virtio_pci_device_plugged(DeviceState *d, Error **errp)
1518 {
1519 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1520 VirtioBusState *bus = &proxy->bus;
1521 bool legacy = virtio_pci_legacy(proxy);
1522 bool modern;
1523 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
1524 uint8_t *config;
1525 uint32_t size;
1526 VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
1527
1528 /*
1529 * Virtio capabilities present without
1530 * VIRTIO_F_VERSION_1 confuses guests
1531 */
1532 if (!proxy->ignore_backend_features &&
1533 !virtio_has_feature(vdev->host_features, VIRTIO_F_VERSION_1)) {
1534 virtio_pci_disable_modern(proxy);
1535
1536 if (!legacy) {
1537 error_setg(errp, "Device doesn't support modern mode, and legacy"
1538 " mode is disabled");
1539 error_append_hint(errp, "Set disable-legacy to off\n");
1540
1541 return;
1542 }
1543 }
1544
1545 modern = virtio_pci_modern(proxy);
1546
1547 config = proxy->pci_dev.config;
1548 if (proxy->class_code) {
1549 pci_config_set_class(config, proxy->class_code);
1550 }
1551
1552 if (legacy) {
1553 if (virtio_host_has_feature(vdev, VIRTIO_F_IOMMU_PLATFORM)) {
1554 error_setg(errp, "VIRTIO_F_IOMMU_PLATFORM was supported by"
1555 " neither legacy nor transitional device");
1556 return ;
1557 }
1558 /*
1559 * Legacy and transitional devices use specific subsystem IDs.
1560 * Note that the subsystem vendor ID (config + PCI_SUBSYSTEM_VENDOR_ID)
1561 * is set to PCI_SUBVENDOR_ID_REDHAT_QUMRANET by default.
1562 */
1563 pci_set_word(config + PCI_SUBSYSTEM_ID, virtio_bus_get_vdev_id(bus));
1564 } else {
1565 /* pure virtio-1.0 */
1566 pci_set_word(config + PCI_VENDOR_ID,
1567 PCI_VENDOR_ID_REDHAT_QUMRANET);
1568 pci_set_word(config + PCI_DEVICE_ID,
1569 0x1040 + virtio_bus_get_vdev_id(bus));
1570 pci_config_set_revision(config, 1);
1571 }
1572 config[PCI_INTERRUPT_PIN] = 1;
1573
1574
1575 if (modern) {
1576 struct virtio_pci_cap cap = {
1577 .cap_len = sizeof cap,
1578 };
1579 struct virtio_pci_notify_cap notify = {
1580 .cap.cap_len = sizeof notify,
1581 .notify_off_multiplier =
1582 cpu_to_le32(virtio_pci_queue_mem_mult(proxy)),
1583 };
1584 struct virtio_pci_cfg_cap cfg = {
1585 .cap.cap_len = sizeof cfg,
1586 .cap.cfg_type = VIRTIO_PCI_CAP_PCI_CFG,
1587 };
1588 struct virtio_pci_notify_cap notify_pio = {
1589 .cap.cap_len = sizeof notify,
1590 .notify_off_multiplier = cpu_to_le32(0x0),
1591 };
1592
1593 struct virtio_pci_cfg_cap *cfg_mask;
1594
1595 virtio_pci_modern_regions_init(proxy);
1596
1597 virtio_pci_modern_mem_region_map(proxy, &proxy->common, &cap);
1598 virtio_pci_modern_mem_region_map(proxy, &proxy->isr, &cap);
1599 virtio_pci_modern_mem_region_map(proxy, &proxy->device, &cap);
1600 virtio_pci_modern_mem_region_map(proxy, &proxy->notify, &notify.cap);
1601
1602 if (modern_pio) {
1603 memory_region_init(&proxy->io_bar, OBJECT(proxy),
1604 "virtio-pci-io", 0x4);
1605
1606 pci_register_bar(&proxy->pci_dev, proxy->modern_io_bar_idx,
1607 PCI_BASE_ADDRESS_SPACE_IO, &proxy->io_bar);
1608
1609 virtio_pci_modern_io_region_map(proxy, &proxy->notify_pio,
1610 &notify_pio.cap);
1611 }
1612
1613 pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx,
1614 PCI_BASE_ADDRESS_SPACE_MEMORY |
1615 PCI_BASE_ADDRESS_MEM_PREFETCH |
1616 PCI_BASE_ADDRESS_MEM_TYPE_64,
1617 &proxy->modern_bar);
1618
1619 proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap);
1620 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap);
1621 pci_set_byte(&cfg_mask->cap.bar, ~0x0);
1622 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0);
1623 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0);
1624 pci_set_long(cfg_mask->pci_cfg_data, ~0x0);
1625 }
1626
1627 if (proxy->nvectors) {
1628 int err = msix_init_exclusive_bar(&proxy->pci_dev, proxy->nvectors,
1629 proxy->msix_bar_idx, NULL);
1630 if (err) {
1631 /* Notice when a system that supports MSIx can't initialize it */
1632 if (err != -ENOTSUP) {
1633 warn_report("unable to init msix vectors to %" PRIu32,
1634 proxy->nvectors);
1635 }
1636 proxy->nvectors = 0;
1637 }
1638 }
1639
1640 proxy->pci_dev.config_write = virtio_write_config;
1641 proxy->pci_dev.config_read = virtio_read_config;
1642
1643 if (legacy) {
1644 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev)
1645 + virtio_bus_get_vdev_config_len(bus);
1646 size = pow2ceil(size);
1647
1648 memory_region_init_io(&proxy->bar, OBJECT(proxy),
1649 &virtio_pci_config_ops,
1650 proxy, "virtio-pci", size);
1651
1652 pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx,
1653 PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar);
1654 }
1655 }
1656
1657 static void virtio_pci_device_unplugged(DeviceState *d)
1658 {
1659 VirtIOPCIProxy *proxy = VIRTIO_PCI(d);
1660 bool modern = virtio_pci_modern(proxy);
1661 bool modern_pio = proxy->flags & VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY;
1662
1663 virtio_pci_stop_ioeventfd(proxy);
1664
1665 if (modern) {
1666 virtio_pci_modern_mem_region_unmap(proxy, &proxy->common);
1667 virtio_pci_modern_mem_region_unmap(proxy, &proxy->isr);
1668 virtio_pci_modern_mem_region_unmap(proxy, &proxy->device);
1669 virtio_pci_modern_mem_region_unmap(proxy, &proxy->notify);
1670 if (modern_pio) {
1671 virtio_pci_modern_io_region_unmap(proxy, &proxy->notify_pio);
1672 }
1673 }
1674 }
1675
1676 static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp)
1677 {
1678 VirtIOPCIProxy *proxy = VIRTIO_PCI(pci_dev);
1679 VirtioPCIClass *k = VIRTIO_PCI_GET_CLASS(pci_dev);
1680 bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) &&
1681 !pci_bus_is_root(pci_get_bus(pci_dev));
1682
1683 if (kvm_enabled() && !kvm_has_many_ioeventfds()) {
1684 proxy->flags &= ~VIRTIO_PCI_FLAG_USE_IOEVENTFD;
1685 }
1686
1687 /*
1688 * virtio pci bar layout used by default.
1689 * subclasses can re-arrange things if needed.
1690 *
1691 * region 0 -- virtio legacy io bar
1692 * region 1 -- msi-x bar
1693 * region 4+5 -- virtio modern memory (64bit) bar
1694 *
1695 */
1696 proxy->legacy_io_bar_idx = 0;
1697 proxy->msix_bar_idx = 1;
1698 proxy->modern_io_bar_idx = 2;
1699 proxy->modern_mem_bar_idx = 4;
1700
1701 proxy->common.offset = 0x0;
1702 proxy->common.size = 0x1000;
1703 proxy->common.type = VIRTIO_PCI_CAP_COMMON_CFG;
1704
1705 proxy->isr.offset = 0x1000;
1706 proxy->isr.size = 0x1000;
1707 proxy->isr.type = VIRTIO_PCI_CAP_ISR_CFG;
1708
1709 proxy->device.offset = 0x2000;
1710 proxy->device.size = 0x1000;
1711 proxy->device.type = VIRTIO_PCI_CAP_DEVICE_CFG;
1712
1713 proxy->notify.offset = 0x3000;
1714 proxy->notify.size = virtio_pci_queue_mem_mult(proxy) * VIRTIO_QUEUE_MAX;
1715 proxy->notify.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1716
1717 proxy->notify_pio.offset = 0x0;
1718 proxy->notify_pio.size = 0x4;
1719 proxy->notify_pio.type = VIRTIO_PCI_CAP_NOTIFY_CFG;
1720
1721 /* subclasses can enforce modern, so do this unconditionally */
1722 memory_region_init(&proxy->modern_bar, OBJECT(proxy), "virtio-pci",
1723 /* PCI BAR regions must be powers of 2 */
1724 pow2ceil(proxy->notify.offset + proxy->notify.size));
1725
1726 if ((proxy->disable_legacy == ON_OFF_AUTO_ON) ||
1727 ((proxy->disable_legacy == ON_OFF_AUTO_AUTO) && pcie_port)) {
1728 if (proxy->disable_modern) {
1729 error_setg(errp, "device cannot work as neither modern nor "
1730 "legacy mode is enabled");
1731 error_append_hint(errp, "Set either disable-modern or "
1732 "disable-legacy to off\n");
1733 return;
1734 }
1735 proxy->mode = VIRTIO_PCI_MODE_MODERN;
1736 } else {
1737 if (proxy->disable_modern) {
1738 proxy->mode = VIRTIO_PCI_MODE_LEGACY;
1739 } else {
1740 proxy->mode = VIRTIO_PCI_MODE_TRANSITIONAL;
1741 }
1742 }
1743
1744 if (pcie_port && pci_is_express(pci_dev)) {
1745 int pos;
1746
1747 pos = pcie_endpoint_cap_init(pci_dev, 0);
1748 assert(pos > 0);
1749
1750 pos = pci_add_capability(pci_dev, PCI_CAP_ID_PM, 0,
1751 PCI_PM_SIZEOF, errp);
1752 if (pos < 0) {
1753 return;
1754 }
1755
1756 pci_dev->exp.pm_cap = pos;
1757
1758 /*
1759 * Indicates that this function complies with revision 1.2 of the
1760 * PCI Power Management Interface Specification.
1761 */
1762 pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3);
1763
1764 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) {
1765 /* Init error enabling flags */
1766 pcie_cap_deverr_init(pci_dev);
1767 }
1768
1769 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_LNKCTL) {
1770 /* Init Link Control Register */
1771 pcie_cap_lnkctl_init(pci_dev);
1772 }
1773
1774 if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) {
1775 /* Init Power Management Control Register */
1776 pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
1777 PCI_PM_CTRL_STATE_MASK);
1778 }
1779
1780 if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
1781 pcie_ats_init(pci_dev, 256);
1782 }
1783
1784 } else {
1785 /*
1786 * make future invocations of pci_is_express() return false
1787 * and pci_config_size() return PCI_CONFIG_SPACE_SIZE.
1788 */
1789 pci_dev->cap_present &= ~QEMU_PCI_CAP_EXPRESS;
1790 }
1791
1792 virtio_pci_bus_new(&proxy->bus, sizeof(proxy->bus), proxy);
1793 if (k->realize) {
1794 k->realize(proxy, errp);
1795 }
1796 }
1797
1798 static void virtio_pci_exit(PCIDevice *pci_dev)
1799 {
1800 msix_uninit_exclusive_bar(pci_dev);
1801 }
1802
1803 static void virtio_pci_reset(DeviceState *qdev)
1804 {
1805 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1806 VirtioBusState *bus = VIRTIO_BUS(&proxy->bus);
1807 PCIDevice *dev = PCI_DEVICE(qdev);
1808 int i;
1809
1810 virtio_pci_stop_ioeventfd(proxy);
1811 virtio_bus_reset(bus);
1812 msix_unuse_all_vectors(&proxy->pci_dev);
1813
1814 for (i = 0; i < VIRTIO_QUEUE_MAX; i++) {
1815 proxy->vqs[i].enabled = 0;
1816 proxy->vqs[i].num = 0;
1817 proxy->vqs[i].desc[0] = proxy->vqs[i].desc[1] = 0;
1818 proxy->vqs[i].avail[0] = proxy->vqs[i].avail[1] = 0;
1819 proxy->vqs[i].used[0] = proxy->vqs[i].used[1] = 0;
1820 }
1821
1822 if (pci_is_express(dev)) {
1823 pcie_cap_deverr_reset(dev);
1824 pcie_cap_lnkctl_reset(dev);
1825
1826 pci_set_word(dev->config + dev->exp.pm_cap + PCI_PM_CTRL, 0);
1827 }
1828 }
1829
1830 static Property virtio_pci_properties[] = {
1831 DEFINE_PROP_BIT("virtio-pci-bus-master-bug-migration", VirtIOPCIProxy, flags,
1832 VIRTIO_PCI_FLAG_BUS_MASTER_BUG_MIGRATION_BIT, false),
1833 DEFINE_PROP_BIT("migrate-extra", VirtIOPCIProxy, flags,
1834 VIRTIO_PCI_FLAG_MIGRATE_EXTRA_BIT, true),
1835 DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
1836 VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
1837 DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
1838 VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
1839 DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags,
1840 VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false),
1841 DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy,
1842 ignore_backend_features, false),
1843 DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags,
1844 VIRTIO_PCI_FLAG_ATS_BIT, false),
1845 DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags,
1846 VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
1847 DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
1848 VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
1849 DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
1850 VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
1851 DEFINE_PROP_END_OF_LIST(),
1852 };
1853
1854 static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp)
1855 {
1856 VirtioPCIClass *vpciklass = VIRTIO_PCI_GET_CLASS(qdev);
1857 VirtIOPCIProxy *proxy = VIRTIO_PCI(qdev);
1858 PCIDevice *pci_dev = &proxy->pci_dev;
1859
1860 if (!(proxy->flags & VIRTIO_PCI_FLAG_DISABLE_PCIE) &&
1861 virtio_pci_modern(proxy)) {
1862 pci_dev->cap_present |= QEMU_PCI_CAP_EXPRESS;
1863 }
1864
1865 vpciklass->parent_dc_realize(qdev, errp);
1866 }
1867
1868 static void virtio_pci_class_init(ObjectClass *klass, void *data)
1869 {
1870 DeviceClass *dc = DEVICE_CLASS(klass);
1871 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
1872 VirtioPCIClass *vpciklass = VIRTIO_PCI_CLASS(klass);
1873
1874 dc->props = virtio_pci_properties;
1875 k->realize = virtio_pci_realize;
1876 k->exit = virtio_pci_exit;
1877 k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
1878 k->revision = VIRTIO_PCI_ABI_VERSION;
1879 k->class_id = PCI_CLASS_OTHERS;
1880 device_class_set_parent_realize(dc, virtio_pci_dc_realize,
1881 &vpciklass->parent_dc_realize);
1882 dc->reset = virtio_pci_reset;
1883 }
1884
1885 static const TypeInfo virtio_pci_info = {
1886 .name = TYPE_VIRTIO_PCI,
1887 .parent = TYPE_PCI_DEVICE,
1888 .instance_size = sizeof(VirtIOPCIProxy),
1889 .class_init = virtio_pci_class_init,
1890 .class_size = sizeof(VirtioPCIClass),
1891 .abstract = true,
1892 };
1893
1894 static Property virtio_pci_generic_properties[] = {
1895 DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy,
1896 ON_OFF_AUTO_AUTO),
1897 DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false),
1898 DEFINE_PROP_END_OF_LIST(),
1899 };
1900
1901 static void virtio_pci_base_class_init(ObjectClass *klass, void *data)
1902 {
1903 const VirtioPCIDeviceTypeInfo *t = data;
1904 if (t->class_init) {
1905 t->class_init(klass, NULL);
1906 }
1907 }
1908
1909 static void virtio_pci_generic_class_init(ObjectClass *klass, void *data)
1910 {
1911 DeviceClass *dc = DEVICE_CLASS(klass);
1912
1913 dc->props = virtio_pci_generic_properties;
1914 }
1915
1916 static void virtio_pci_transitional_instance_init(Object *obj)
1917 {
1918 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
1919
1920 proxy->disable_legacy = ON_OFF_AUTO_OFF;
1921 proxy->disable_modern = false;
1922 }
1923
1924 static void virtio_pci_non_transitional_instance_init(Object *obj)
1925 {
1926 VirtIOPCIProxy *proxy = VIRTIO_PCI(obj);
1927
1928 proxy->disable_legacy = ON_OFF_AUTO_ON;
1929 proxy->disable_modern = false;
1930 }
1931
1932 void virtio_pci_types_register(const VirtioPCIDeviceTypeInfo *t)
1933 {
1934 char *base_name = NULL;
1935 TypeInfo base_type_info = {
1936 .name = t->base_name,
1937 .parent = t->parent ? t->parent : TYPE_VIRTIO_PCI,
1938 .instance_size = t->instance_size,
1939 .instance_init = t->instance_init,
1940 .class_size = t->class_size,
1941 .abstract = true,
1942 .interfaces = t->interfaces,
1943 };
1944 TypeInfo generic_type_info = {
1945 .name = t->generic_name,
1946 .parent = base_type_info.name,
1947 .class_init = virtio_pci_generic_class_init,
1948 .interfaces = (InterfaceInfo[]) {
1949 { INTERFACE_PCIE_DEVICE },
1950 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
1951 { }
1952 },
1953 };
1954
1955 if (!base_type_info.name) {
1956 /* No base type -> register a single generic device type */
1957 /* use intermediate %s-base-type to add generic device props */
1958 base_name = g_strdup_printf("%s-base-type", t->generic_name);
1959 base_type_info.name = base_name;
1960 base_type_info.class_init = virtio_pci_generic_class_init;
1961
1962 generic_type_info.parent = base_name;
1963 generic_type_info.class_init = virtio_pci_base_class_init;
1964 generic_type_info.class_data = (void *)t;
1965
1966 assert(!t->non_transitional_name);
1967 assert(!t->transitional_name);
1968 } else {
1969 base_type_info.class_init = virtio_pci_base_class_init;
1970 base_type_info.class_data = (void *)t;
1971 }
1972
1973 type_register(&base_type_info);
1974 if (generic_type_info.name) {
1975 type_register(&generic_type_info);
1976 }
1977
1978 if (t->non_transitional_name) {
1979 const TypeInfo non_transitional_type_info = {
1980 .name = t->non_transitional_name,
1981 .parent = base_type_info.name,
1982 .instance_init = virtio_pci_non_transitional_instance_init,
1983 .interfaces = (InterfaceInfo[]) {
1984 { INTERFACE_PCIE_DEVICE },
1985 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
1986 { }
1987 },
1988 };
1989 type_register(&non_transitional_type_info);
1990 }
1991
1992 if (t->transitional_name) {
1993 const TypeInfo transitional_type_info = {
1994 .name = t->transitional_name,
1995 .parent = base_type_info.name,
1996 .instance_init = virtio_pci_transitional_instance_init,
1997 .interfaces = (InterfaceInfo[]) {
1998 /*
1999 * Transitional virtio devices work only as Conventional PCI
2000 * devices because they require PIO ports.
2001 */
2002 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
2003 { }
2004 },
2005 };
2006 type_register(&transitional_type_info);
2007 }
2008 g_free(base_name);
2009 }
2010
2011 /* virtio-pci-bus */
2012
2013 static void virtio_pci_bus_new(VirtioBusState *bus, size_t bus_size,
2014 VirtIOPCIProxy *dev)
2015 {
2016 DeviceState *qdev = DEVICE(dev);
2017 char virtio_bus_name[] = "virtio-bus";
2018
2019 qbus_create_inplace(bus, bus_size, TYPE_VIRTIO_PCI_BUS, qdev,
2020 virtio_bus_name);
2021 }
2022
2023 static void virtio_pci_bus_class_init(ObjectClass *klass, void *data)
2024 {
2025 BusClass *bus_class = BUS_CLASS(klass);
2026 VirtioBusClass *k = VIRTIO_BUS_CLASS(klass);
2027 bus_class->max_dev = 1;
2028 k->notify = virtio_pci_notify;
2029 k->save_config = virtio_pci_save_config;
2030 k->load_config = virtio_pci_load_config;
2031 k->save_queue = virtio_pci_save_queue;
2032 k->load_queue = virtio_pci_load_queue;
2033 k->save_extra_state = virtio_pci_save_extra_state;
2034 k->load_extra_state = virtio_pci_load_extra_state;
2035 k->has_extra_state = virtio_pci_has_extra_state;
2036 k->query_guest_notifiers = virtio_pci_query_guest_notifiers;
2037 k->set_guest_notifiers = virtio_pci_set_guest_notifiers;
2038 k->set_host_notifier_mr = virtio_pci_set_host_notifier_mr;
2039 k->vmstate_change = virtio_pci_vmstate_change;
2040 k->pre_plugged = virtio_pci_pre_plugged;
2041 k->device_plugged = virtio_pci_device_plugged;
2042 k->device_unplugged = virtio_pci_device_unplugged;
2043 k->query_nvectors = virtio_pci_query_nvectors;
2044 k->ioeventfd_enabled = virtio_pci_ioeventfd_enabled;
2045 k->ioeventfd_assign = virtio_pci_ioeventfd_assign;
2046 k->get_dma_as = virtio_pci_get_dma_as;
2047 }
2048
2049 static const TypeInfo virtio_pci_bus_info = {
2050 .name = TYPE_VIRTIO_PCI_BUS,
2051 .parent = TYPE_VIRTIO_BUS,
2052 .instance_size = sizeof(VirtioPCIBusState),
2053 .class_init = virtio_pci_bus_class_init,
2054 };
2055
2056 static void virtio_pci_register_types(void)
2057 {
2058 /* Base types: */
2059 type_register_static(&virtio_pci_bus_info);
2060 type_register_static(&virtio_pci_info);
2061 }
2062
2063 type_init(virtio_pci_register_types)
2064
AR7 emulation for QEMU