hw/pci-bridge/pci_bridge_dev.c

   1 /*
   2  * Standard PCI Bridge Device
   3  *
   4  * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com>
   5  *
   6  * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License along
  19  * with this program; if not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "qapi/error.h"
  24 #include "hw/pci/pci_bridge.h"
  25 #include "hw/pci/pci_ids.h"
  26 #include "hw/pci/msi.h"
  27 #include "hw/pci/shpc.h"
  28 #include "hw/pci/slotid_cap.h"
  29 #include "exec/memory.h"
  30 #include "hw/pci/pci_bus.h"
  31 #include "hw/hotplug.h"
  32
  33 #define TYPE_PCI_BRIDGE_DEV      "pci-bridge"
  34 #define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat"
  35 #define PCI_BRIDGE_DEV(obj) \
  36     OBJECT_CHECK(PCIBridgeDev, (obj), TYPE_PCI_BRIDGE_DEV)
  37
  38 struct PCIBridgeDev {
  39     /*< private >*/
  40     PCIBridge parent_obj;
  41     /*< public >*/
  42
  43     MemoryRegion bar;
  44     uint8_t chassis_nr;
  45 #define PCI_BRIDGE_DEV_F_SHPC_REQ 0
  46     uint32_t flags;
  47
  48     OnOffAuto msi;
  49
  50     /* additional resources to reserve */
  51     PCIResReserve res_reserve;
  52 };
  53 typedef struct PCIBridgeDev PCIBridgeDev;
  54
  55 static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp)
  56 {
  57     PCIBridge *br = PCI_BRIDGE(dev);
  58     PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
  59     int err;
  60     Error *local_err = NULL;
  61
  62     pci_bridge_initfn(dev, TYPE_PCI_BUS);
  63
  64     if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) {
  65         dev->config[PCI_INTERRUPT_PIN] = 0x1;
  66         memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar",
  67                            shpc_bar_size(dev));
  68         err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0, errp);
  69         if (err) {
  70             goto shpc_error;
  71         }
  72     } else {
  73         /* MSI is not applicable without SHPC */
  74         bridge_dev->msi = ON_OFF_AUTO_OFF;
  75     }
  76
  77     err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0, errp);
  78     if (err) {
  79         goto slotid_error;
  80     }
  81
  82     if (bridge_dev->msi != ON_OFF_AUTO_OFF) {
  83         /* it means SHPC exists, because MSI is needed by SHPC */
  84
  85         err = msi_init(dev, 0, 1, true, true, &local_err);
  86         /* Any error other than -ENOTSUP(board's MSI support is broken)
  87          * is a programming error */
  88         assert(!err || err == -ENOTSUP);
  89         if (err && bridge_dev->msi == ON_OFF_AUTO_ON) {
  90             /* Can't satisfy user's explicit msi=on request, fail */
  91             error_append_hint(&local_err, "You have to use msi=auto (default) "
  92                     "or msi=off with this machine type.\n");
  93             error_propagate(errp, local_err);
  94             goto msi_error;
  95         }
  96         assert(!local_err || bridge_dev->msi == ON_OFF_AUTO_AUTO);
  97         /* With msi=auto, we fall back to MSI off silently */
  98         error_free(local_err);
  99     }
 100
 101     err = pci_bridge_qemu_reserve_cap_init(dev, 0,
 102                                          bridge_dev->res_reserve, errp);
 103     if (err) {
 104         goto cap_error;
 105     }
 106
 107     if (shpc_present(dev)) {
 108         /* TODO: spec recommends using 64 bit prefetcheable BAR.
 109          * Check whether that works well. */
 110         pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
 111                          PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar);
 112     }
 113     return;
 114
 115 cap_error:
 116     msi_uninit(dev);
 117 msi_error:
 118     slotid_cap_cleanup(dev);
 119 slotid_error:
 120     if (shpc_present(dev)) {
 121         shpc_cleanup(dev, &bridge_dev->bar);
 122     }
 123 shpc_error:
 124     pci_bridge_exitfn(dev);
 125 }
 126
 127 static void pci_bridge_dev_exitfn(PCIDevice *dev)
 128 {
 129     PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
 130
 131     pci_del_capability(dev, PCI_CAP_ID_VNDR, sizeof(PCIBridgeQemuCap));
 132     if (msi_present(dev)) {
 133         msi_uninit(dev);
 134     }
 135     slotid_cap_cleanup(dev);
 136     if (shpc_present(dev)) {
 137         shpc_cleanup(dev, &bridge_dev->bar);
 138     }
 139     pci_bridge_exitfn(dev);
 140 }
 141
 142 static void pci_bridge_dev_instance_finalize(Object *obj)
 143 {
 144     /* this function is idempotent and handles (PCIDevice.shpc == NULL) */
 145     shpc_free(PCI_DEVICE(obj));
 146 }
 147
 148 static void pci_bridge_dev_write_config(PCIDevice *d,
 149                                         uint32_t address, uint32_t val, int len)
 150 {
 151     pci_bridge_write_config(d, address, val, len);
 152     if (msi_present(d)) {
 153         msi_write_config(d, address, val, len);
 154     }
 155     if (shpc_present(d)) {
 156         shpc_cap_write_config(d, address, val, len);
 157     }
 158 }
 159
 160 static void qdev_pci_bridge_dev_reset(DeviceState *qdev)
 161 {
 162     PCIDevice *dev = PCI_DEVICE(qdev);
 163
 164     pci_bridge_reset(qdev);
 165     if (shpc_present(dev)) {
 166         shpc_reset(dev);
 167     }
 168 }
 169
 170 static Property pci_bridge_dev_properties[] = {
 171                     /* Note: 0 is not a legal chassis number. */
 172     DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr,
 173                       0),
 174     DEFINE_PROP_ON_OFF_AUTO(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, msi,
 175                             ON_OFF_AUTO_AUTO),
 176     DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags,
 177                     PCI_BRIDGE_DEV_F_SHPC_REQ, true),
 178     DEFINE_PROP_UINT32("bus-reserve", PCIBridgeDev,
 179                        res_reserve.bus, -1),
 180     DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
 181                      res_reserve.io, -1),
 182     DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
 183                      res_reserve.mem_non_pref, -1),
 184     DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
 185                      res_reserve.mem_pref_32, -1),
 186     DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
 187                      res_reserve.mem_pref_64, -1),
 188
 189     DEFINE_PROP_END_OF_LIST(),
 190 };
 191
 192 static bool pci_device_shpc_present(void *opaque, int version_id)
 193 {
 194     PCIDevice *dev = opaque;
 195
 196     return shpc_present(dev);
 197 }
 198
 199 static const VMStateDescription pci_bridge_dev_vmstate = {
 200     .name = "pci_bridge",
 201     .priority = MIG_PRI_PCI_BUS,
 202     .fields = (VMStateField[]) {
 203         VMSTATE_PCI_DEVICE(parent_obj, PCIBridge),
 204         SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present),
 205         VMSTATE_END_OF_LIST()
 206     }
 207 };
 208
 209 void pci_bridge_dev_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 210                             Error **errp)
 211 {
 212     PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
 213
 214     if (!shpc_present(pci_hotplug_dev)) {
 215         error_setg(errp, "standard hotplug controller has been disabled for "
 216                    "this %s", object_get_typename(OBJECT(hotplug_dev)));
 217         return;
 218     }
 219     shpc_device_plug_cb(hotplug_dev, dev, errp);
 220 }
 221
 222 void pci_bridge_dev_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
 223                               Error **errp)
 224 {
 225     PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
 226
 227     g_assert(shpc_present(pci_hotplug_dev));
 228     shpc_device_unplug_cb(hotplug_dev, dev, errp);
 229 }
 230
 231 void pci_bridge_dev_unplug_request_cb(HotplugHandler *hotplug_dev,
 232                                       DeviceState *dev, Error **errp)
 233 {
 234     PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
 235
 236     if (!shpc_present(pci_hotplug_dev)) {
 237         error_setg(errp, "standard hotplug controller has been disabled for "
 238                    "this %s", object_get_typename(OBJECT(hotplug_dev)));
 239         return;
 240     }
 241     shpc_device_unplug_request_cb(hotplug_dev, dev, errp);
 242 }
 243
 244 static void pci_bridge_dev_class_init(ObjectClass *klass, void *data)
 245 {
 246     DeviceClass *dc = DEVICE_CLASS(klass);
 247     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 248     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
 249
 250     k->realize = pci_bridge_dev_realize;
 251     k->exit = pci_bridge_dev_exitfn;
 252     k->config_write = pci_bridge_dev_write_config;
 253     k->vendor_id = PCI_VENDOR_ID_REDHAT;
 254     k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE;
 255     k->class_id = PCI_CLASS_BRIDGE_PCI;
 256     k->is_bridge = 1,
 257     dc->desc = "Standard PCI Bridge";
 258     dc->reset = qdev_pci_bridge_dev_reset;
 259     dc->props = pci_bridge_dev_properties;
 260     dc->vmsd = &pci_bridge_dev_vmstate;
 261     set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
 262     hc->plug = pci_bridge_dev_plug_cb;
 263     hc->unplug = pci_bridge_dev_unplug_cb;
 264     hc->unplug_request = pci_bridge_dev_unplug_request_cb;
 265 }
 266
 267 static const TypeInfo pci_bridge_dev_info = {
 268     .name              = TYPE_PCI_BRIDGE_DEV,
 269     .parent            = TYPE_PCI_BRIDGE,
 270     .instance_size     = sizeof(PCIBridgeDev),
 271     .class_init        = pci_bridge_dev_class_init,
 272     .instance_finalize = pci_bridge_dev_instance_finalize,
 273     .interfaces = (InterfaceInfo[]) {
 274         { TYPE_HOTPLUG_HANDLER },
 275         { INTERFACE_CONVENTIONAL_PCI_DEVICE },
 276         { }
 277     }
 278 };
 279
 280 /*
 281  * Multiseat bridge.  Same as the standard pci bridge, only with a
 282  * different pci id, so we can match it easily in the guest for
 283  * automagic multiseat configuration.  See docs/multiseat.txt for more.
 284  */
 285 static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data)
 286 {
 287     DeviceClass *dc = DEVICE_CLASS(klass);
 288     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 289
 290     k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT;
 291     dc->desc = "Standard PCI Bridge (multiseat)";
 292 }
 293
 294 static const TypeInfo pci_bridge_dev_seat_info = {
 295     .name              = TYPE_PCI_BRIDGE_SEAT_DEV,
 296     .parent            = TYPE_PCI_BRIDGE_DEV,
 297     .instance_size     = sizeof(PCIBridgeDev),
 298     .class_init        = pci_bridge_dev_seat_class_init,
 299 };
 300
 301 static void pci_bridge_dev_register(void)
 302 {
 303     type_register_static(&pci_bridge_dev_info);
 304     type_register_static(&pci_bridge_dev_seat_info);
 305 }
 306
 307 type_init(pci_bridge_dev_register);