2 * Optimizations for Tiny Code Generator for QEMU
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #include "qemu/osdep.h"
27 #include "tcg/tcg-op.h"
29 #define CASE_OP_32_64(x) \
30 glue(glue(case INDEX_op_, x), _i32): \
31 glue(glue(case INDEX_op_, x), _i64)
33 #define CASE_OP_32_64_VEC(x) \
34 glue(glue(case INDEX_op_, x), _i32): \
35 glue(glue(case INDEX_op_, x), _i64): \
36 glue(glue(case INDEX_op_, x), _vec)
38 struct tcg_temp_info
{
43 tcg_target_ulong mask
;
46 static inline struct tcg_temp_info
*ts_info(TCGTemp
*ts
)
51 static inline struct tcg_temp_info
*arg_info(TCGArg arg
)
53 return ts_info(arg_temp(arg
));
56 static inline bool ts_is_const(TCGTemp
*ts
)
58 return ts_info(ts
)->is_const
;
61 static inline bool arg_is_const(TCGArg arg
)
63 return ts_is_const(arg_temp(arg
));
66 static inline bool ts_is_copy(TCGTemp
*ts
)
68 return ts_info(ts
)->next_copy
!= ts
;
71 /* Reset TEMP's state, possibly removing the temp for the list of copies. */
72 static void reset_ts(TCGTemp
*ts
)
74 struct tcg_temp_info
*ti
= ts_info(ts
);
75 struct tcg_temp_info
*pi
= ts_info(ti
->prev_copy
);
76 struct tcg_temp_info
*ni
= ts_info(ti
->next_copy
);
78 ni
->prev_copy
= ti
->prev_copy
;
79 pi
->next_copy
= ti
->next_copy
;
86 static void reset_temp(TCGArg arg
)
88 reset_ts(arg_temp(arg
));
91 /* Initialize and activate a temporary. */
92 static void init_ts_info(struct tcg_temp_info
*infos
,
93 TCGTempSet
*temps_used
, TCGTemp
*ts
)
95 size_t idx
= temp_idx(ts
);
96 if (!test_bit(idx
, temps_used
->l
)) {
97 struct tcg_temp_info
*ti
= &infos
[idx
];
102 ti
->is_const
= false;
104 set_bit(idx
, temps_used
->l
);
108 static void init_arg_info(struct tcg_temp_info
*infos
,
109 TCGTempSet
*temps_used
, TCGArg arg
)
111 init_ts_info(infos
, temps_used
, arg_temp(arg
));
114 static TCGTemp
*find_better_copy(TCGContext
*s
, TCGTemp
*ts
)
118 /* If this is already a global, we can't do better. */
119 if (ts
->temp_global
) {
123 /* Search for a global first. */
124 for (i
= ts_info(ts
)->next_copy
; i
!= ts
; i
= ts_info(i
)->next_copy
) {
125 if (i
->temp_global
) {
130 /* If it is a temp, search for a temp local. */
131 if (!ts
->temp_local
) {
132 for (i
= ts_info(ts
)->next_copy
; i
!= ts
; i
= ts_info(i
)->next_copy
) {
133 if (ts
->temp_local
) {
139 /* Failure to find a better representation, return the same temp. */
143 static bool ts_are_copies(TCGTemp
*ts1
, TCGTemp
*ts2
)
151 if (!ts_is_copy(ts1
) || !ts_is_copy(ts2
)) {
155 for (i
= ts_info(ts1
)->next_copy
; i
!= ts1
; i
= ts_info(i
)->next_copy
) {
164 static bool args_are_copies(TCGArg arg1
, TCGArg arg2
)
166 return ts_are_copies(arg_temp(arg1
), arg_temp(arg2
));
169 static void tcg_opt_gen_movi(TCGContext
*s
, TCGOp
*op
, TCGArg dst
, TCGArg val
)
173 tcg_target_ulong mask
;
174 struct tcg_temp_info
*di
= arg_info(dst
);
176 def
= &tcg_op_defs
[op
->opc
];
177 if (def
->flags
& TCG_OPF_VECTOR
) {
178 new_op
= INDEX_op_dupi_vec
;
179 } else if (def
->flags
& TCG_OPF_64BIT
) {
180 new_op
= INDEX_op_movi_i64
;
182 new_op
= INDEX_op_movi_i32
;
185 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
193 if (TCG_TARGET_REG_BITS
> 32 && new_op
== INDEX_op_movi_i32
) {
194 /* High bits of the destination are now garbage. */
195 mask
|= ~0xffffffffull
;
200 static void tcg_opt_gen_mov(TCGContext
*s
, TCGOp
*op
, TCGArg dst
, TCGArg src
)
202 TCGTemp
*dst_ts
= arg_temp(dst
);
203 TCGTemp
*src_ts
= arg_temp(src
);
205 struct tcg_temp_info
*di
;
206 struct tcg_temp_info
*si
;
207 tcg_target_ulong mask
;
210 if (ts_are_copies(dst_ts
, src_ts
)) {
211 tcg_op_remove(s
, op
);
216 di
= ts_info(dst_ts
);
217 si
= ts_info(src_ts
);
218 def
= &tcg_op_defs
[op
->opc
];
219 if (def
->flags
& TCG_OPF_VECTOR
) {
220 new_op
= INDEX_op_mov_vec
;
221 } else if (def
->flags
& TCG_OPF_64BIT
) {
222 new_op
= INDEX_op_mov_i64
;
224 new_op
= INDEX_op_mov_i32
;
227 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
232 if (TCG_TARGET_REG_BITS
> 32 && new_op
== INDEX_op_mov_i32
) {
233 /* High bits of the destination are now garbage. */
234 mask
|= ~0xffffffffull
;
238 if (src_ts
->type
== dst_ts
->type
) {
239 struct tcg_temp_info
*ni
= ts_info(si
->next_copy
);
241 di
->next_copy
= si
->next_copy
;
242 di
->prev_copy
= src_ts
;
243 ni
->prev_copy
= dst_ts
;
244 si
->next_copy
= dst_ts
;
245 di
->is_const
= si
->is_const
;
250 static TCGArg
do_constant_folding_2(TCGOpcode op
, TCGArg x
, TCGArg y
)
273 case INDEX_op_shl_i32
:
274 return (uint32_t)x
<< (y
& 31);
276 case INDEX_op_shl_i64
:
277 return (uint64_t)x
<< (y
& 63);
279 case INDEX_op_shr_i32
:
280 return (uint32_t)x
>> (y
& 31);
282 case INDEX_op_shr_i64
:
283 return (uint64_t)x
>> (y
& 63);
285 case INDEX_op_sar_i32
:
286 return (int32_t)x
>> (y
& 31);
288 case INDEX_op_sar_i64
:
289 return (int64_t)x
>> (y
& 63);
291 case INDEX_op_rotr_i32
:
292 return ror32(x
, y
& 31);
294 case INDEX_op_rotr_i64
:
295 return ror64(x
, y
& 63);
297 case INDEX_op_rotl_i32
:
298 return rol32(x
, y
& 31);
300 case INDEX_op_rotl_i64
:
301 return rol64(x
, y
& 63);
324 case INDEX_op_clz_i32
:
325 return (uint32_t)x
? clz32(x
) : y
;
327 case INDEX_op_clz_i64
:
328 return x
? clz64(x
) : y
;
330 case INDEX_op_ctz_i32
:
331 return (uint32_t)x
? ctz32(x
) : y
;
333 case INDEX_op_ctz_i64
:
334 return x
? ctz64(x
) : y
;
336 case INDEX_op_ctpop_i32
:
339 case INDEX_op_ctpop_i64
:
342 CASE_OP_32_64(ext8s
):
345 CASE_OP_32_64(ext16s
):
348 CASE_OP_32_64(ext8u
):
351 CASE_OP_32_64(ext16u
):
354 CASE_OP_32_64(bswap16
):
357 CASE_OP_32_64(bswap32
):
360 case INDEX_op_bswap64_i64
:
363 case INDEX_op_ext_i32_i64
:
364 case INDEX_op_ext32s_i64
:
367 case INDEX_op_extu_i32_i64
:
368 case INDEX_op_extrl_i64_i32
:
369 case INDEX_op_ext32u_i64
:
372 case INDEX_op_extrh_i64_i32
:
373 return (uint64_t)x
>> 32;
375 case INDEX_op_muluh_i32
:
376 return ((uint64_t)(uint32_t)x
* (uint32_t)y
) >> 32;
377 case INDEX_op_mulsh_i32
:
378 return ((int64_t)(int32_t)x
* (int32_t)y
) >> 32;
380 case INDEX_op_muluh_i64
:
381 mulu64(&l64
, &h64
, x
, y
);
383 case INDEX_op_mulsh_i64
:
384 muls64(&l64
, &h64
, x
, y
);
387 case INDEX_op_div_i32
:
388 /* Avoid crashing on divide by zero, otherwise undefined. */
389 return (int32_t)x
/ ((int32_t)y
? : 1);
390 case INDEX_op_divu_i32
:
391 return (uint32_t)x
/ ((uint32_t)y
? : 1);
392 case INDEX_op_div_i64
:
393 return (int64_t)x
/ ((int64_t)y
? : 1);
394 case INDEX_op_divu_i64
:
395 return (uint64_t)x
/ ((uint64_t)y
? : 1);
397 case INDEX_op_rem_i32
:
398 return (int32_t)x
% ((int32_t)y
? : 1);
399 case INDEX_op_remu_i32
:
400 return (uint32_t)x
% ((uint32_t)y
? : 1);
401 case INDEX_op_rem_i64
:
402 return (int64_t)x
% ((int64_t)y
? : 1);
403 case INDEX_op_remu_i64
:
404 return (uint64_t)x
% ((uint64_t)y
? : 1);
408 "Unrecognized operation %d in do_constant_folding.\n", op
);
413 static TCGArg
do_constant_folding(TCGOpcode op
, TCGArg x
, TCGArg y
)
415 const TCGOpDef
*def
= &tcg_op_defs
[op
];
416 TCGArg res
= do_constant_folding_2(op
, x
, y
);
417 if (!(def
->flags
& TCG_OPF_64BIT
)) {
423 static bool do_constant_folding_cond_32(uint32_t x
, uint32_t y
, TCGCond c
)
431 return (int32_t)x
< (int32_t)y
;
433 return (int32_t)x
>= (int32_t)y
;
435 return (int32_t)x
<= (int32_t)y
;
437 return (int32_t)x
> (int32_t)y
;
451 static bool do_constant_folding_cond_64(uint64_t x
, uint64_t y
, TCGCond c
)
459 return (int64_t)x
< (int64_t)y
;
461 return (int64_t)x
>= (int64_t)y
;
463 return (int64_t)x
<= (int64_t)y
;
465 return (int64_t)x
> (int64_t)y
;
479 static bool do_constant_folding_cond_eq(TCGCond c
)
499 /* Return 2 if the condition can't be simplified, and the result
500 of the condition (0 or 1) if it can */
501 static TCGArg
do_constant_folding_cond(TCGOpcode op
, TCGArg x
,
504 tcg_target_ulong xv
= arg_info(x
)->val
;
505 tcg_target_ulong yv
= arg_info(y
)->val
;
506 if (arg_is_const(x
) && arg_is_const(y
)) {
507 const TCGOpDef
*def
= &tcg_op_defs
[op
];
508 tcg_debug_assert(!(def
->flags
& TCG_OPF_VECTOR
));
509 if (def
->flags
& TCG_OPF_64BIT
) {
510 return do_constant_folding_cond_64(xv
, yv
, c
);
512 return do_constant_folding_cond_32(xv
, yv
, c
);
514 } else if (args_are_copies(x
, y
)) {
515 return do_constant_folding_cond_eq(c
);
516 } else if (arg_is_const(y
) && yv
== 0) {
529 /* Return 2 if the condition can't be simplified, and the result
530 of the condition (0 or 1) if it can */
531 static TCGArg
do_constant_folding_cond2(TCGArg
*p1
, TCGArg
*p2
, TCGCond c
)
533 TCGArg al
= p1
[0], ah
= p1
[1];
534 TCGArg bl
= p2
[0], bh
= p2
[1];
536 if (arg_is_const(bl
) && arg_is_const(bh
)) {
537 tcg_target_ulong blv
= arg_info(bl
)->val
;
538 tcg_target_ulong bhv
= arg_info(bh
)->val
;
539 uint64_t b
= deposit64(blv
, 32, 32, bhv
);
541 if (arg_is_const(al
) && arg_is_const(ah
)) {
542 tcg_target_ulong alv
= arg_info(al
)->val
;
543 tcg_target_ulong ahv
= arg_info(ah
)->val
;
544 uint64_t a
= deposit64(alv
, 32, 32, ahv
);
545 return do_constant_folding_cond_64(a
, b
, c
);
558 if (args_are_copies(al
, bl
) && args_are_copies(ah
, bh
)) {
559 return do_constant_folding_cond_eq(c
);
564 static bool swap_commutative(TCGArg dest
, TCGArg
*p1
, TCGArg
*p2
)
566 TCGArg a1
= *p1
, a2
= *p2
;
568 sum
+= arg_is_const(a1
);
569 sum
-= arg_is_const(a2
);
571 /* Prefer the constant in second argument, and then the form
572 op a, a, b, which is better handled on non-RISC hosts. */
573 if (sum
> 0 || (sum
== 0 && dest
== a2
)) {
581 static bool swap_commutative2(TCGArg
*p1
, TCGArg
*p2
)
584 sum
+= arg_is_const(p1
[0]);
585 sum
+= arg_is_const(p1
[1]);
586 sum
-= arg_is_const(p2
[0]);
587 sum
-= arg_is_const(p2
[1]);
590 t
= p1
[0], p1
[0] = p2
[0], p2
[0] = t
;
591 t
= p1
[1], p1
[1] = p2
[1], p2
[1] = t
;
597 /* Propagate constants and copies, fold constant expressions. */
598 void tcg_optimize(TCGContext
*s
)
600 int nb_temps
, nb_globals
;
601 TCGOp
*op
, *op_next
, *prev_mb
= NULL
;
602 struct tcg_temp_info
*infos
;
603 TCGTempSet temps_used
;
605 /* Array VALS has an element for each temp.
606 If this temp holds a constant then its value is kept in VALS' element.
607 If this temp is a copy of other ones then the other copies are
608 available through the doubly linked circular list. */
610 nb_temps
= s
->nb_temps
;
611 nb_globals
= s
->nb_globals
;
612 bitmap_zero(temps_used
.l
, nb_temps
);
613 infos
= tcg_malloc(sizeof(struct tcg_temp_info
) * nb_temps
);
615 QTAILQ_FOREACH_SAFE(op
, &s
->ops
, link
, op_next
) {
616 tcg_target_ulong mask
, partmask
, affected
;
617 int nb_oargs
, nb_iargs
, i
;
619 TCGOpcode opc
= op
->opc
;
620 const TCGOpDef
*def
= &tcg_op_defs
[opc
];
622 /* Count the arguments, and initialize the temps that are
624 if (opc
== INDEX_op_call
) {
625 nb_oargs
= TCGOP_CALLO(op
);
626 nb_iargs
= TCGOP_CALLI(op
);
627 for (i
= 0; i
< nb_oargs
+ nb_iargs
; i
++) {
628 TCGTemp
*ts
= arg_temp(op
->args
[i
]);
630 init_ts_info(infos
, &temps_used
, ts
);
634 nb_oargs
= def
->nb_oargs
;
635 nb_iargs
= def
->nb_iargs
;
636 for (i
= 0; i
< nb_oargs
+ nb_iargs
; i
++) {
637 init_arg_info(infos
, &temps_used
, op
->args
[i
]);
641 /* Do copy propagation */
642 for (i
= nb_oargs
; i
< nb_oargs
+ nb_iargs
; i
++) {
643 TCGTemp
*ts
= arg_temp(op
->args
[i
]);
644 if (ts
&& ts_is_copy(ts
)) {
645 op
->args
[i
] = temp_arg(find_better_copy(s
, ts
));
649 /* For commutative operations make constant second argument */
651 CASE_OP_32_64_VEC(add
):
652 CASE_OP_32_64_VEC(mul
):
653 CASE_OP_32_64_VEC(and):
654 CASE_OP_32_64_VEC(or):
655 CASE_OP_32_64_VEC(xor):
659 CASE_OP_32_64(muluh
):
660 CASE_OP_32_64(mulsh
):
661 swap_commutative(op
->args
[0], &op
->args
[1], &op
->args
[2]);
663 CASE_OP_32_64(brcond
):
664 if (swap_commutative(-1, &op
->args
[0], &op
->args
[1])) {
665 op
->args
[2] = tcg_swap_cond(op
->args
[2]);
668 CASE_OP_32_64(setcond
):
669 if (swap_commutative(op
->args
[0], &op
->args
[1], &op
->args
[2])) {
670 op
->args
[3] = tcg_swap_cond(op
->args
[3]);
673 CASE_OP_32_64(movcond
):
674 if (swap_commutative(-1, &op
->args
[1], &op
->args
[2])) {
675 op
->args
[5] = tcg_swap_cond(op
->args
[5]);
677 /* For movcond, we canonicalize the "false" input reg to match
678 the destination reg so that the tcg backend can implement
679 a "move if true" operation. */
680 if (swap_commutative(op
->args
[0], &op
->args
[4], &op
->args
[3])) {
681 op
->args
[5] = tcg_invert_cond(op
->args
[5]);
685 swap_commutative(op
->args
[0], &op
->args
[2], &op
->args
[4]);
686 swap_commutative(op
->args
[1], &op
->args
[3], &op
->args
[5]);
688 CASE_OP_32_64(mulu2
):
689 CASE_OP_32_64(muls2
):
690 swap_commutative(op
->args
[0], &op
->args
[2], &op
->args
[3]);
692 case INDEX_op_brcond2_i32
:
693 if (swap_commutative2(&op
->args
[0], &op
->args
[2])) {
694 op
->args
[4] = tcg_swap_cond(op
->args
[4]);
697 case INDEX_op_setcond2_i32
:
698 if (swap_commutative2(&op
->args
[1], &op
->args
[3])) {
699 op
->args
[5] = tcg_swap_cond(op
->args
[5]);
706 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
707 and "sub r, 0, a => neg r, a" case. */
714 if (arg_is_const(op
->args
[1])
715 && arg_info(op
->args
[1])->val
== 0) {
716 tcg_opt_gen_movi(s
, op
, op
->args
[0], 0);
720 CASE_OP_32_64_VEC(sub
):
725 if (arg_is_const(op
->args
[2])) {
726 /* Proceed with possible constant folding. */
729 if (opc
== INDEX_op_sub_i32
) {
730 neg_op
= INDEX_op_neg_i32
;
731 have_neg
= TCG_TARGET_HAS_neg_i32
;
732 } else if (opc
== INDEX_op_sub_i64
) {
733 neg_op
= INDEX_op_neg_i64
;
734 have_neg
= TCG_TARGET_HAS_neg_i64
;
735 } else if (TCG_TARGET_HAS_neg_vec
) {
736 TCGType type
= TCGOP_VECL(op
) + TCG_TYPE_V64
;
737 unsigned vece
= TCGOP_VECE(op
);
738 neg_op
= INDEX_op_neg_vec
;
739 have_neg
= tcg_can_emit_vec_op(neg_op
, type
, vece
) > 0;
746 if (arg_is_const(op
->args
[1])
747 && arg_info(op
->args
[1])->val
== 0) {
749 reset_temp(op
->args
[0]);
750 op
->args
[1] = op
->args
[2];
755 CASE_OP_32_64_VEC(xor):
757 if (!arg_is_const(op
->args
[1])
758 && arg_is_const(op
->args
[2])
759 && arg_info(op
->args
[2])->val
== -1) {
765 if (!arg_is_const(op
->args
[1])
766 && arg_is_const(op
->args
[2])
767 && arg_info(op
->args
[2])->val
== 0) {
772 CASE_OP_32_64_VEC(andc
):
773 if (!arg_is_const(op
->args
[2])
774 && arg_is_const(op
->args
[1])
775 && arg_info(op
->args
[1])->val
== -1) {
780 CASE_OP_32_64_VEC(orc
):
782 if (!arg_is_const(op
->args
[2])
783 && arg_is_const(op
->args
[1])
784 && arg_info(op
->args
[1])->val
== 0) {
794 if (def
->flags
& TCG_OPF_VECTOR
) {
795 not_op
= INDEX_op_not_vec
;
796 have_not
= TCG_TARGET_HAS_not_vec
;
797 } else if (def
->flags
& TCG_OPF_64BIT
) {
798 not_op
= INDEX_op_not_i64
;
799 have_not
= TCG_TARGET_HAS_not_i64
;
801 not_op
= INDEX_op_not_i32
;
802 have_not
= TCG_TARGET_HAS_not_i32
;
808 reset_temp(op
->args
[0]);
809 op
->args
[1] = op
->args
[i
];
816 /* Simplify expression for "op r, a, const => mov r, a" cases */
818 CASE_OP_32_64_VEC(add
):
819 CASE_OP_32_64_VEC(sub
):
820 CASE_OP_32_64_VEC(or):
821 CASE_OP_32_64_VEC(xor):
822 CASE_OP_32_64_VEC(andc
):
828 if (!arg_is_const(op
->args
[1])
829 && arg_is_const(op
->args
[2])
830 && arg_info(op
->args
[2])->val
== 0) {
831 tcg_opt_gen_mov(s
, op
, op
->args
[0], op
->args
[1]);
835 CASE_OP_32_64_VEC(and):
836 CASE_OP_32_64_VEC(orc
):
838 if (!arg_is_const(op
->args
[1])
839 && arg_is_const(op
->args
[2])
840 && arg_info(op
->args
[2])->val
== -1) {
841 tcg_opt_gen_mov(s
, op
, op
->args
[0], op
->args
[1]);
849 /* Simplify using known-zero bits. Currently only ops with a single
850 output argument is supported. */
854 CASE_OP_32_64(ext8s
):
855 if ((arg_info(op
->args
[1])->mask
& 0x80) != 0) {
858 CASE_OP_32_64(ext8u
):
861 CASE_OP_32_64(ext16s
):
862 if ((arg_info(op
->args
[1])->mask
& 0x8000) != 0) {
865 CASE_OP_32_64(ext16u
):
868 case INDEX_op_ext32s_i64
:
869 if ((arg_info(op
->args
[1])->mask
& 0x80000000) != 0) {
872 case INDEX_op_ext32u_i64
:
877 mask
= arg_info(op
->args
[2])->mask
;
878 if (arg_is_const(op
->args
[2])) {
880 affected
= arg_info(op
->args
[1])->mask
& ~mask
;
882 mask
= arg_info(op
->args
[1])->mask
& mask
;
885 case INDEX_op_ext_i32_i64
:
886 if ((arg_info(op
->args
[1])->mask
& 0x80000000) != 0) {
889 case INDEX_op_extu_i32_i64
:
890 /* We do not compute affected as it is a size changing op. */
891 mask
= (uint32_t)arg_info(op
->args
[1])->mask
;
895 /* Known-zeros does not imply known-ones. Therefore unless
896 op->args[2] is constant, we can't infer anything from it. */
897 if (arg_is_const(op
->args
[2])) {
898 mask
= ~arg_info(op
->args
[2])->mask
;
901 /* But we certainly know nothing outside args[1] may be set. */
902 mask
= arg_info(op
->args
[1])->mask
;
905 case INDEX_op_sar_i32
:
906 if (arg_is_const(op
->args
[2])) {
907 tmp
= arg_info(op
->args
[2])->val
& 31;
908 mask
= (int32_t)arg_info(op
->args
[1])->mask
>> tmp
;
911 case INDEX_op_sar_i64
:
912 if (arg_is_const(op
->args
[2])) {
913 tmp
= arg_info(op
->args
[2])->val
& 63;
914 mask
= (int64_t)arg_info(op
->args
[1])->mask
>> tmp
;
918 case INDEX_op_shr_i32
:
919 if (arg_is_const(op
->args
[2])) {
920 tmp
= arg_info(op
->args
[2])->val
& 31;
921 mask
= (uint32_t)arg_info(op
->args
[1])->mask
>> tmp
;
924 case INDEX_op_shr_i64
:
925 if (arg_is_const(op
->args
[2])) {
926 tmp
= arg_info(op
->args
[2])->val
& 63;
927 mask
= (uint64_t)arg_info(op
->args
[1])->mask
>> tmp
;
931 case INDEX_op_extrl_i64_i32
:
932 mask
= (uint32_t)arg_info(op
->args
[1])->mask
;
934 case INDEX_op_extrh_i64_i32
:
935 mask
= (uint64_t)arg_info(op
->args
[1])->mask
>> 32;
939 if (arg_is_const(op
->args
[2])) {
940 tmp
= arg_info(op
->args
[2])->val
& (TCG_TARGET_REG_BITS
- 1);
941 mask
= arg_info(op
->args
[1])->mask
<< tmp
;
946 /* Set to 1 all bits to the left of the rightmost. */
947 mask
= -(arg_info(op
->args
[1])->mask
948 & -arg_info(op
->args
[1])->mask
);
951 CASE_OP_32_64(deposit
):
952 mask
= deposit64(arg_info(op
->args
[1])->mask
,
953 op
->args
[3], op
->args
[4],
954 arg_info(op
->args
[2])->mask
);
957 CASE_OP_32_64(extract
):
958 mask
= extract64(arg_info(op
->args
[1])->mask
,
959 op
->args
[2], op
->args
[3]);
960 if (op
->args
[2] == 0) {
961 affected
= arg_info(op
->args
[1])->mask
& ~mask
;
964 CASE_OP_32_64(sextract
):
965 mask
= sextract64(arg_info(op
->args
[1])->mask
,
966 op
->args
[2], op
->args
[3]);
967 if (op
->args
[2] == 0 && (tcg_target_long
)mask
>= 0) {
968 affected
= arg_info(op
->args
[1])->mask
& ~mask
;
974 mask
= arg_info(op
->args
[1])->mask
| arg_info(op
->args
[2])->mask
;
977 case INDEX_op_clz_i32
:
978 case INDEX_op_ctz_i32
:
979 mask
= arg_info(op
->args
[2])->mask
| 31;
982 case INDEX_op_clz_i64
:
983 case INDEX_op_ctz_i64
:
984 mask
= arg_info(op
->args
[2])->mask
| 63;
987 case INDEX_op_ctpop_i32
:
990 case INDEX_op_ctpop_i64
:
994 CASE_OP_32_64(setcond
):
995 case INDEX_op_setcond2_i32
:
999 CASE_OP_32_64(movcond
):
1000 mask
= arg_info(op
->args
[3])->mask
| arg_info(op
->args
[4])->mask
;
1003 CASE_OP_32_64(ld8u
):
1006 CASE_OP_32_64(ld16u
):
1009 case INDEX_op_ld32u_i64
:
1013 CASE_OP_32_64(qemu_ld
):
1015 TCGMemOpIdx oi
= op
->args
[nb_oargs
+ nb_iargs
];
1016 MemOp mop
= get_memop(oi
);
1017 if (!(mop
& MO_SIGN
)) {
1018 mask
= (2ULL << ((8 << (mop
& MO_SIZE
)) - 1)) - 1;
1027 /* 32-bit ops generate 32-bit results. For the result is zero test
1028 below, we can ignore high bits, but for further optimizations we
1029 need to record that the high bits contain garbage. */
1031 if (!(def
->flags
& TCG_OPF_64BIT
)) {
1032 mask
|= ~(tcg_target_ulong
)0xffffffffu
;
1033 partmask
&= 0xffffffffu
;
1034 affected
&= 0xffffffffu
;
1037 if (partmask
== 0) {
1038 tcg_debug_assert(nb_oargs
== 1);
1039 tcg_opt_gen_movi(s
, op
, op
->args
[0], 0);
1042 if (affected
== 0) {
1043 tcg_debug_assert(nb_oargs
== 1);
1044 tcg_opt_gen_mov(s
, op
, op
->args
[0], op
->args
[1]);
1048 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
1050 CASE_OP_32_64_VEC(and):
1051 CASE_OP_32_64_VEC(mul
):
1052 CASE_OP_32_64(muluh
):
1053 CASE_OP_32_64(mulsh
):
1054 if (arg_is_const(op
->args
[2])
1055 && arg_info(op
->args
[2])->val
== 0) {
1056 tcg_opt_gen_movi(s
, op
, op
->args
[0], 0);
1064 /* Simplify expression for "op r, a, a => mov r, a" cases */
1066 CASE_OP_32_64_VEC(or):
1067 CASE_OP_32_64_VEC(and):
1068 if (args_are_copies(op
->args
[1], op
->args
[2])) {
1069 tcg_opt_gen_mov(s
, op
, op
->args
[0], op
->args
[1]);
1077 /* Simplify expression for "op r, a, a => movi r, 0" cases */
1079 CASE_OP_32_64_VEC(andc
):
1080 CASE_OP_32_64_VEC(sub
):
1081 CASE_OP_32_64_VEC(xor):
1082 if (args_are_copies(op
->args
[1], op
->args
[2])) {
1083 tcg_opt_gen_movi(s
, op
, op
->args
[0], 0);
1091 /* Propagate constants through copy operations and do constant
1092 folding. Constants will be substituted to arguments by register
1093 allocator where needed and possible. Also detect copies. */
1095 CASE_OP_32_64_VEC(mov
):
1096 tcg_opt_gen_mov(s
, op
, op
->args
[0], op
->args
[1]);
1098 CASE_OP_32_64(movi
):
1099 case INDEX_op_dupi_vec
:
1100 tcg_opt_gen_movi(s
, op
, op
->args
[0], op
->args
[1]);
1103 case INDEX_op_dup_vec
:
1104 if (arg_is_const(op
->args
[1])) {
1105 tmp
= arg_info(op
->args
[1])->val
;
1106 tmp
= dup_const(TCGOP_VECE(op
), tmp
);
1107 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1112 case INDEX_op_dup2_vec
:
1113 assert(TCG_TARGET_REG_BITS
== 32);
1114 if (arg_is_const(op
->args
[1]) && arg_is_const(op
->args
[2])) {
1115 tmp
= arg_info(op
->args
[1])->val
;
1116 if (tmp
== arg_info(op
->args
[2])->val
) {
1117 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1120 } else if (args_are_copies(op
->args
[1], op
->args
[2])) {
1121 op
->opc
= INDEX_op_dup_vec
;
1122 TCGOP_VECE(op
) = MO_32
;
1129 CASE_OP_32_64(ext8s
):
1130 CASE_OP_32_64(ext8u
):
1131 CASE_OP_32_64(ext16s
):
1132 CASE_OP_32_64(ext16u
):
1133 CASE_OP_32_64(ctpop
):
1134 CASE_OP_32_64(bswap16
):
1135 CASE_OP_32_64(bswap32
):
1136 case INDEX_op_bswap64_i64
:
1137 case INDEX_op_ext32s_i64
:
1138 case INDEX_op_ext32u_i64
:
1139 case INDEX_op_ext_i32_i64
:
1140 case INDEX_op_extu_i32_i64
:
1141 case INDEX_op_extrl_i64_i32
:
1142 case INDEX_op_extrh_i64_i32
:
1143 if (arg_is_const(op
->args
[1])) {
1144 tmp
= do_constant_folding(opc
, arg_info(op
->args
[1])->val
, 0);
1145 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1159 CASE_OP_32_64(rotl
):
1160 CASE_OP_32_64(rotr
):
1161 CASE_OP_32_64(andc
):
1164 CASE_OP_32_64(nand
):
1166 CASE_OP_32_64(muluh
):
1167 CASE_OP_32_64(mulsh
):
1169 CASE_OP_32_64(divu
):
1171 CASE_OP_32_64(remu
):
1172 if (arg_is_const(op
->args
[1]) && arg_is_const(op
->args
[2])) {
1173 tmp
= do_constant_folding(opc
, arg_info(op
->args
[1])->val
,
1174 arg_info(op
->args
[2])->val
);
1175 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1182 if (arg_is_const(op
->args
[1])) {
1183 TCGArg v
= arg_info(op
->args
[1])->val
;
1185 tmp
= do_constant_folding(opc
, v
, 0);
1186 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1188 tcg_opt_gen_mov(s
, op
, op
->args
[0], op
->args
[2]);
1194 CASE_OP_32_64(deposit
):
1195 if (arg_is_const(op
->args
[1]) && arg_is_const(op
->args
[2])) {
1196 tmp
= deposit64(arg_info(op
->args
[1])->val
,
1197 op
->args
[3], op
->args
[4],
1198 arg_info(op
->args
[2])->val
);
1199 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1204 CASE_OP_32_64(extract
):
1205 if (arg_is_const(op
->args
[1])) {
1206 tmp
= extract64(arg_info(op
->args
[1])->val
,
1207 op
->args
[2], op
->args
[3]);
1208 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1213 CASE_OP_32_64(sextract
):
1214 if (arg_is_const(op
->args
[1])) {
1215 tmp
= sextract64(arg_info(op
->args
[1])->val
,
1216 op
->args
[2], op
->args
[3]);
1217 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1222 CASE_OP_32_64(extract2
):
1223 if (arg_is_const(op
->args
[1]) && arg_is_const(op
->args
[2])) {
1224 TCGArg v1
= arg_info(op
->args
[1])->val
;
1225 TCGArg v2
= arg_info(op
->args
[2])->val
;
1227 if (opc
== INDEX_op_extract2_i64
) {
1228 tmp
= (v1
>> op
->args
[3]) | (v2
<< (64 - op
->args
[3]));
1230 tmp
= (int32_t)(((uint32_t)v1
>> op
->args
[3]) |
1231 ((uint32_t)v2
<< (32 - op
->args
[3])));
1233 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1238 CASE_OP_32_64(setcond
):
1239 tmp
= do_constant_folding_cond(opc
, op
->args
[1],
1240 op
->args
[2], op
->args
[3]);
1242 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1247 CASE_OP_32_64(brcond
):
1248 tmp
= do_constant_folding_cond(opc
, op
->args
[0],
1249 op
->args
[1], op
->args
[2]);
1252 bitmap_zero(temps_used
.l
, nb_temps
);
1253 op
->opc
= INDEX_op_br
;
1254 op
->args
[0] = op
->args
[3];
1256 tcg_op_remove(s
, op
);
1262 CASE_OP_32_64(movcond
):
1263 tmp
= do_constant_folding_cond(opc
, op
->args
[1],
1264 op
->args
[2], op
->args
[5]);
1266 tcg_opt_gen_mov(s
, op
, op
->args
[0], op
->args
[4-tmp
]);
1269 if (arg_is_const(op
->args
[3]) && arg_is_const(op
->args
[4])) {
1270 tcg_target_ulong tv
= arg_info(op
->args
[3])->val
;
1271 tcg_target_ulong fv
= arg_info(op
->args
[4])->val
;
1272 TCGCond cond
= op
->args
[5];
1273 if (fv
== 1 && tv
== 0) {
1274 cond
= tcg_invert_cond(cond
);
1275 } else if (!(tv
== 1 && fv
== 0)) {
1279 op
->opc
= opc
= (opc
== INDEX_op_movcond_i32
1280 ? INDEX_op_setcond_i32
1281 : INDEX_op_setcond_i64
);
1286 case INDEX_op_add2_i32
:
1287 case INDEX_op_sub2_i32
:
1288 if (arg_is_const(op
->args
[2]) && arg_is_const(op
->args
[3])
1289 && arg_is_const(op
->args
[4]) && arg_is_const(op
->args
[5])) {
1290 uint32_t al
= arg_info(op
->args
[2])->val
;
1291 uint32_t ah
= arg_info(op
->args
[3])->val
;
1292 uint32_t bl
= arg_info(op
->args
[4])->val
;
1293 uint32_t bh
= arg_info(op
->args
[5])->val
;
1294 uint64_t a
= ((uint64_t)ah
<< 32) | al
;
1295 uint64_t b
= ((uint64_t)bh
<< 32) | bl
;
1297 TCGOp
*op2
= tcg_op_insert_before(s
, op
, INDEX_op_movi_i32
);
1299 if (opc
== INDEX_op_add2_i32
) {
1307 tcg_opt_gen_movi(s
, op
, rl
, (int32_t)a
);
1308 tcg_opt_gen_movi(s
, op2
, rh
, (int32_t)(a
>> 32));
1313 case INDEX_op_mulu2_i32
:
1314 if (arg_is_const(op
->args
[2]) && arg_is_const(op
->args
[3])) {
1315 uint32_t a
= arg_info(op
->args
[2])->val
;
1316 uint32_t b
= arg_info(op
->args
[3])->val
;
1317 uint64_t r
= (uint64_t)a
* b
;
1319 TCGOp
*op2
= tcg_op_insert_before(s
, op
, INDEX_op_movi_i32
);
1323 tcg_opt_gen_movi(s
, op
, rl
, (int32_t)r
);
1324 tcg_opt_gen_movi(s
, op2
, rh
, (int32_t)(r
>> 32));
1329 case INDEX_op_brcond2_i32
:
1330 tmp
= do_constant_folding_cond2(&op
->args
[0], &op
->args
[2],
1335 bitmap_zero(temps_used
.l
, nb_temps
);
1336 op
->opc
= INDEX_op_br
;
1337 op
->args
[0] = op
->args
[5];
1340 tcg_op_remove(s
, op
);
1342 } else if ((op
->args
[4] == TCG_COND_LT
1343 || op
->args
[4] == TCG_COND_GE
)
1344 && arg_is_const(op
->args
[2])
1345 && arg_info(op
->args
[2])->val
== 0
1346 && arg_is_const(op
->args
[3])
1347 && arg_info(op
->args
[3])->val
== 0) {
1348 /* Simplify LT/GE comparisons vs zero to a single compare
1349 vs the high word of the input. */
1351 bitmap_zero(temps_used
.l
, nb_temps
);
1352 op
->opc
= INDEX_op_brcond_i32
;
1353 op
->args
[0] = op
->args
[1];
1354 op
->args
[1] = op
->args
[3];
1355 op
->args
[2] = op
->args
[4];
1356 op
->args
[3] = op
->args
[5];
1357 } else if (op
->args
[4] == TCG_COND_EQ
) {
1358 /* Simplify EQ comparisons where one of the pairs
1359 can be simplified. */
1360 tmp
= do_constant_folding_cond(INDEX_op_brcond_i32
,
1361 op
->args
[0], op
->args
[2],
1364 goto do_brcond_false
;
1365 } else if (tmp
== 1) {
1366 goto do_brcond_high
;
1368 tmp
= do_constant_folding_cond(INDEX_op_brcond_i32
,
1369 op
->args
[1], op
->args
[3],
1372 goto do_brcond_false
;
1373 } else if (tmp
!= 1) {
1377 bitmap_zero(temps_used
.l
, nb_temps
);
1378 op
->opc
= INDEX_op_brcond_i32
;
1379 op
->args
[1] = op
->args
[2];
1380 op
->args
[2] = op
->args
[4];
1381 op
->args
[3] = op
->args
[5];
1382 } else if (op
->args
[4] == TCG_COND_NE
) {
1383 /* Simplify NE comparisons where one of the pairs
1384 can be simplified. */
1385 tmp
= do_constant_folding_cond(INDEX_op_brcond_i32
,
1386 op
->args
[0], op
->args
[2],
1389 goto do_brcond_high
;
1390 } else if (tmp
== 1) {
1391 goto do_brcond_true
;
1393 tmp
= do_constant_folding_cond(INDEX_op_brcond_i32
,
1394 op
->args
[1], op
->args
[3],
1398 } else if (tmp
== 1) {
1399 goto do_brcond_true
;
1407 case INDEX_op_setcond2_i32
:
1408 tmp
= do_constant_folding_cond2(&op
->args
[1], &op
->args
[3],
1412 tcg_opt_gen_movi(s
, op
, op
->args
[0], tmp
);
1413 } else if ((op
->args
[5] == TCG_COND_LT
1414 || op
->args
[5] == TCG_COND_GE
)
1415 && arg_is_const(op
->args
[3])
1416 && arg_info(op
->args
[3])->val
== 0
1417 && arg_is_const(op
->args
[4])
1418 && arg_info(op
->args
[4])->val
== 0) {
1419 /* Simplify LT/GE comparisons vs zero to a single compare
1420 vs the high word of the input. */
1422 reset_temp(op
->args
[0]);
1423 arg_info(op
->args
[0])->mask
= 1;
1424 op
->opc
= INDEX_op_setcond_i32
;
1425 op
->args
[1] = op
->args
[2];
1426 op
->args
[2] = op
->args
[4];
1427 op
->args
[3] = op
->args
[5];
1428 } else if (op
->args
[5] == TCG_COND_EQ
) {
1429 /* Simplify EQ comparisons where one of the pairs
1430 can be simplified. */
1431 tmp
= do_constant_folding_cond(INDEX_op_setcond_i32
,
1432 op
->args
[1], op
->args
[3],
1435 goto do_setcond_const
;
1436 } else if (tmp
== 1) {
1437 goto do_setcond_high
;
1439 tmp
= do_constant_folding_cond(INDEX_op_setcond_i32
,
1440 op
->args
[2], op
->args
[4],
1443 goto do_setcond_high
;
1444 } else if (tmp
!= 1) {
1448 reset_temp(op
->args
[0]);
1449 arg_info(op
->args
[0])->mask
= 1;
1450 op
->opc
= INDEX_op_setcond_i32
;
1451 op
->args
[2] = op
->args
[3];
1452 op
->args
[3] = op
->args
[5];
1453 } else if (op
->args
[5] == TCG_COND_NE
) {
1454 /* Simplify NE comparisons where one of the pairs
1455 can be simplified. */
1456 tmp
= do_constant_folding_cond(INDEX_op_setcond_i32
,
1457 op
->args
[1], op
->args
[3],
1460 goto do_setcond_high
;
1461 } else if (tmp
== 1) {
1462 goto do_setcond_const
;
1464 tmp
= do_constant_folding_cond(INDEX_op_setcond_i32
,
1465 op
->args
[2], op
->args
[4],
1468 goto do_setcond_low
;
1469 } else if (tmp
== 1) {
1470 goto do_setcond_const
;
1479 if (!(op
->args
[nb_oargs
+ nb_iargs
+ 1]
1480 & (TCG_CALL_NO_READ_GLOBALS
| TCG_CALL_NO_WRITE_GLOBALS
))) {
1481 for (i
= 0; i
< nb_globals
; i
++) {
1482 if (test_bit(i
, temps_used
.l
)) {
1483 reset_ts(&s
->temps
[i
]);
1487 goto do_reset_output
;
1491 /* Default case: we know nothing about operation (or were unable
1492 to compute the operation result) so no propagation is done.
1493 We trash everything if the operation is the end of a basic
1494 block, otherwise we only trash the output args. "mask" is
1495 the non-zero bits mask for the first output arg. */
1496 if (def
->flags
& TCG_OPF_BB_END
) {
1497 bitmap_zero(temps_used
.l
, nb_temps
);
1500 for (i
= 0; i
< nb_oargs
; i
++) {
1501 reset_temp(op
->args
[i
]);
1502 /* Save the corresponding known-zero bits mask for the
1503 first output argument (only one supported so far). */
1505 arg_info(op
->args
[i
])->mask
= mask
;
1512 /* Eliminate duplicate and redundant fence instructions. */
1516 /* Merge two barriers of the same type into one,
1517 * or a weaker barrier into a stronger one,
1518 * or two weaker barriers into a stronger one.
1519 * mb X; mb Y => mb X|Y
1520 * mb; strl => mb; st
1521 * ldaq; mb => ld; mb
1522 * ldaq; strl => ld; mb; st
1523 * Other combinations are also merged into a strong
1524 * barrier. This is stricter than specified but for
1525 * the purposes of TCG is better than not optimizing.
1527 prev_mb
->args
[0] |= op
->args
[0];
1528 tcg_op_remove(s
, op
);
1532 /* Opcodes that end the block stop the optimization. */
1533 if ((def
->flags
& TCG_OPF_BB_END
) == 0) {
1537 case INDEX_op_qemu_ld_i32
:
1538 case INDEX_op_qemu_ld_i64
:
1539 case INDEX_op_qemu_st_i32
:
1540 case INDEX_op_qemu_st_i64
:
1542 /* Opcodes that touch guest memory stop the optimization. */
1546 } else if (opc
== INDEX_op_mb
) {