target/riscv: Fix the RV64H decode comment
[qemu/ar7.git] / accel / accel-softmmu.h
blob5e192f1882e35a457fbbba9cde0ab8ed22416dec
1 /*
2 * QEMU System Emulation accel internal functions
4 * Copyright 2021 SUSE LLC
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 */
10 #ifndef ACCEL_SOFTMMU_H
11 #define ACCEL_SOFTMMU_H
13 void accel_init_ops_interfaces(AccelClass *ac);
15 #endif /* ACCEL_SOFTMMU_H */