esp-pci: Fix status register write erase control
[qemu/ar7.git] / hw / scsi / mptendian.c
blob79f99734d2125a02525a24a4160bfe2fc28834ab
1 /*
2 * QEMU LSI SAS1068 Host Bus Adapter emulation
3 * Endianness conversion for MPI data structures
5 * Copyright (c) 2016 Red Hat, Inc.
7 * Authors: Paolo Bonzini <pbonzini@redhat.com>
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2 of the License, or (at your option) any later version.
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
23 #include "qemu/osdep.h"
24 #include "hw/hw.h"
25 #include "hw/pci/pci.h"
26 #include "sysemu/dma.h"
27 #include "hw/pci/msi.h"
28 #include "qemu/iov.h"
29 #include "hw/scsi/scsi.h"
30 #include "scsi/constants.h"
31 #include "trace.h"
33 #include "mptsas.h"
34 #include "mpi.h"
36 static void mptsas_fix_sgentry_endianness(MPISGEntry *sge)
38 sge->FlagsLength = le32_to_cpu(sge->FlagsLength);
39 if (sge->FlagsLength & MPI_SGE_FLAGS_64_BIT_ADDRESSING) {
40 sge->u.Address64 = le64_to_cpu(sge->u.Address64);
41 } else {
42 sge->u.Address32 = le32_to_cpu(sge->u.Address32);
46 static void mptsas_fix_sgentry_endianness_reply(MPISGEntry *sge)
48 if (sge->FlagsLength & MPI_SGE_FLAGS_64_BIT_ADDRESSING) {
49 sge->u.Address64 = cpu_to_le64(sge->u.Address64);
50 } else {
51 sge->u.Address32 = cpu_to_le32(sge->u.Address32);
53 sge->FlagsLength = cpu_to_le32(sge->FlagsLength);
56 void mptsas_fix_scsi_io_endianness(MPIMsgSCSIIORequest *req)
58 req->MsgContext = le32_to_cpu(req->MsgContext);
59 req->Control = le32_to_cpu(req->Control);
60 req->DataLength = le32_to_cpu(req->DataLength);
61 req->SenseBufferLowAddr = le32_to_cpu(req->SenseBufferLowAddr);
64 void mptsas_fix_scsi_io_reply_endianness(MPIMsgSCSIIOReply *reply)
66 reply->MsgContext = cpu_to_le32(reply->MsgContext);
67 reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
68 reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
69 reply->TransferCount = cpu_to_le32(reply->TransferCount);
70 reply->SenseCount = cpu_to_le32(reply->SenseCount);
71 reply->ResponseInfo = cpu_to_le32(reply->ResponseInfo);
72 reply->TaskTag = cpu_to_le16(reply->TaskTag);
75 void mptsas_fix_scsi_task_mgmt_endianness(MPIMsgSCSITaskMgmt *req)
77 req->MsgContext = le32_to_cpu(req->MsgContext);
78 req->TaskMsgContext = le32_to_cpu(req->TaskMsgContext);
81 void mptsas_fix_scsi_task_mgmt_reply_endianness(MPIMsgSCSITaskMgmtReply *reply)
83 reply->MsgContext = cpu_to_le32(reply->MsgContext);
84 reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
85 reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
86 reply->TerminationCount = cpu_to_le32(reply->TerminationCount);
89 void mptsas_fix_ioc_init_endianness(MPIMsgIOCInit *req)
91 req->MsgContext = le32_to_cpu(req->MsgContext);
92 req->ReplyFrameSize = le16_to_cpu(req->ReplyFrameSize);
93 req->HostMfaHighAddr = le32_to_cpu(req->HostMfaHighAddr);
94 req->SenseBufferHighAddr = le32_to_cpu(req->SenseBufferHighAddr);
95 req->ReplyFifoHostSignalingAddr =
96 le32_to_cpu(req->ReplyFifoHostSignalingAddr);
97 mptsas_fix_sgentry_endianness(&req->HostPageBufferSGE);
98 req->MsgVersion = le16_to_cpu(req->MsgVersion);
99 req->HeaderVersion = le16_to_cpu(req->HeaderVersion);
102 void mptsas_fix_ioc_init_reply_endianness(MPIMsgIOCInitReply *reply)
104 reply->MsgContext = cpu_to_le32(reply->MsgContext);
105 reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
106 reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
109 void mptsas_fix_ioc_facts_endianness(MPIMsgIOCFacts *req)
111 req->MsgContext = le32_to_cpu(req->MsgContext);
114 void mptsas_fix_ioc_facts_reply_endianness(MPIMsgIOCFactsReply *reply)
116 reply->MsgVersion = cpu_to_le16(reply->MsgVersion);
117 reply->HeaderVersion = cpu_to_le16(reply->HeaderVersion);
118 reply->MsgContext = cpu_to_le32(reply->MsgContext);
119 reply->IOCExceptions = cpu_to_le16(reply->IOCExceptions);
120 reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
121 reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
122 reply->ReplyQueueDepth = cpu_to_le16(reply->ReplyQueueDepth);
123 reply->RequestFrameSize = cpu_to_le16(reply->RequestFrameSize);
124 reply->ProductID = cpu_to_le16(reply->ProductID);
125 reply->CurrentHostMfaHighAddr = cpu_to_le32(reply->CurrentHostMfaHighAddr);
126 reply->GlobalCredits = cpu_to_le16(reply->GlobalCredits);
127 reply->CurrentSenseBufferHighAddr =
128 cpu_to_le32(reply->CurrentSenseBufferHighAddr);
129 reply->CurReplyFrameSize = cpu_to_le16(reply->CurReplyFrameSize);
130 reply->FWImageSize = cpu_to_le32(reply->FWImageSize);
131 reply->IOCCapabilities = cpu_to_le32(reply->IOCCapabilities);
132 reply->HighPriorityQueueDepth = cpu_to_le16(reply->HighPriorityQueueDepth);
133 mptsas_fix_sgentry_endianness_reply(&reply->HostPageBufferSGE);
134 reply->ReplyFifoHostSignalingAddr =
135 cpu_to_le32(reply->ReplyFifoHostSignalingAddr);
138 void mptsas_fix_config_endianness(MPIMsgConfig *req)
140 req->ExtPageLength = le16_to_cpu(req->ExtPageLength);
141 req->MsgContext = le32_to_cpu(req->MsgContext);
142 req->PageAddress = le32_to_cpu(req->PageAddress);
143 mptsas_fix_sgentry_endianness(&req->PageBufferSGE);
146 void mptsas_fix_config_reply_endianness(MPIMsgConfigReply *reply)
148 reply->ExtPageLength = cpu_to_le16(reply->ExtPageLength);
149 reply->MsgContext = cpu_to_le32(reply->MsgContext);
150 reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
151 reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
154 void mptsas_fix_port_facts_endianness(MPIMsgPortFacts *req)
156 req->MsgContext = le32_to_cpu(req->MsgContext);
159 void mptsas_fix_port_facts_reply_endianness(MPIMsgPortFactsReply *reply)
161 reply->MsgContext = cpu_to_le32(reply->MsgContext);
162 reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
163 reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
164 reply->MaxDevices = cpu_to_le16(reply->MaxDevices);
165 reply->PortSCSIID = cpu_to_le16(reply->PortSCSIID);
166 reply->ProtocolFlags = cpu_to_le16(reply->ProtocolFlags);
167 reply->MaxPostedCmdBuffers = cpu_to_le16(reply->MaxPostedCmdBuffers);
168 reply->MaxPersistentIDs = cpu_to_le16(reply->MaxPersistentIDs);
169 reply->MaxLanBuckets = cpu_to_le16(reply->MaxLanBuckets);
172 void mptsas_fix_port_enable_endianness(MPIMsgPortEnable *req)
174 req->MsgContext = le32_to_cpu(req->MsgContext);
177 void mptsas_fix_port_enable_reply_endianness(MPIMsgPortEnableReply *reply)
179 reply->MsgContext = cpu_to_le32(reply->MsgContext);
180 reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
181 reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
184 void mptsas_fix_event_notification_endianness(MPIMsgEventNotify *req)
186 req->MsgContext = le32_to_cpu(req->MsgContext);
189 void mptsas_fix_event_notification_reply_endianness(MPIMsgEventNotifyReply *reply)
191 int length = reply->EventDataLength;
192 int i;
194 reply->EventDataLength = cpu_to_le16(reply->EventDataLength);
195 reply->MsgContext = cpu_to_le32(reply->MsgContext);
196 reply->IOCStatus = cpu_to_le16(reply->IOCStatus);
197 reply->IOCLogInfo = cpu_to_le32(reply->IOCLogInfo);
198 reply->Event = cpu_to_le32(reply->Event);
199 reply->EventContext = cpu_to_le32(reply->EventContext);
201 /* Really depends on the event kind. This will do for now. */
202 for (i = 0; i < length; i++) {
203 reply->Data[i] = cpu_to_le32(reply->Data[i]);