2 * Tiny Code Generator for QEMU
4 * Copyright (c) 2008 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 #include "qemu-common.h"
26 /* Target word size (must be identical to pointer size). */
27 #if UINTPTR_MAX == UINT32_MAX
28 # define TCG_TARGET_REG_BITS 32
29 #elif UINTPTR_MAX == UINT64_MAX
30 # define TCG_TARGET_REG_BITS 64
32 # error Unknown pointer size for tcg target
35 #if TCG_TARGET_REG_BITS == 32
36 typedef int32_t tcg_target_long
;
37 typedef uint32_t tcg_target_ulong
;
38 #define TCG_PRIlx PRIx32
39 #define TCG_PRIld PRId32
40 #elif TCG_TARGET_REG_BITS == 64
41 typedef int64_t tcg_target_long
;
42 typedef uint64_t tcg_target_ulong
;
43 #define TCG_PRIlx PRIx64
44 #define TCG_PRIld PRId64
49 #include "tcg-target.h"
50 #include "tcg-runtime.h"
52 #if TCG_TARGET_NB_REGS <= 32
53 typedef uint32_t TCGRegSet
;
54 #elif TCG_TARGET_NB_REGS <= 64
55 typedef uint64_t TCGRegSet
;
60 /* Turn some undef macros into false macros. */
61 #if TCG_TARGET_REG_BITS == 32
62 #define TCG_TARGET_HAS_div_i64 0
63 #define TCG_TARGET_HAS_div2_i64 0
64 #define TCG_TARGET_HAS_rot_i64 0
65 #define TCG_TARGET_HAS_ext8s_i64 0
66 #define TCG_TARGET_HAS_ext16s_i64 0
67 #define TCG_TARGET_HAS_ext32s_i64 0
68 #define TCG_TARGET_HAS_ext8u_i64 0
69 #define TCG_TARGET_HAS_ext16u_i64 0
70 #define TCG_TARGET_HAS_ext32u_i64 0
71 #define TCG_TARGET_HAS_bswap16_i64 0
72 #define TCG_TARGET_HAS_bswap32_i64 0
73 #define TCG_TARGET_HAS_bswap64_i64 0
74 #define TCG_TARGET_HAS_neg_i64 0
75 #define TCG_TARGET_HAS_not_i64 0
76 #define TCG_TARGET_HAS_andc_i64 0
77 #define TCG_TARGET_HAS_orc_i64 0
78 #define TCG_TARGET_HAS_eqv_i64 0
79 #define TCG_TARGET_HAS_nand_i64 0
80 #define TCG_TARGET_HAS_nor_i64 0
81 #define TCG_TARGET_HAS_deposit_i64 0
82 #define TCG_TARGET_HAS_movcond_i64 0
85 #ifndef TCG_TARGET_deposit_i32_valid
86 #define TCG_TARGET_deposit_i32_valid(ofs, len) 1
88 #ifndef TCG_TARGET_deposit_i64_valid
89 #define TCG_TARGET_deposit_i64_valid(ofs, len) 1
92 /* Only one of DIV or DIV2 should be defined. */
93 #if defined(TCG_TARGET_HAS_div_i32)
94 #define TCG_TARGET_HAS_div2_i32 0
95 #elif defined(TCG_TARGET_HAS_div2_i32)
96 #define TCG_TARGET_HAS_div_i32 0
98 #if defined(TCG_TARGET_HAS_div_i64)
99 #define TCG_TARGET_HAS_div2_i64 0
100 #elif defined(TCG_TARGET_HAS_div2_i64)
101 #define TCG_TARGET_HAS_div_i64 0
104 typedef enum TCGOpcode
{
105 #define DEF(name, oargs, iargs, cargs, flags) INDEX_op_ ## name,
111 #define tcg_regset_clear(d) (d) = 0
112 #define tcg_regset_set(d, s) (d) = (s)
113 #define tcg_regset_set32(d, reg, val32) (d) |= (val32) << (reg)
114 #define tcg_regset_set_reg(d, r) (d) |= 1L << (r)
115 #define tcg_regset_reset_reg(d, r) (d) &= ~(1L << (r))
116 #define tcg_regset_test_reg(d, r) (((d) >> (r)) & 1)
117 #define tcg_regset_or(d, a, b) (d) = (a) | (b)
118 #define tcg_regset_and(d, a, b) (d) = (a) & (b)
119 #define tcg_regset_andnot(d, a, b) (d) = (a) & ~(b)
120 #define tcg_regset_not(d, a) (d) = ~(a)
122 typedef struct TCGRelocation
{
123 struct TCGRelocation
*next
;
126 tcg_target_long addend
;
129 typedef struct TCGLabel
{
132 tcg_target_ulong value
;
133 TCGRelocation
*first_reloc
;
137 typedef struct TCGPool
{
138 struct TCGPool
*next
;
140 uint8_t data
[0] __attribute__ ((aligned
));
143 #define TCG_POOL_CHUNK_SIZE 32768
145 #define TCG_MAX_LABELS 512
147 #define TCG_MAX_TEMPS 512
149 /* when the size of the arguments of a called function is smaller than
150 this value, they are statically allocated in the TB stack frame */
151 #define TCG_STATIC_CALL_ARGS_SIZE 128
153 typedef enum TCGType
{
156 TCG_TYPE_COUNT
, /* number of different types */
158 /* An alias for the size of the host register. */
159 #if TCG_TARGET_REG_BITS == 32
160 TCG_TYPE_REG
= TCG_TYPE_I32
,
162 TCG_TYPE_REG
= TCG_TYPE_I64
,
165 /* An alias for the size of the native pointer. We don't currently
166 support any hosts with 64-bit registers and 32-bit pointers. */
167 TCG_TYPE_PTR
= TCG_TYPE_REG
,
169 /* An alias for the size of the target "long", aka register. */
170 #if TARGET_LONG_BITS == 64
171 TCG_TYPE_TL
= TCG_TYPE_I64
,
173 TCG_TYPE_TL
= TCG_TYPE_I32
,
177 typedef tcg_target_ulong TCGArg
;
179 /* Define a type and accessor macros for variables. Using a struct is
180 nice because it gives some level of type safely. Ideally the compiler
181 be able to see through all this. However in practice this is not true,
182 especially on targets with braindamaged ABIs (e.g. i386).
183 We use plain int by default to avoid this runtime overhead.
184 Users of tcg_gen_* don't need to know about any of this, and should
185 treat TCGv as an opaque type.
186 In addition we do typechecking for different types of variables. TCGv_i32
187 and TCGv_i64 are 32/64-bit variables respectively. TCGv and TCGv_ptr
188 are aliases for target_ulong and host pointer sized values respectively.
191 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
192 /* Macros/structures for qemu_ld/st IR code optimization:
193 TCG_MAX_HELPER_LABELS is defined as same as OPC_BUF_SIZE in exec-all.h. */
194 #define TCG_MAX_QEMU_LDST 640
196 typedef struct TCGLabelQemuLdst
{
197 int is_ld
:1; /* qemu_ld: 1, qemu_st: 0 */
199 int addrlo_reg
; /* reg index for low word of guest virtual addr */
200 int addrhi_reg
; /* reg index for high word of guest virtual addr */
201 int datalo_reg
; /* reg index for low word to be loaded or stored */
202 int datahi_reg
; /* reg index for high word to be loaded or stored */
203 int mem_index
; /* soft MMU memory index */
204 uint8_t *raddr
; /* gen code addr of the next IR of qemu_ld/st IR */
205 uint8_t *label_ptr
[2]; /* label pointers to be updated */
209 #ifdef CONFIG_DEBUG_TCG
229 #define MAKE_TCGV_I32(i) __extension__ \
230 ({ TCGv_i32 make_tcgv_tmp = {i}; make_tcgv_tmp;})
231 #define MAKE_TCGV_I64(i) __extension__ \
232 ({ TCGv_i64 make_tcgv_tmp = {i}; make_tcgv_tmp;})
233 #define MAKE_TCGV_PTR(i) __extension__ \
234 ({ TCGv_ptr make_tcgv_tmp = {i}; make_tcgv_tmp; })
235 #define GET_TCGV_I32(t) ((t).i32)
236 #define GET_TCGV_I64(t) ((t).i64)
237 #define GET_TCGV_PTR(t) ((t).iptr)
238 #if TCG_TARGET_REG_BITS == 32
239 #define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t))
240 #define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1)
243 #else /* !DEBUG_TCGV */
245 typedef int TCGv_i32
;
246 typedef int TCGv_i64
;
247 #if TCG_TARGET_REG_BITS == 32
248 #define TCGv_ptr TCGv_i32
250 #define TCGv_ptr TCGv_i64
252 #define MAKE_TCGV_I32(x) (x)
253 #define MAKE_TCGV_I64(x) (x)
254 #define MAKE_TCGV_PTR(x) (x)
255 #define GET_TCGV_I32(t) (t)
256 #define GET_TCGV_I64(t) (t)
257 #define GET_TCGV_PTR(t) (t)
259 #if TCG_TARGET_REG_BITS == 32
260 #define TCGV_LOW(t) (t)
261 #define TCGV_HIGH(t) ((t) + 1)
264 #endif /* DEBUG_TCGV */
266 #define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) == GET_TCGV_I32(b))
267 #define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) == GET_TCGV_I64(b))
269 /* Dummy definition to avoid compiler warnings. */
270 #define TCGV_UNUSED_I32(x) x = MAKE_TCGV_I32(-1)
271 #define TCGV_UNUSED_I64(x) x = MAKE_TCGV_I64(-1)
273 #define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) == -1)
274 #define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) == -1)
277 /* Helper does not read globals (either directly or through an exception). It
278 implies TCG_CALL_NO_WRITE_GLOBALS. */
279 #define TCG_CALL_NO_READ_GLOBALS 0x0010
280 /* Helper does not write globals */
281 #define TCG_CALL_NO_WRITE_GLOBALS 0x0020
282 /* Helper can be safely suppressed if the return value is not used. */
283 #define TCG_CALL_NO_SIDE_EFFECTS 0x0040
285 /* convenience version of most used call flags */
286 #define TCG_CALL_NO_RWG TCG_CALL_NO_READ_GLOBALS
287 #define TCG_CALL_NO_WG TCG_CALL_NO_WRITE_GLOBALS
288 #define TCG_CALL_NO_SE TCG_CALL_NO_SIDE_EFFECTS
289 #define TCG_CALL_NO_RWG_SE (TCG_CALL_NO_RWG | TCG_CALL_NO_SE)
290 #define TCG_CALL_NO_WG_SE (TCG_CALL_NO_WG | TCG_CALL_NO_SE)
292 /* used to align parameters */
293 #define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1)
294 #define TCG_CALL_DUMMY_ARG ((TCGArg)(-1))
296 /* Conditions. Note that these are laid out for easy manipulation by
298 bit 0 is used for inverting;
301 bit 3 is used with bit 0 for swapping signed/unsigned. */
304 TCG_COND_NEVER
= 0 | 0 | 0 | 0,
305 TCG_COND_ALWAYS
= 0 | 0 | 0 | 1,
306 TCG_COND_EQ
= 8 | 0 | 0 | 0,
307 TCG_COND_NE
= 8 | 0 | 0 | 1,
309 TCG_COND_LT
= 0 | 0 | 2 | 0,
310 TCG_COND_GE
= 0 | 0 | 2 | 1,
311 TCG_COND_LE
= 8 | 0 | 2 | 0,
312 TCG_COND_GT
= 8 | 0 | 2 | 1,
314 TCG_COND_LTU
= 0 | 4 | 0 | 0,
315 TCG_COND_GEU
= 0 | 4 | 0 | 1,
316 TCG_COND_LEU
= 8 | 4 | 0 | 0,
317 TCG_COND_GTU
= 8 | 4 | 0 | 1,
320 /* Invert the sense of the comparison. */
321 static inline TCGCond
tcg_invert_cond(TCGCond c
)
323 return (TCGCond
)(c
^ 1);
326 /* Swap the operands in a comparison. */
327 static inline TCGCond
tcg_swap_cond(TCGCond c
)
329 return c
& 6 ? (TCGCond
)(c
^ 9) : c
;
332 /* Create an "unsigned" version of a "signed" comparison. */
333 static inline TCGCond
tcg_unsigned_cond(TCGCond c
)
335 return c
& 2 ? (TCGCond
)(c
^ 6) : c
;
338 /* Must a comparison be considered unsigned? */
339 static inline bool is_unsigned_cond(TCGCond c
)
344 /* Create a "high" version of a double-word comparison.
345 This removes equality from a LTE or GTE comparison. */
346 static inline TCGCond
tcg_high_cond(TCGCond c
)
353 return (TCGCond
)(c
^ 8);
359 #define TEMP_VAL_DEAD 0
360 #define TEMP_VAL_REG 1
361 #define TEMP_VAL_MEM 2
362 #define TEMP_VAL_CONST 3
364 /* XXX: optimize memory layout */
365 typedef struct TCGTemp
{
372 tcg_target_long mem_offset
;
373 unsigned int fixed_reg
:1;
374 unsigned int mem_coherent
:1;
375 unsigned int mem_allocated
:1;
376 unsigned int temp_local
:1; /* If true, the temp is saved across
377 basic blocks. Otherwise, it is not
378 preserved across basic blocks. */
379 unsigned int temp_allocated
:1; /* never used for code gen */
380 /* index of next free temp of same base type, -1 if end */
385 typedef struct TCGHelperInfo
{
386 tcg_target_ulong func
;
390 typedef struct TCGContext TCGContext
;
393 uint8_t *pool_cur
, *pool_end
;
394 TCGPool
*pool_first
, *pool_current
, *pool_first_large
;
399 /* index of free temps, -1 if none */
400 int first_free_temp
[TCG_TYPE_COUNT
* 2];
402 /* goto_tb support */
405 uint16_t *tb_next_offset
;
406 uint16_t *tb_jmp_offset
; /* != NULL if USE_DIRECT_JUMP */
408 /* liveness analysis */
409 uint16_t *op_dead_args
; /* for each operation, each bit tells if the
410 corresponding argument is dead */
411 uint8_t *op_sync_args
; /* for each operation, each bit tells if the
412 corresponding output argument needs to be
415 /* tells in which temporary a given register is. It does not take
416 into account fixed registers */
417 int reg_to_temp
[TCG_TARGET_NB_REGS
];
418 TCGRegSet reserved_regs
;
419 tcg_target_long current_frame_offset
;
420 tcg_target_long frame_start
;
421 tcg_target_long frame_end
;
425 TCGTemp temps
[TCG_MAX_TEMPS
]; /* globals first, temps after */
427 TCGHelperInfo
*helpers
;
429 int allocated_helpers
;
432 #ifdef CONFIG_PROFILER
436 int64_t op_count
; /* total insn count */
437 int op_count_max
; /* max insn per TB */
440 int64_t del_op_count
;
442 int64_t code_out_len
;
447 int64_t restore_count
;
448 int64_t restore_time
;
451 #ifdef CONFIG_DEBUG_TCG
453 int goto_tb_issue_mask
;
456 uint16_t gen_opc_buf
[OPC_BUF_SIZE
];
457 TCGArg gen_opparam_buf
[OPPARAM_BUF_SIZE
];
459 uint16_t *gen_opc_ptr
;
460 TCGArg
*gen_opparam_ptr
;
461 target_ulong gen_opc_pc
[OPC_BUF_SIZE
];
462 uint16_t gen_opc_icount
[OPC_BUF_SIZE
];
463 uint8_t gen_opc_instr_start
[OPC_BUF_SIZE
];
465 /* Code generation */
466 int code_gen_max_blocks
;
467 uint8_t *code_gen_prologue
;
468 uint8_t *code_gen_buffer
;
469 size_t code_gen_buffer_size
;
470 /* threshold to flush the translated code buffer */
471 size_t code_gen_buffer_max_size
;
472 uint8_t *code_gen_ptr
;
476 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
477 /* labels info for qemu_ld/st IRs
478 The labels help to generate TLB miss case codes at the end of TB */
479 TCGLabelQemuLdst
*qemu_ldst_labels
;
480 int nb_qemu_ldst_labels
;
484 extern TCGContext tcg_ctx
;
486 /* pool based memory allocation */
488 void *tcg_malloc_internal(TCGContext
*s
, int size
);
489 void tcg_pool_reset(TCGContext
*s
);
490 void tcg_pool_delete(TCGContext
*s
);
492 static inline void *tcg_malloc(int size
)
494 TCGContext
*s
= &tcg_ctx
;
495 uint8_t *ptr
, *ptr_end
;
496 size
= (size
+ sizeof(long) - 1) & ~(sizeof(long) - 1);
498 ptr_end
= ptr
+ size
;
499 if (unlikely(ptr_end
> s
->pool_end
)) {
500 return tcg_malloc_internal(&tcg_ctx
, size
);
502 s
->pool_cur
= ptr_end
;
507 void tcg_context_init(TCGContext
*s
);
508 void tcg_prologue_init(TCGContext
*s
);
509 void tcg_func_start(TCGContext
*s
);
511 int tcg_gen_code(TCGContext
*s
, uint8_t *gen_code_buf
);
512 int tcg_gen_code_search_pc(TCGContext
*s
, uint8_t *gen_code_buf
, long offset
);
514 void tcg_set_frame(TCGContext
*s
, int reg
,
515 tcg_target_long start
, tcg_target_long size
);
517 TCGv_i32
tcg_global_reg_new_i32(int reg
, const char *name
);
518 TCGv_i32
tcg_global_mem_new_i32(int reg
, tcg_target_long offset
,
520 TCGv_i32
tcg_temp_new_internal_i32(int temp_local
);
521 static inline TCGv_i32
tcg_temp_new_i32(void)
523 return tcg_temp_new_internal_i32(0);
525 static inline TCGv_i32
tcg_temp_local_new_i32(void)
527 return tcg_temp_new_internal_i32(1);
529 void tcg_temp_free_i32(TCGv_i32 arg
);
530 char *tcg_get_arg_str_i32(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i32 arg
);
532 TCGv_i64
tcg_global_reg_new_i64(int reg
, const char *name
);
533 TCGv_i64
tcg_global_mem_new_i64(int reg
, tcg_target_long offset
,
535 TCGv_i64
tcg_temp_new_internal_i64(int temp_local
);
536 static inline TCGv_i64
tcg_temp_new_i64(void)
538 return tcg_temp_new_internal_i64(0);
540 static inline TCGv_i64
tcg_temp_local_new_i64(void)
542 return tcg_temp_new_internal_i64(1);
544 void tcg_temp_free_i64(TCGv_i64 arg
);
545 char *tcg_get_arg_str_i64(TCGContext
*s
, char *buf
, int buf_size
, TCGv_i64 arg
);
547 #if defined(CONFIG_DEBUG_TCG)
548 /* If you call tcg_clear_temp_count() at the start of a section of
549 * code which is not supposed to leak any TCG temporaries, then
550 * calling tcg_check_temp_count() at the end of the section will
551 * return 1 if the section did in fact leak a temporary.
553 void tcg_clear_temp_count(void);
554 int tcg_check_temp_count(void);
556 #define tcg_clear_temp_count() do { } while (0)
557 #define tcg_check_temp_count() 0
560 void tcg_dump_info(FILE *f
, fprintf_function cpu_fprintf
);
562 #define TCG_CT_ALIAS 0x80
563 #define TCG_CT_IALIAS 0x40
564 #define TCG_CT_REG 0x01
565 #define TCG_CT_CONST 0x02 /* any constant of register size */
567 typedef struct TCGArgConstraint
{
575 #define TCG_MAX_OP_ARGS 16
577 /* Bits for TCGOpDef->flags, 8 bits available. */
579 /* Instruction defines the end of a basic block. */
580 TCG_OPF_BB_END
= 0x01,
581 /* Instruction clobbers call registers and potentially update globals. */
582 TCG_OPF_CALL_CLOBBER
= 0x02,
583 /* Instruction has side effects: it cannot be removed if its outputs
584 are not used, and might trigger exceptions. */
585 TCG_OPF_SIDE_EFFECTS
= 0x04,
586 /* Instruction operands are 64-bits (otherwise 32-bits). */
587 TCG_OPF_64BIT
= 0x08,
588 /* Instruction is optional and not implemented by the host. */
589 TCG_OPF_NOT_PRESENT
= 0x10,
592 typedef struct TCGOpDef
{
594 uint8_t nb_oargs
, nb_iargs
, nb_cargs
, nb_args
;
596 TCGArgConstraint
*args_ct
;
598 #if defined(CONFIG_DEBUG_TCG)
603 extern TCGOpDef tcg_op_defs
[];
604 extern const size_t tcg_op_defs_max
;
606 typedef struct TCGTargetOpDef
{
608 const char *args_ct_str
[TCG_MAX_OP_ARGS
];
611 #define tcg_abort() \
613 fprintf(stderr, "%s:%d: tcg fatal error\n", __FILE__, __LINE__);\
617 #ifdef CONFIG_DEBUG_TCG
618 # define tcg_debug_assert(X) do { assert(X); } while (0)
619 #elif QEMU_GNUC_PREREQ(4, 5)
620 # define tcg_debug_assert(X) \
621 do { if (!(X)) { __builtin_unreachable(); } } while (0)
623 # define tcg_debug_assert(X) do { (void)(X); } while (0)
626 void tcg_add_target_add_op_defs(const TCGTargetOpDef
*tdefs
);
628 #if TCG_TARGET_REG_BITS == 32
629 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I32(n))
630 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I32(GET_TCGV_PTR(n))
632 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i32((tcg_target_long)(V)))
633 #define tcg_global_reg_new_ptr(R, N) \
634 TCGV_NAT_TO_PTR(tcg_global_reg_new_i32((R), (N)))
635 #define tcg_global_mem_new_ptr(R, O, N) \
636 TCGV_NAT_TO_PTR(tcg_global_mem_new_i32((R), (O), (N)))
637 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i32())
638 #define tcg_temp_free_ptr(T) tcg_temp_free_i32(TCGV_PTR_TO_NAT(T))
640 #define TCGV_NAT_TO_PTR(n) MAKE_TCGV_PTR(GET_TCGV_I64(n))
641 #define TCGV_PTR_TO_NAT(n) MAKE_TCGV_I64(GET_TCGV_PTR(n))
643 #define tcg_const_ptr(V) TCGV_NAT_TO_PTR(tcg_const_i64((tcg_target_long)(V)))
644 #define tcg_global_reg_new_ptr(R, N) \
645 TCGV_NAT_TO_PTR(tcg_global_reg_new_i64((R), (N)))
646 #define tcg_global_mem_new_ptr(R, O, N) \
647 TCGV_NAT_TO_PTR(tcg_global_mem_new_i64((R), (O), (N)))
648 #define tcg_temp_new_ptr() TCGV_NAT_TO_PTR(tcg_temp_new_i64())
649 #define tcg_temp_free_ptr(T) tcg_temp_free_i64(TCGV_PTR_TO_NAT(T))
652 void tcg_gen_callN(TCGContext
*s
, TCGv_ptr func
, unsigned int flags
,
653 int sizemask
, TCGArg ret
, int nargs
, TCGArg
*args
);
655 void tcg_gen_shifti_i64(TCGv_i64 ret
, TCGv_i64 arg1
,
656 int c
, int right
, int arith
);
658 TCGArg
*tcg_optimize(TCGContext
*s
, uint16_t *tcg_opc_ptr
, TCGArg
*args
,
659 TCGOpDef
*tcg_op_def
);
661 /* only used for debugging purposes */
662 void tcg_register_helper(void *func
, const char *name
);
663 const char *tcg_helper_get_name(TCGContext
*s
, void *func
);
664 void tcg_dump_ops(TCGContext
*s
);
666 void dump_ops(const uint16_t *opc_buf
, const TCGArg
*opparam_buf
);
667 TCGv_i32
tcg_const_i32(int32_t val
);
668 TCGv_i64
tcg_const_i64(int64_t val
);
669 TCGv_i32
tcg_const_local_i32(int32_t val
);
670 TCGv_i64
tcg_const_local_i64(int64_t val
);
672 /* TCG targets may use a different definition of tcg_qemu_tb_exec. */
673 #if !defined(tcg_qemu_tb_exec)
674 # define tcg_qemu_tb_exec(env, tb_ptr) \
675 ((tcg_target_ulong (*)(void *, void *))tcg_ctx.code_gen_prologue)(env, \
679 void tcg_register_jit(void *buf
, size_t buf_size
);
681 #if defined(CONFIG_QEMU_LDST_OPTIMIZATION) && defined(CONFIG_SOFTMMU)
682 /* Generate TB finalization at the end of block */
683 void tcg_out_tb_finalize(TCGContext
*s
);