include/hw/riscv/sifive_uart.h

   1 /*
   2  * SiFive UART interface
   3  *
   4  * Copyright (c) 2016 Stefan O'Rear
   5  * Copyright (c) 2017 SiFive, Inc.
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms and conditions of the GNU General Public License,
   9  * version 2 or later, as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #ifndef HW_SIFIVE_UART_H
  21 #define HW_SIFIVE_UART_H
  22
  23 #include "chardev/char-fe.h"
  24 #include "hw/sysbus.h"
  25
  26 enum {
  27     SIFIVE_UART_TXFIFO        = 0,
  28     SIFIVE_UART_RXFIFO        = 4,
  29     SIFIVE_UART_TXCTRL        = 8,
  30     SIFIVE_UART_TXMARK        = 10,
  31     SIFIVE_UART_RXCTRL        = 12,
  32     SIFIVE_UART_RXMARK        = 14,
  33     SIFIVE_UART_IE            = 16,
  34     SIFIVE_UART_IP            = 20,
  35     SIFIVE_UART_DIV           = 24,
  36     SIFIVE_UART_MAX           = 32
  37 };
  38
  39 enum {
  40     SIFIVE_UART_IE_TXWM       = 1, /* Transmit watermark interrupt enable */
  41     SIFIVE_UART_IE_RXWM       = 2  /* Receive watermark interrupt enable */
  42 };
  43
  44 enum {
  45     SIFIVE_UART_IP_TXWM       = 1, /* Transmit watermark interrupt pending */
  46     SIFIVE_UART_IP_RXWM       = 2  /* Receive watermark interrupt pending */
  47 };
  48
  49 #define SIFIVE_UART_GET_TXCNT(txctrl)   ((txctrl >> 16) & 0x7)
  50 #define SIFIVE_UART_GET_RXCNT(rxctrl)   ((rxctrl >> 16) & 0x7)
  51
  52 #define TYPE_SIFIVE_UART "riscv.sifive.uart"
  53
  54 #define SIFIVE_UART(obj) \
  55     OBJECT_CHECK(SiFiveUARTState, (obj), TYPE_SIFIVE_UART)
  56
  57 typedef struct SiFiveUARTState {
  58     /*< private >*/
  59     SysBusDevice parent_obj;
  60
  61     /*< public >*/
  62     qemu_irq irq;
  63     MemoryRegion mmio;
  64     CharBackend chr;
  65     uint8_t rx_fifo[8];
  66     unsigned int rx_fifo_len;
  67     uint32_t ie;
  68     uint32_t ip;
  69     uint32_t txctrl;
  70     uint32_t rxctrl;
  71     uint32_t div;
  72 } SiFiveUARTState;
  73
  74 SiFiveUARTState *sifive_uart_create(MemoryRegion *address_space, hwaddr base,
  75     Chardev *chr, qemu_irq irq);
  76
  77 #endif