tcg/tcg-op.h

   1 /*
   2  * Tiny Code Generator for QEMU
   3  *
   4  * Copyright (c) 2008 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef TCG_TCG_OP_H
  26 #define TCG_TCG_OP_H
  27
  28 #include "tcg.h"
  29 #include "exec/helper-proto.h"
  30 #include "exec/helper-gen.h"
  31
  32 /* Basic output routines.  Not for general consumption.  */
  33
  34 void tcg_gen_op1(TCGOpcode, TCGArg);
  35 void tcg_gen_op2(TCGOpcode, TCGArg, TCGArg);
  36 void tcg_gen_op3(TCGOpcode, TCGArg, TCGArg, TCGArg);
  37 void tcg_gen_op4(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg);
  38 void tcg_gen_op5(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
  39 void tcg_gen_op6(TCGOpcode, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg, TCGArg);
  40
  41 void vec_gen_2(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg);
  42 void vec_gen_3(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg);
  43 void vec_gen_4(TCGOpcode, TCGType, unsigned, TCGArg, TCGArg, TCGArg, TCGArg);
  44
  45 static inline void tcg_gen_op1_i32(TCGOpcode opc, TCGv_i32 a1)
  46 {
  47     tcg_gen_op1(opc, tcgv_i32_arg(a1));
  48 }
  49
  50 static inline void tcg_gen_op1_i64(TCGOpcode opc, TCGv_i64 a1)
  51 {
  52     tcg_gen_op1(opc, tcgv_i64_arg(a1));
  53 }
  54
  55 static inline void tcg_gen_op1i(TCGOpcode opc, TCGArg a1)
  56 {
  57     tcg_gen_op1(opc, a1);
  58 }
  59
  60 static inline void tcg_gen_op2_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2)
  61 {
  62     tcg_gen_op2(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2));
  63 }
  64
  65 static inline void tcg_gen_op2_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2)
  66 {
  67     tcg_gen_op2(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2));
  68 }
  69
  70 static inline void tcg_gen_op2i_i32(TCGOpcode opc, TCGv_i32 a1, TCGArg a2)
  71 {
  72     tcg_gen_op2(opc, tcgv_i32_arg(a1), a2);
  73 }
  74
  75 static inline void tcg_gen_op2i_i64(TCGOpcode opc, TCGv_i64 a1, TCGArg a2)
  76 {
  77     tcg_gen_op2(opc, tcgv_i64_arg(a1), a2);
  78 }
  79
  80 static inline void tcg_gen_op2ii(TCGOpcode opc, TCGArg a1, TCGArg a2)
  81 {
  82     tcg_gen_op2(opc, a1, a2);
  83 }
  84
  85 static inline void tcg_gen_op3_i32(TCGOpcode opc, TCGv_i32 a1,
  86                                    TCGv_i32 a2, TCGv_i32 a3)
  87 {
  88     tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), tcgv_i32_arg(a3));
  89 }
  90
  91 static inline void tcg_gen_op3_i64(TCGOpcode opc, TCGv_i64 a1,
  92                                    TCGv_i64 a2, TCGv_i64 a3)
  93 {
  94     tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), tcgv_i64_arg(a3));
  95 }
  96
  97 static inline void tcg_gen_op3i_i32(TCGOpcode opc, TCGv_i32 a1,
  98                                     TCGv_i32 a2, TCGArg a3)
  99 {
 100     tcg_gen_op3(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3);
 101 }
 102
 103 static inline void tcg_gen_op3i_i64(TCGOpcode opc, TCGv_i64 a1,
 104                                     TCGv_i64 a2, TCGArg a3)
 105 {
 106     tcg_gen_op3(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3);
 107 }
 108
 109 static inline void tcg_gen_ldst_op_i32(TCGOpcode opc, TCGv_i32 val,
 110                                        TCGv_ptr base, TCGArg offset)
 111 {
 112     tcg_gen_op3(opc, tcgv_i32_arg(val), tcgv_ptr_arg(base), offset);
 113 }
 114
 115 static inline void tcg_gen_ldst_op_i64(TCGOpcode opc, TCGv_i64 val,
 116                                        TCGv_ptr base, TCGArg offset)
 117 {
 118     tcg_gen_op3(opc, tcgv_i64_arg(val), tcgv_ptr_arg(base), offset);
 119 }
 120
 121 static inline void tcg_gen_op4_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 122                                    TCGv_i32 a3, TCGv_i32 a4)
 123 {
 124     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 125                 tcgv_i32_arg(a3), tcgv_i32_arg(a4));
 126 }
 127
 128 static inline void tcg_gen_op4_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 129                                    TCGv_i64 a3, TCGv_i64 a4)
 130 {
 131     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 132                 tcgv_i64_arg(a3), tcgv_i64_arg(a4));
 133 }
 134
 135 static inline void tcg_gen_op4i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 136                                     TCGv_i32 a3, TCGArg a4)
 137 {
 138     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 139                 tcgv_i32_arg(a3), a4);
 140 }
 141
 142 static inline void tcg_gen_op4i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 143                                     TCGv_i64 a3, TCGArg a4)
 144 {
 145     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 146                 tcgv_i64_arg(a3), a4);
 147 }
 148
 149 static inline void tcg_gen_op4ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 150                                      TCGArg a3, TCGArg a4)
 151 {
 152     tcg_gen_op4(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2), a3, a4);
 153 }
 154
 155 static inline void tcg_gen_op4ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 156                                      TCGArg a3, TCGArg a4)
 157 {
 158     tcg_gen_op4(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2), a3, a4);
 159 }
 160
 161 static inline void tcg_gen_op5_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 162                                    TCGv_i32 a3, TCGv_i32 a4, TCGv_i32 a5)
 163 {
 164     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 165                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5));
 166 }
 167
 168 static inline void tcg_gen_op5_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 169                                    TCGv_i64 a3, TCGv_i64 a4, TCGv_i64 a5)
 170 {
 171     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 172                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5));
 173 }
 174
 175 static inline void tcg_gen_op5i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 176                                     TCGv_i32 a3, TCGv_i32 a4, TCGArg a5)
 177 {
 178     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 179                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5);
 180 }
 181
 182 static inline void tcg_gen_op5i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 183                                     TCGv_i64 a3, TCGv_i64 a4, TCGArg a5)
 184 {
 185     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 186                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5);
 187 }
 188
 189 static inline void tcg_gen_op5ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 190                                      TCGv_i32 a3, TCGArg a4, TCGArg a5)
 191 {
 192     tcg_gen_op5(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 193                 tcgv_i32_arg(a3), a4, a5);
 194 }
 195
 196 static inline void tcg_gen_op5ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 197                                      TCGv_i64 a3, TCGArg a4, TCGArg a5)
 198 {
 199     tcg_gen_op5(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 200                 tcgv_i64_arg(a3), a4, a5);
 201 }
 202
 203 static inline void tcg_gen_op6_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 204                                    TCGv_i32 a3, TCGv_i32 a4,
 205                                    TCGv_i32 a5, TCGv_i32 a6)
 206 {
 207     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 208                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5),
 209                 tcgv_i32_arg(a6));
 210 }
 211
 212 static inline void tcg_gen_op6_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 213                                    TCGv_i64 a3, TCGv_i64 a4,
 214                                    TCGv_i64 a5, TCGv_i64 a6)
 215 {
 216     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 217                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5),
 218                 tcgv_i64_arg(a6));
 219 }
 220
 221 static inline void tcg_gen_op6i_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 222                                     TCGv_i32 a3, TCGv_i32 a4,
 223                                     TCGv_i32 a5, TCGArg a6)
 224 {
 225     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 226                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), tcgv_i32_arg(a5), a6);
 227 }
 228
 229 static inline void tcg_gen_op6i_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 230                                     TCGv_i64 a3, TCGv_i64 a4,
 231                                     TCGv_i64 a5, TCGArg a6)
 232 {
 233     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 234                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), tcgv_i64_arg(a5), a6);
 235 }
 236
 237 static inline void tcg_gen_op6ii_i32(TCGOpcode opc, TCGv_i32 a1, TCGv_i32 a2,
 238                                      TCGv_i32 a3, TCGv_i32 a4,
 239                                      TCGArg a5, TCGArg a6)
 240 {
 241     tcg_gen_op6(opc, tcgv_i32_arg(a1), tcgv_i32_arg(a2),
 242                 tcgv_i32_arg(a3), tcgv_i32_arg(a4), a5, a6);
 243 }
 244
 245 static inline void tcg_gen_op6ii_i64(TCGOpcode opc, TCGv_i64 a1, TCGv_i64 a2,
 246                                      TCGv_i64 a3, TCGv_i64 a4,
 247                                      TCGArg a5, TCGArg a6)
 248 {
 249     tcg_gen_op6(opc, tcgv_i64_arg(a1), tcgv_i64_arg(a2),
 250                 tcgv_i64_arg(a3), tcgv_i64_arg(a4), a5, a6);
 251 }
 252
 253
 254 /* Generic ops.  */
 255
 256 static inline void gen_set_label(TCGLabel *l)
 257 {
 258     tcg_gen_op1(INDEX_op_set_label, label_arg(l));
 259 }
 260
 261 static inline void tcg_gen_br(TCGLabel *l)
 262 {
 263     l->refs++;
 264     tcg_gen_op1(INDEX_op_br, label_arg(l));
 265 }
 266
 267 void tcg_gen_mb(TCGBar);
 268
 269 /* Helper calls. */
 270
 271 /* 32 bit ops */
 272
 273 void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 274 void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
 275 void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 276 void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 277 void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 278 void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 279 void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 280 void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 281 void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 282 void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
 283 void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 284 void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 285 void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 286 void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 287 void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 288 void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 289 void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 290 void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 291 void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 292 void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 293 void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 294 void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 295 void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
 296 void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
 297 void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
 298 void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 299 void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 300 void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
 301 void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, unsigned arg2);
 302 void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
 303                          unsigned int ofs, unsigned int len);
 304 void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
 305                            unsigned int ofs, unsigned int len);
 306 void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
 307                          unsigned int ofs, unsigned int len);
 308 void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
 309                           unsigned int ofs, unsigned int len);
 310 void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
 311 void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
 312 void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
 313                          TCGv_i32 arg1, TCGv_i32 arg2);
 314 void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
 315                           TCGv_i32 arg1, int32_t arg2);
 316 void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
 317                          TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
 318 void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 319                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 320 void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
 321                       TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
 322 void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 323 void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 324 void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
 325 void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
 326 void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
 327 void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
 328 void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
 329 void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg);
 330 void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
 331 void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
 332 void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
 333 void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
 334 void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
 335
 336 static inline void tcg_gen_discard_i32(TCGv_i32 arg)
 337 {
 338     tcg_gen_op1_i32(INDEX_op_discard, arg);
 339 }
 340
 341 static inline void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg)
 342 {
 343     if (ret != arg) {
 344         tcg_gen_op2_i32(INDEX_op_mov_i32, ret, arg);
 345     }
 346 }
 347
 348 static inline void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg)
 349 {
 350     tcg_gen_op2i_i32(INDEX_op_movi_i32, ret, arg);
 351 }
 352
 353 static inline void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 354                                     tcg_target_long offset)
 355 {
 356     tcg_gen_ldst_op_i32(INDEX_op_ld8u_i32, ret, arg2, offset);
 357 }
 358
 359 static inline void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 360                                     tcg_target_long offset)
 361 {
 362     tcg_gen_ldst_op_i32(INDEX_op_ld8s_i32, ret, arg2, offset);
 363 }
 364
 365 static inline void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2,
 366                                      tcg_target_long offset)
 367 {
 368     tcg_gen_ldst_op_i32(INDEX_op_ld16u_i32, ret, arg2, offset);
 369 }
 370
 371 static inline void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2,
 372                                      tcg_target_long offset)
 373 {
 374     tcg_gen_ldst_op_i32(INDEX_op_ld16s_i32, ret, arg2, offset);
 375 }
 376
 377 static inline void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2,
 378                                   tcg_target_long offset)
 379 {
 380     tcg_gen_ldst_op_i32(INDEX_op_ld_i32, ret, arg2, offset);
 381 }
 382
 383 static inline void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 384                                    tcg_target_long offset)
 385 {
 386     tcg_gen_ldst_op_i32(INDEX_op_st8_i32, arg1, arg2, offset);
 387 }
 388
 389 static inline void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 390                                     tcg_target_long offset)
 391 {
 392     tcg_gen_ldst_op_i32(INDEX_op_st16_i32, arg1, arg2, offset);
 393 }
 394
 395 static inline void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2,
 396                                   tcg_target_long offset)
 397 {
 398     tcg_gen_ldst_op_i32(INDEX_op_st_i32, arg1, arg2, offset);
 399 }
 400
 401 static inline void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 402 {
 403     tcg_gen_op3_i32(INDEX_op_add_i32, ret, arg1, arg2);
 404 }
 405
 406 static inline void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 407 {
 408     tcg_gen_op3_i32(INDEX_op_sub_i32, ret, arg1, arg2);
 409 }
 410
 411 static inline void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 412 {
 413     tcg_gen_op3_i32(INDEX_op_and_i32, ret, arg1, arg2);
 414 }
 415
 416 static inline void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 417 {
 418     tcg_gen_op3_i32(INDEX_op_or_i32, ret, arg1, arg2);
 419 }
 420
 421 static inline void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 422 {
 423     tcg_gen_op3_i32(INDEX_op_xor_i32, ret, arg1, arg2);
 424 }
 425
 426 static inline void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 427 {
 428     tcg_gen_op3_i32(INDEX_op_shl_i32, ret, arg1, arg2);
 429 }
 430
 431 static inline void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 432 {
 433     tcg_gen_op3_i32(INDEX_op_shr_i32, ret, arg1, arg2);
 434 }
 435
 436 static inline void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 437 {
 438     tcg_gen_op3_i32(INDEX_op_sar_i32, ret, arg1, arg2);
 439 }
 440
 441 static inline void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2)
 442 {
 443     tcg_gen_op3_i32(INDEX_op_mul_i32, ret, arg1, arg2);
 444 }
 445
 446 static inline void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg)
 447 {
 448     if (TCG_TARGET_HAS_neg_i32) {
 449         tcg_gen_op2_i32(INDEX_op_neg_i32, ret, arg);
 450     } else {
 451         tcg_gen_subfi_i32(ret, 0, arg);
 452     }
 453 }
 454
 455 static inline void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg)
 456 {
 457     if (TCG_TARGET_HAS_not_i32) {
 458         tcg_gen_op2_i32(INDEX_op_not_i32, ret, arg);
 459     } else {
 460         tcg_gen_xori_i32(ret, arg, -1);
 461     }
 462 }
 463
 464 /* 64 bit ops */
 465
 466 void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 467 void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
 468 void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 469 void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 470 void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 471 void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 472 void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 473 void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 474 void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 475 void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
 476 void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 477 void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 478 void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 479 void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 480 void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 481 void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 482 void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 483 void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 484 void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 485 void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 486 void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 487 void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 488 void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
 489 void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
 490 void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
 491 void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 492 void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 493 void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 494 void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, unsigned arg2);
 495 void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
 496                          unsigned int ofs, unsigned int len);
 497 void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
 498                            unsigned int ofs, unsigned int len);
 499 void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
 500                          unsigned int ofs, unsigned int len);
 501 void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
 502                           unsigned int ofs, unsigned int len);
 503 void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
 504 void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
 505 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
 506                          TCGv_i64 arg1, TCGv_i64 arg2);
 507 void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
 508                           TCGv_i64 arg1, int64_t arg2);
 509 void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
 510                          TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
 511 void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 512                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 513 void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
 514                       TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
 515 void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 516 void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 517 void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
 518 void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
 519 void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
 520 void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
 521 void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
 522 void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
 523 void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
 524 void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
 525 void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg);
 526 void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg);
 527 void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
 528 void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
 529 void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
 530 void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
 531 void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
 532
 533 #if TCG_TARGET_REG_BITS == 64
 534 static inline void tcg_gen_discard_i64(TCGv_i64 arg)
 535 {
 536     tcg_gen_op1_i64(INDEX_op_discard, arg);
 537 }
 538
 539 static inline void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg)
 540 {
 541     if (ret != arg) {
 542         tcg_gen_op2_i64(INDEX_op_mov_i64, ret, arg);
 543     }
 544 }
 545
 546 static inline void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg)
 547 {
 548     tcg_gen_op2i_i64(INDEX_op_movi_i64, ret, arg);
 549 }
 550
 551 static inline void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 552                                     tcg_target_long offset)
 553 {
 554     tcg_gen_ldst_op_i64(INDEX_op_ld8u_i64, ret, arg2, offset);
 555 }
 556
 557 static inline void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 558                                     tcg_target_long offset)
 559 {
 560     tcg_gen_ldst_op_i64(INDEX_op_ld8s_i64, ret, arg2, offset);
 561 }
 562
 563 static inline void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 564                                      tcg_target_long offset)
 565 {
 566     tcg_gen_ldst_op_i64(INDEX_op_ld16u_i64, ret, arg2, offset);
 567 }
 568
 569 static inline void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 570                                      tcg_target_long offset)
 571 {
 572     tcg_gen_ldst_op_i64(INDEX_op_ld16s_i64, ret, arg2, offset);
 573 }
 574
 575 static inline void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2,
 576                                      tcg_target_long offset)
 577 {
 578     tcg_gen_ldst_op_i64(INDEX_op_ld32u_i64, ret, arg2, offset);
 579 }
 580
 581 static inline void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2,
 582                                      tcg_target_long offset)
 583 {
 584     tcg_gen_ldst_op_i64(INDEX_op_ld32s_i64, ret, arg2, offset);
 585 }
 586
 587 static inline void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2,
 588                                   tcg_target_long offset)
 589 {
 590     tcg_gen_ldst_op_i64(INDEX_op_ld_i64, ret, arg2, offset);
 591 }
 592
 593 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 594                                    tcg_target_long offset)
 595 {
 596     tcg_gen_ldst_op_i64(INDEX_op_st8_i64, arg1, arg2, offset);
 597 }
 598
 599 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 600                                     tcg_target_long offset)
 601 {
 602     tcg_gen_ldst_op_i64(INDEX_op_st16_i64, arg1, arg2, offset);
 603 }
 604
 605 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 606                                     tcg_target_long offset)
 607 {
 608     tcg_gen_ldst_op_i64(INDEX_op_st32_i64, arg1, arg2, offset);
 609 }
 610
 611 static inline void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 612                                   tcg_target_long offset)
 613 {
 614     tcg_gen_ldst_op_i64(INDEX_op_st_i64, arg1, arg2, offset);
 615 }
 616
 617 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 618 {
 619     tcg_gen_op3_i64(INDEX_op_add_i64, ret, arg1, arg2);
 620 }
 621
 622 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 623 {
 624     tcg_gen_op3_i64(INDEX_op_sub_i64, ret, arg1, arg2);
 625 }
 626
 627 static inline void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 628 {
 629     tcg_gen_op3_i64(INDEX_op_and_i64, ret, arg1, arg2);
 630 }
 631
 632 static inline void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 633 {
 634     tcg_gen_op3_i64(INDEX_op_or_i64, ret, arg1, arg2);
 635 }
 636
 637 static inline void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 638 {
 639     tcg_gen_op3_i64(INDEX_op_xor_i64, ret, arg1, arg2);
 640 }
 641
 642 static inline void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 643 {
 644     tcg_gen_op3_i64(INDEX_op_shl_i64, ret, arg1, arg2);
 645 }
 646
 647 static inline void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 648 {
 649     tcg_gen_op3_i64(INDEX_op_shr_i64, ret, arg1, arg2);
 650 }
 651
 652 static inline void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 653 {
 654     tcg_gen_op3_i64(INDEX_op_sar_i64, ret, arg1, arg2);
 655 }
 656
 657 static inline void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 658 {
 659     tcg_gen_op3_i64(INDEX_op_mul_i64, ret, arg1, arg2);
 660 }
 661 #else /* TCG_TARGET_REG_BITS == 32 */
 662 static inline void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 663                                    tcg_target_long offset)
 664 {
 665     tcg_gen_st8_i32(TCGV_LOW(arg1), arg2, offset);
 666 }
 667
 668 static inline void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 669                                     tcg_target_long offset)
 670 {
 671     tcg_gen_st16_i32(TCGV_LOW(arg1), arg2, offset);
 672 }
 673
 674 static inline void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2,
 675                                     tcg_target_long offset)
 676 {
 677     tcg_gen_st_i32(TCGV_LOW(arg1), arg2, offset);
 678 }
 679
 680 static inline void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 681 {
 682     tcg_gen_add2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 683                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 684 }
 685
 686 static inline void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 687 {
 688     tcg_gen_sub2_i32(TCGV_LOW(ret), TCGV_HIGH(ret), TCGV_LOW(arg1),
 689                      TCGV_HIGH(arg1), TCGV_LOW(arg2), TCGV_HIGH(arg2));
 690 }
 691
 692 void tcg_gen_discard_i64(TCGv_i64 arg);
 693 void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
 694 void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
 695 void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 696 void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 697 void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 698 void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 699 void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 700 void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 701 void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
 702 void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
 703 void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 704 void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 705 void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 706 void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 707 void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 708 void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 709 void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
 710 #endif /* TCG_TARGET_REG_BITS */
 711
 712 static inline void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg)
 713 {
 714     if (TCG_TARGET_HAS_neg_i64) {
 715         tcg_gen_op2_i64(INDEX_op_neg_i64, ret, arg);
 716     } else {
 717         tcg_gen_subfi_i64(ret, 0, arg);
 718     }
 719 }
 720
 721 /* Size changing operations.  */
 722
 723 void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 724 void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
 725 void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
 726 void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 727 void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
 728 void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
 729 void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
 730
 731 static inline void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi)
 732 {
 733     tcg_gen_deposit_i64(ret, lo, hi, 32, 32);
 734 }
 735
 736 /* QEMU specific operations.  */
 737
 738 #ifndef TARGET_LONG_BITS
 739 #error must include QEMU headers
 740 #endif
 741
 742 #if TARGET_INSN_START_WORDS == 1
 743 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 744 static inline void tcg_gen_insn_start(target_ulong pc)
 745 {
 746     tcg_gen_op1(INDEX_op_insn_start, pc);
 747 }
 748 # else
 749 static inline void tcg_gen_insn_start(target_ulong pc)
 750 {
 751     tcg_gen_op2(INDEX_op_insn_start, (uint32_t)pc, (uint32_t)(pc >> 32));
 752 }
 753 # endif
 754 #elif TARGET_INSN_START_WORDS == 2
 755 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 756 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 757 {
 758     tcg_gen_op2(INDEX_op_insn_start, pc, a1);
 759 }
 760 # else
 761 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1)
 762 {
 763     tcg_gen_op4(INDEX_op_insn_start,
 764                 (uint32_t)pc, (uint32_t)(pc >> 32),
 765                 (uint32_t)a1, (uint32_t)(a1 >> 32));
 766 }
 767 # endif
 768 #elif TARGET_INSN_START_WORDS == 3
 769 # if TARGET_LONG_BITS <= TCG_TARGET_REG_BITS
 770 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 771                                       target_ulong a2)
 772 {
 773     tcg_gen_op3(INDEX_op_insn_start, pc, a1, a2);
 774 }
 775 # else
 776 static inline void tcg_gen_insn_start(target_ulong pc, target_ulong a1,
 777                                       target_ulong a2)
 778 {
 779     tcg_gen_op6(INDEX_op_insn_start,
 780                 (uint32_t)pc, (uint32_t)(pc >> 32),
 781                 (uint32_t)a1, (uint32_t)(a1 >> 32),
 782                 (uint32_t)a2, (uint32_t)(a2 >> 32));
 783 }
 784 # endif
 785 #else
 786 # error "Unhandled number of operands to insn_start"
 787 #endif
 788
 789 /**
 790  * tcg_gen_exit_tb() - output exit_tb TCG operation
 791  * @tb: The TranslationBlock from which we are exiting
 792  * @idx: Direct jump slot index, or exit request
 793  *
 794  * See tcg/README for more info about this TCG operation.
 795  * See also tcg.h and the block comment above TB_EXIT_MASK.
 796  *
 797  * For a normal exit from the TB, back to the main loop, @tb should
 798  * be NULL and @idx should be 0.  Otherwise, @tb should be valid and
 799  * @idx should be one of the TB_EXIT_ values.
 800  */
 801 void tcg_gen_exit_tb(TranslationBlock *tb, unsigned idx);
 802
 803 /**
 804  * tcg_gen_goto_tb() - output goto_tb TCG operation
 805  * @idx: Direct jump slot index (0 or 1)
 806  *
 807  * See tcg/README for more info about this TCG operation.
 808  *
 809  * NOTE: In softmmu emulation, direct jumps with goto_tb are only safe within
 810  * the pages this TB resides in because we don't take care of direct jumps when
 811  * address mapping changes, e.g. in tlb_flush(). In user mode, there's only a
 812  * static address translation, so the destination address is always valid, TBs
 813  * are always invalidated properly, and direct jumps are reset when mapping
 814  * changes.
 815  */
 816 void tcg_gen_goto_tb(unsigned idx);
 817
 818 /**
 819  * tcg_gen_lookup_and_goto_ptr() - look up the current TB, jump to it if valid
 820  * @addr: Guest address of the target TB
 821  *
 822  * If the TB is not valid, jump to the epilogue.
 823  *
 824  * This operation is optional. If the TCG backend does not implement goto_ptr,
 825  * this op is equivalent to calling tcg_gen_exit_tb() with 0 as the argument.
 826  */
 827 void tcg_gen_lookup_and_goto_ptr(void);
 828
 829 #if TARGET_LONG_BITS == 32
 830 #define tcg_temp_new() tcg_temp_new_i32()
 831 #define tcg_global_reg_new tcg_global_reg_new_i32
 832 #define tcg_global_mem_new tcg_global_mem_new_i32
 833 #define tcg_temp_local_new() tcg_temp_local_new_i32()
 834 #define tcg_temp_free tcg_temp_free_i32
 835 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i32
 836 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i32
 837 #else
 838 #define tcg_temp_new() tcg_temp_new_i64()
 839 #define tcg_global_reg_new tcg_global_reg_new_i64
 840 #define tcg_global_mem_new tcg_global_mem_new_i64
 841 #define tcg_temp_local_new() tcg_temp_local_new_i64()
 842 #define tcg_temp_free tcg_temp_free_i64
 843 #define tcg_gen_qemu_ld_tl tcg_gen_qemu_ld_i64
 844 #define tcg_gen_qemu_st_tl tcg_gen_qemu_st_i64
 845 #endif
 846
 847 void tcg_gen_qemu_ld_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 848 void tcg_gen_qemu_st_i32(TCGv_i32, TCGv, TCGArg, TCGMemOp);
 849 void tcg_gen_qemu_ld_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 850 void tcg_gen_qemu_st_i64(TCGv_i64, TCGv, TCGArg, TCGMemOp);
 851
 852 static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index)
 853 {
 854     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_UB);
 855 }
 856
 857 static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index)
 858 {
 859     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_SB);
 860 }
 861
 862 static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index)
 863 {
 864     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUW);
 865 }
 866
 867 static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index)
 868 {
 869     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESW);
 870 }
 871
 872 static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index)
 873 {
 874     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TEUL);
 875 }
 876
 877 static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index)
 878 {
 879     tcg_gen_qemu_ld_tl(ret, addr, mem_index, MO_TESL);
 880 }
 881
 882 static inline void tcg_gen_qemu_ld64(TCGv_i64 ret, TCGv addr, int mem_index)
 883 {
 884     tcg_gen_qemu_ld_i64(ret, addr, mem_index, MO_TEQ);
 885 }
 886
 887 static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index)
 888 {
 889     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_UB);
 890 }
 891
 892 static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index)
 893 {
 894     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUW);
 895 }
 896
 897 static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index)
 898 {
 899     tcg_gen_qemu_st_tl(arg, addr, mem_index, MO_TEUL);
 900 }
 901
 902 static inline void tcg_gen_qemu_st64(TCGv_i64 arg, TCGv addr, int mem_index)
 903 {
 904     tcg_gen_qemu_st_i64(arg, addr, mem_index, MO_TEQ);
 905 }
 906
 907 void tcg_gen_atomic_cmpxchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGv_i32,
 908                                 TCGArg, TCGMemOp);
 909 void tcg_gen_atomic_cmpxchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGv_i64,
 910                                 TCGArg, TCGMemOp);
 911
 912 void tcg_gen_atomic_xchg_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 913 void tcg_gen_atomic_xchg_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 914
 915 void tcg_gen_atomic_fetch_add_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 916 void tcg_gen_atomic_fetch_add_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 917 void tcg_gen_atomic_fetch_and_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 918 void tcg_gen_atomic_fetch_and_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 919 void tcg_gen_atomic_fetch_or_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 920 void tcg_gen_atomic_fetch_or_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 921 void tcg_gen_atomic_fetch_xor_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 922 void tcg_gen_atomic_fetch_xor_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 923 void tcg_gen_atomic_fetch_smin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 924 void tcg_gen_atomic_fetch_smin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 925 void tcg_gen_atomic_fetch_umin_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 926 void tcg_gen_atomic_fetch_umin_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 927 void tcg_gen_atomic_fetch_smax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 928 void tcg_gen_atomic_fetch_smax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 929 void tcg_gen_atomic_fetch_umax_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 930 void tcg_gen_atomic_fetch_umax_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 931
 932 void tcg_gen_atomic_add_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 933 void tcg_gen_atomic_add_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 934 void tcg_gen_atomic_and_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 935 void tcg_gen_atomic_and_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 936 void tcg_gen_atomic_or_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 937 void tcg_gen_atomic_or_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 938 void tcg_gen_atomic_xor_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 939 void tcg_gen_atomic_xor_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 940 void tcg_gen_atomic_smin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 941 void tcg_gen_atomic_smin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 942 void tcg_gen_atomic_umin_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 943 void tcg_gen_atomic_umin_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 944 void tcg_gen_atomic_smax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 945 void tcg_gen_atomic_smax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 946 void tcg_gen_atomic_umax_fetch_i32(TCGv_i32, TCGv, TCGv_i32, TCGArg, TCGMemOp);
 947 void tcg_gen_atomic_umax_fetch_i64(TCGv_i64, TCGv, TCGv_i64, TCGArg, TCGMemOp);
 948
 949 void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
 950 void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
 951 void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
 952 void tcg_gen_dup8i_vec(TCGv_vec, uint32_t);
 953 void tcg_gen_dup16i_vec(TCGv_vec, uint32_t);
 954 void tcg_gen_dup32i_vec(TCGv_vec, uint32_t);
 955 void tcg_gen_dup64i_vec(TCGv_vec, uint64_t);
 956 void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
 957 void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 958 void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 959 void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 960 void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 961 void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 962 void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 963 void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 964 void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
 965 void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
 966 void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
 967
 968 void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
 969 void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
 970 void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
 971
 972 void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r,
 973                      TCGv_vec a, TCGv_vec b);
 974
 975 void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
 976 void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
 977 void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
 978
 979 #if TARGET_LONG_BITS == 64
 980 #define tcg_gen_movi_tl tcg_gen_movi_i64
 981 #define tcg_gen_mov_tl tcg_gen_mov_i64
 982 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64
 983 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64
 984 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64
 985 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64
 986 #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64
 987 #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64
 988 #define tcg_gen_ld_tl tcg_gen_ld_i64
 989 #define tcg_gen_st8_tl tcg_gen_st8_i64
 990 #define tcg_gen_st16_tl tcg_gen_st16_i64
 991 #define tcg_gen_st32_tl tcg_gen_st32_i64
 992 #define tcg_gen_st_tl tcg_gen_st_i64
 993 #define tcg_gen_add_tl tcg_gen_add_i64
 994 #define tcg_gen_addi_tl tcg_gen_addi_i64
 995 #define tcg_gen_sub_tl tcg_gen_sub_i64
 996 #define tcg_gen_neg_tl tcg_gen_neg_i64
 997 #define tcg_gen_subfi_tl tcg_gen_subfi_i64
 998 #define tcg_gen_subi_tl tcg_gen_subi_i64
 999 #define tcg_gen_and_tl tcg_gen_and_i64
1000 #define tcg_gen_andi_tl tcg_gen_andi_i64
1001 #define tcg_gen_or_tl tcg_gen_or_i64
1002 #define tcg_gen_ori_tl tcg_gen_ori_i64
1003 #define tcg_gen_xor_tl tcg_gen_xor_i64
1004 #define tcg_gen_xori_tl tcg_gen_xori_i64
1005 #define tcg_gen_not_tl tcg_gen_not_i64
1006 #define tcg_gen_shl_tl tcg_gen_shl_i64
1007 #define tcg_gen_shli_tl tcg_gen_shli_i64
1008 #define tcg_gen_shr_tl tcg_gen_shr_i64
1009 #define tcg_gen_shri_tl tcg_gen_shri_i64
1010 #define tcg_gen_sar_tl tcg_gen_sar_i64
1011 #define tcg_gen_sari_tl tcg_gen_sari_i64
1012 #define tcg_gen_brcond_tl tcg_gen_brcond_i64
1013 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
1014 #define tcg_gen_setcond_tl tcg_gen_setcond_i64
1015 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i64
1016 #define tcg_gen_mul_tl tcg_gen_mul_i64
1017 #define tcg_gen_muli_tl tcg_gen_muli_i64
1018 #define tcg_gen_div_tl tcg_gen_div_i64
1019 #define tcg_gen_rem_tl tcg_gen_rem_i64
1020 #define tcg_gen_divu_tl tcg_gen_divu_i64
1021 #define tcg_gen_remu_tl tcg_gen_remu_i64
1022 #define tcg_gen_discard_tl tcg_gen_discard_i64
1023 #define tcg_gen_trunc_tl_i32 tcg_gen_extrl_i64_i32
1024 #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64
1025 #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64
1026 #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64
1027 #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64
1028 #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64
1029 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64
1030 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64
1031 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64
1032 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
1033 #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
1034 #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
1035 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i64
1036 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i64
1037 #define tcg_gen_bswap64_tl tcg_gen_bswap64_i64
1038 #define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
1039 #define tcg_gen_extr_i64_tl tcg_gen_extr32_i64
1040 #define tcg_gen_andc_tl tcg_gen_andc_i64
1041 #define tcg_gen_eqv_tl tcg_gen_eqv_i64
1042 #define tcg_gen_nand_tl tcg_gen_nand_i64
1043 #define tcg_gen_nor_tl tcg_gen_nor_i64
1044 #define tcg_gen_orc_tl tcg_gen_orc_i64
1045 #define tcg_gen_clz_tl tcg_gen_clz_i64
1046 #define tcg_gen_ctz_tl tcg_gen_ctz_i64
1047 #define tcg_gen_clzi_tl tcg_gen_clzi_i64
1048 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i64
1049 #define tcg_gen_clrsb_tl tcg_gen_clrsb_i64
1050 #define tcg_gen_ctpop_tl tcg_gen_ctpop_i64
1051 #define tcg_gen_rotl_tl tcg_gen_rotl_i64
1052 #define tcg_gen_rotli_tl tcg_gen_rotli_i64
1053 #define tcg_gen_rotr_tl tcg_gen_rotr_i64
1054 #define tcg_gen_rotri_tl tcg_gen_rotri_i64
1055 #define tcg_gen_deposit_tl tcg_gen_deposit_i64
1056 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i64
1057 #define tcg_gen_extract_tl tcg_gen_extract_i64
1058 #define tcg_gen_sextract_tl tcg_gen_sextract_i64
1059 #define tcg_const_tl tcg_const_i64
1060 #define tcg_const_local_tl tcg_const_local_i64
1061 #define tcg_gen_movcond_tl tcg_gen_movcond_i64
1062 #define tcg_gen_add2_tl tcg_gen_add2_i64
1063 #define tcg_gen_sub2_tl tcg_gen_sub2_i64
1064 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i64
1065 #define tcg_gen_muls2_tl tcg_gen_muls2_i64
1066 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i64
1067 #define tcg_gen_smin_tl tcg_gen_smin_i64
1068 #define tcg_gen_umin_tl tcg_gen_umin_i64
1069 #define tcg_gen_smax_tl tcg_gen_smax_i64
1070 #define tcg_gen_umax_tl tcg_gen_umax_i64
1071 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i64
1072 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i64
1073 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i64
1074 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i64
1075 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i64
1076 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i64
1077 #define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i64
1078 #define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i64
1079 #define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i64
1080 #define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i64
1081 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i64
1082 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i64
1083 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i64
1084 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i64
1085 #define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i64
1086 #define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i64
1087 #define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i64
1088 #define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i64
1089 #define tcg_gen_dup_tl_vec  tcg_gen_dup_i64_vec
1090 #else
1091 #define tcg_gen_movi_tl tcg_gen_movi_i32
1092 #define tcg_gen_mov_tl tcg_gen_mov_i32
1093 #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32
1094 #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32
1095 #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32
1096 #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32
1097 #define tcg_gen_ld32u_tl tcg_gen_ld_i32
1098 #define tcg_gen_ld32s_tl tcg_gen_ld_i32
1099 #define tcg_gen_ld_tl tcg_gen_ld_i32
1100 #define tcg_gen_st8_tl tcg_gen_st8_i32
1101 #define tcg_gen_st16_tl tcg_gen_st16_i32
1102 #define tcg_gen_st32_tl tcg_gen_st_i32
1103 #define tcg_gen_st_tl tcg_gen_st_i32
1104 #define tcg_gen_add_tl tcg_gen_add_i32
1105 #define tcg_gen_addi_tl tcg_gen_addi_i32
1106 #define tcg_gen_sub_tl tcg_gen_sub_i32
1107 #define tcg_gen_neg_tl tcg_gen_neg_i32
1108 #define tcg_gen_subfi_tl tcg_gen_subfi_i32
1109 #define tcg_gen_subi_tl tcg_gen_subi_i32
1110 #define tcg_gen_and_tl tcg_gen_and_i32
1111 #define tcg_gen_andi_tl tcg_gen_andi_i32
1112 #define tcg_gen_or_tl tcg_gen_or_i32
1113 #define tcg_gen_ori_tl tcg_gen_ori_i32
1114 #define tcg_gen_xor_tl tcg_gen_xor_i32
1115 #define tcg_gen_xori_tl tcg_gen_xori_i32
1116 #define tcg_gen_not_tl tcg_gen_not_i32
1117 #define tcg_gen_shl_tl tcg_gen_shl_i32
1118 #define tcg_gen_shli_tl tcg_gen_shli_i32
1119 #define tcg_gen_shr_tl tcg_gen_shr_i32
1120 #define tcg_gen_shri_tl tcg_gen_shri_i32
1121 #define tcg_gen_sar_tl tcg_gen_sar_i32
1122 #define tcg_gen_sari_tl tcg_gen_sari_i32
1123 #define tcg_gen_brcond_tl tcg_gen_brcond_i32
1124 #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
1125 #define tcg_gen_setcond_tl tcg_gen_setcond_i32
1126 #define tcg_gen_setcondi_tl tcg_gen_setcondi_i32
1127 #define tcg_gen_mul_tl tcg_gen_mul_i32
1128 #define tcg_gen_muli_tl tcg_gen_muli_i32
1129 #define tcg_gen_div_tl tcg_gen_div_i32
1130 #define tcg_gen_rem_tl tcg_gen_rem_i32
1131 #define tcg_gen_divu_tl tcg_gen_divu_i32
1132 #define tcg_gen_remu_tl tcg_gen_remu_i32
1133 #define tcg_gen_discard_tl tcg_gen_discard_i32
1134 #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32
1135 #define tcg_gen_trunc_i64_tl tcg_gen_extrl_i64_i32
1136 #define tcg_gen_extu_i32_tl tcg_gen_mov_i32
1137 #define tcg_gen_ext_i32_tl tcg_gen_mov_i32
1138 #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64
1139 #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64
1140 #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32
1141 #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32
1142 #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32
1143 #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
1144 #define tcg_gen_ext32u_tl tcg_gen_mov_i32
1145 #define tcg_gen_ext32s_tl tcg_gen_mov_i32
1146 #define tcg_gen_bswap16_tl tcg_gen_bswap16_i32
1147 #define tcg_gen_bswap32_tl tcg_gen_bswap32_i32
1148 #define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
1149 #define tcg_gen_extr_i64_tl tcg_gen_extr_i64_i32
1150 #define tcg_gen_andc_tl tcg_gen_andc_i32
1151 #define tcg_gen_eqv_tl tcg_gen_eqv_i32
1152 #define tcg_gen_nand_tl tcg_gen_nand_i32
1153 #define tcg_gen_nor_tl tcg_gen_nor_i32
1154 #define tcg_gen_orc_tl tcg_gen_orc_i32
1155 #define tcg_gen_clz_tl tcg_gen_clz_i32
1156 #define tcg_gen_ctz_tl tcg_gen_ctz_i32
1157 #define tcg_gen_clzi_tl tcg_gen_clzi_i32
1158 #define tcg_gen_ctzi_tl tcg_gen_ctzi_i32
1159 #define tcg_gen_clrsb_tl tcg_gen_clrsb_i32
1160 #define tcg_gen_ctpop_tl tcg_gen_ctpop_i32
1161 #define tcg_gen_rotl_tl tcg_gen_rotl_i32
1162 #define tcg_gen_rotli_tl tcg_gen_rotli_i32
1163 #define tcg_gen_rotr_tl tcg_gen_rotr_i32
1164 #define tcg_gen_rotri_tl tcg_gen_rotri_i32
1165 #define tcg_gen_deposit_tl tcg_gen_deposit_i32
1166 #define tcg_gen_deposit_z_tl tcg_gen_deposit_z_i32
1167 #define tcg_gen_extract_tl tcg_gen_extract_i32
1168 #define tcg_gen_sextract_tl tcg_gen_sextract_i32
1169 #define tcg_const_tl tcg_const_i32
1170 #define tcg_const_local_tl tcg_const_local_i32
1171 #define tcg_gen_movcond_tl tcg_gen_movcond_i32
1172 #define tcg_gen_add2_tl tcg_gen_add2_i32
1173 #define tcg_gen_sub2_tl tcg_gen_sub2_i32
1174 #define tcg_gen_mulu2_tl tcg_gen_mulu2_i32
1175 #define tcg_gen_muls2_tl tcg_gen_muls2_i32
1176 #define tcg_gen_mulsu2_tl tcg_gen_mulsu2_i32
1177 #define tcg_gen_smin_tl tcg_gen_smin_i32
1178 #define tcg_gen_umin_tl tcg_gen_umin_i32
1179 #define tcg_gen_smax_tl tcg_gen_smax_i32
1180 #define tcg_gen_umax_tl tcg_gen_umax_i32
1181 #define tcg_gen_atomic_cmpxchg_tl tcg_gen_atomic_cmpxchg_i32
1182 #define tcg_gen_atomic_xchg_tl tcg_gen_atomic_xchg_i32
1183 #define tcg_gen_atomic_fetch_add_tl tcg_gen_atomic_fetch_add_i32
1184 #define tcg_gen_atomic_fetch_and_tl tcg_gen_atomic_fetch_and_i32
1185 #define tcg_gen_atomic_fetch_or_tl tcg_gen_atomic_fetch_or_i32
1186 #define tcg_gen_atomic_fetch_xor_tl tcg_gen_atomic_fetch_xor_i32
1187 #define tcg_gen_atomic_fetch_smin_tl tcg_gen_atomic_fetch_smin_i32
1188 #define tcg_gen_atomic_fetch_umin_tl tcg_gen_atomic_fetch_umin_i32
1189 #define tcg_gen_atomic_fetch_smax_tl tcg_gen_atomic_fetch_smax_i32
1190 #define tcg_gen_atomic_fetch_umax_tl tcg_gen_atomic_fetch_umax_i32
1191 #define tcg_gen_atomic_add_fetch_tl tcg_gen_atomic_add_fetch_i32
1192 #define tcg_gen_atomic_and_fetch_tl tcg_gen_atomic_and_fetch_i32
1193 #define tcg_gen_atomic_or_fetch_tl tcg_gen_atomic_or_fetch_i32
1194 #define tcg_gen_atomic_xor_fetch_tl tcg_gen_atomic_xor_fetch_i32
1195 #define tcg_gen_atomic_smin_fetch_tl tcg_gen_atomic_smin_fetch_i32
1196 #define tcg_gen_atomic_umin_fetch_tl tcg_gen_atomic_umin_fetch_i32
1197 #define tcg_gen_atomic_smax_fetch_tl tcg_gen_atomic_smax_fetch_i32
1198 #define tcg_gen_atomic_umax_fetch_tl tcg_gen_atomic_umax_fetch_i32
1199 #define tcg_gen_dup_tl_vec  tcg_gen_dup_i32_vec
1200 #endif
1201
1202 #if UINTPTR_MAX == UINT32_MAX
1203 # define PTR  i32
1204 # define NAT  TCGv_i32
1205 #else
1206 # define PTR  i64
1207 # define NAT  TCGv_i64
1208 #endif
1209
1210 static inline void tcg_gen_ld_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
1211 {
1212     glue(tcg_gen_ld_,PTR)((NAT)r, a, o);
1213 }
1214
1215 static inline void tcg_gen_discard_ptr(TCGv_ptr a)
1216 {
1217     glue(tcg_gen_discard_,PTR)((NAT)a);
1218 }
1219
1220 static inline void tcg_gen_add_ptr(TCGv_ptr r, TCGv_ptr a, TCGv_ptr b)
1221 {
1222     glue(tcg_gen_add_,PTR)((NAT)r, (NAT)a, (NAT)b);
1223 }
1224
1225 static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b)
1226 {
1227     glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b);
1228 }
1229
1230 static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a,
1231                                        intptr_t b, TCGLabel *label)
1232 {
1233     glue(tcg_gen_brcondi_,PTR)(cond, (NAT)a, b, label);
1234 }
1235
1236 static inline void tcg_gen_ext_i32_ptr(TCGv_ptr r, TCGv_i32 a)
1237 {
1238 #if UINTPTR_MAX == UINT32_MAX
1239     tcg_gen_mov_i32((NAT)r, a);
1240 #else
1241     tcg_gen_ext_i32_i64((NAT)r, a);
1242 #endif
1243 }
1244
1245 static inline void tcg_gen_trunc_i64_ptr(TCGv_ptr r, TCGv_i64 a)
1246 {
1247 #if UINTPTR_MAX == UINT32_MAX
1248     tcg_gen_extrl_i64_i32((NAT)r, a);
1249 #else
1250     tcg_gen_mov_i64((NAT)r, a);
1251 #endif
1252 }
1253
1254 static inline void tcg_gen_extu_ptr_i64(TCGv_i64 r, TCGv_ptr a)
1255 {
1256 #if UINTPTR_MAX == UINT32_MAX
1257     tcg_gen_extu_i32_i64(r, (NAT)a);
1258 #else
1259     tcg_gen_mov_i64(r, (NAT)a);
1260 #endif
1261 }
1262
1263 static inline void tcg_gen_trunc_ptr_i32(TCGv_i32 r, TCGv_ptr a)
1264 {
1265 #if UINTPTR_MAX == UINT32_MAX
1266     tcg_gen_mov_i32(r, (NAT)a);
1267 #else
1268     tcg_gen_extrl_i64_i32(r, (NAT)a);
1269 #endif
1270 }
1271
1272 #undef PTR
1273 #undef NAT
1274
1275 #endif /* TCG_TCG_OP_H */