qemu-options: Improve help texts for options which depend on configure
[qemu/ar7.git] / target-arm / op_helper.c
blob37b77e14e5ab523db033b5e13c43497bfb518578
1 /*
2 * ARM helper routines
4 * Copyright (c) 2005-2007 CodeSourcery, LLC
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
19 #include "cpu.h"
20 #include "dyngen-exec.h"
21 #include "helper.h"
23 #define SIGNBIT (uint32_t)0x80000000
24 #define SIGNBIT64 ((uint64_t)1 << 63)
26 #if !defined(CONFIG_USER_ONLY)
27 static void raise_exception(int tt)
29 env->exception_index = tt;
30 cpu_loop_exit(env);
32 #endif
34 uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def,
35 uint32_t rn, uint32_t maxindex)
37 uint32_t val;
38 uint32_t tmp;
39 int index;
40 int shift;
41 uint64_t *table;
42 table = (uint64_t *)&env->vfp.regs[rn];
43 val = 0;
44 for (shift = 0; shift < 32; shift += 8) {
45 index = (ireg >> shift) & 0xff;
46 if (index < maxindex) {
47 tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff;
48 val |= tmp << shift;
49 } else {
50 val |= def & (0xff << shift);
53 return val;
56 #if !defined(CONFIG_USER_ONLY)
58 #include "softmmu_exec.h"
60 #define MMUSUFFIX _mmu
62 #define SHIFT 0
63 #include "softmmu_template.h"
65 #define SHIFT 1
66 #include "softmmu_template.h"
68 #define SHIFT 2
69 #include "softmmu_template.h"
71 #define SHIFT 3
72 #include "softmmu_template.h"
74 /* try to fill the TLB and return an exception if error. If retaddr is
75 NULL, it means that the function was called in C code (i.e. not
76 from generated code or from helper.c) */
77 /* XXX: fix it to restore all registers */
78 void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr)
80 TranslationBlock *tb;
81 CPUState *saved_env;
82 unsigned long pc;
83 int ret;
85 /* XXX: hack to restore env in all cases, even if not called from
86 generated code */
87 saved_env = env;
88 env = cpu_single_env;
89 ret = cpu_arm_handle_mmu_fault(env, addr, is_write, mmu_idx);
90 if (unlikely(ret)) {
91 if (retaddr) {
92 /* now we have a real cpu fault */
93 pc = (unsigned long)retaddr;
94 tb = tb_find_pc(pc);
95 if (tb) {
96 /* the PC is inside the translated code. It means that we have
97 a virtual CPU fault */
98 cpu_restore_state(tb, env, pc);
101 raise_exception(env->exception_index);
103 env = saved_env;
105 #endif
107 /* FIXME: Pass an axplicit pointer to QF to CPUState, and move saturating
108 instructions into helper.c */
109 uint32_t HELPER(add_setq)(uint32_t a, uint32_t b)
111 uint32_t res = a + b;
112 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT))
113 env->QF = 1;
114 return res;
117 uint32_t HELPER(add_saturate)(uint32_t a, uint32_t b)
119 uint32_t res = a + b;
120 if (((res ^ a) & SIGNBIT) && !((a ^ b) & SIGNBIT)) {
121 env->QF = 1;
122 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
124 return res;
127 uint32_t HELPER(sub_saturate)(uint32_t a, uint32_t b)
129 uint32_t res = a - b;
130 if (((res ^ a) & SIGNBIT) && ((a ^ b) & SIGNBIT)) {
131 env->QF = 1;
132 res = ~(((int32_t)a >> 31) ^ SIGNBIT);
134 return res;
137 uint32_t HELPER(double_saturate)(int32_t val)
139 uint32_t res;
140 if (val >= 0x40000000) {
141 res = ~SIGNBIT;
142 env->QF = 1;
143 } else if (val <= (int32_t)0xc0000000) {
144 res = SIGNBIT;
145 env->QF = 1;
146 } else {
147 res = val << 1;
149 return res;
152 uint32_t HELPER(add_usaturate)(uint32_t a, uint32_t b)
154 uint32_t res = a + b;
155 if (res < a) {
156 env->QF = 1;
157 res = ~0;
159 return res;
162 uint32_t HELPER(sub_usaturate)(uint32_t a, uint32_t b)
164 uint32_t res = a - b;
165 if (res > a) {
166 env->QF = 1;
167 res = 0;
169 return res;
172 /* Signed saturation. */
173 static inline uint32_t do_ssat(int32_t val, int shift)
175 int32_t top;
176 uint32_t mask;
178 top = val >> shift;
179 mask = (1u << shift) - 1;
180 if (top > 0) {
181 env->QF = 1;
182 return mask;
183 } else if (top < -1) {
184 env->QF = 1;
185 return ~mask;
187 return val;
190 /* Unsigned saturation. */
191 static inline uint32_t do_usat(int32_t val, int shift)
193 uint32_t max;
195 max = (1u << shift) - 1;
196 if (val < 0) {
197 env->QF = 1;
198 return 0;
199 } else if (val > max) {
200 env->QF = 1;
201 return max;
203 return val;
206 /* Signed saturate. */
207 uint32_t HELPER(ssat)(uint32_t x, uint32_t shift)
209 return do_ssat(x, shift);
212 /* Dual halfword signed saturate. */
213 uint32_t HELPER(ssat16)(uint32_t x, uint32_t shift)
215 uint32_t res;
217 res = (uint16_t)do_ssat((int16_t)x, shift);
218 res |= do_ssat(((int32_t)x) >> 16, shift) << 16;
219 return res;
222 /* Unsigned saturate. */
223 uint32_t HELPER(usat)(uint32_t x, uint32_t shift)
225 return do_usat(x, shift);
228 /* Dual halfword unsigned saturate. */
229 uint32_t HELPER(usat16)(uint32_t x, uint32_t shift)
231 uint32_t res;
233 res = (uint16_t)do_usat((int16_t)x, shift);
234 res |= do_usat(((int32_t)x) >> 16, shift) << 16;
235 return res;
238 void HELPER(wfi)(void)
240 env->exception_index = EXCP_HLT;
241 env->halted = 1;
242 cpu_loop_exit(env);
245 void HELPER(exception)(uint32_t excp)
247 env->exception_index = excp;
248 cpu_loop_exit(env);
251 uint32_t HELPER(cpsr_read)(void)
253 return cpsr_read(env) & ~CPSR_EXEC;
256 void HELPER(cpsr_write)(uint32_t val, uint32_t mask)
258 cpsr_write(env, val, mask);
261 /* Access to user mode registers from privileged modes. */
262 uint32_t HELPER(get_user_reg)(uint32_t regno)
264 uint32_t val;
266 if (regno == 13) {
267 val = env->banked_r13[0];
268 } else if (regno == 14) {
269 val = env->banked_r14[0];
270 } else if (regno >= 8
271 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
272 val = env->usr_regs[regno - 8];
273 } else {
274 val = env->regs[regno];
276 return val;
279 void HELPER(set_user_reg)(uint32_t regno, uint32_t val)
281 if (regno == 13) {
282 env->banked_r13[0] = val;
283 } else if (regno == 14) {
284 env->banked_r14[0] = val;
285 } else if (regno >= 8
286 && (env->uncached_cpsr & 0x1f) == ARM_CPU_MODE_FIQ) {
287 env->usr_regs[regno - 8] = val;
288 } else {
289 env->regs[regno] = val;
293 /* ??? Flag setting arithmetic is awkward because we need to do comparisons.
294 The only way to do that in TCG is a conditional branch, which clobbers
295 all our temporaries. For now implement these as helper functions. */
297 uint32_t HELPER (add_cc)(uint32_t a, uint32_t b)
299 uint32_t result;
300 result = a + b;
301 env->NF = env->ZF = result;
302 env->CF = result < a;
303 env->VF = (a ^ b ^ -1) & (a ^ result);
304 return result;
307 uint32_t HELPER(adc_cc)(uint32_t a, uint32_t b)
309 uint32_t result;
310 if (!env->CF) {
311 result = a + b;
312 env->CF = result < a;
313 } else {
314 result = a + b + 1;
315 env->CF = result <= a;
317 env->VF = (a ^ b ^ -1) & (a ^ result);
318 env->NF = env->ZF = result;
319 return result;
322 uint32_t HELPER(sub_cc)(uint32_t a, uint32_t b)
324 uint32_t result;
325 result = a - b;
326 env->NF = env->ZF = result;
327 env->CF = a >= b;
328 env->VF = (a ^ b) & (a ^ result);
329 return result;
332 uint32_t HELPER(sbc_cc)(uint32_t a, uint32_t b)
334 uint32_t result;
335 if (!env->CF) {
336 result = a - b - 1;
337 env->CF = a > b;
338 } else {
339 result = a - b;
340 env->CF = a >= b;
342 env->VF = (a ^ b) & (a ^ result);
343 env->NF = env->ZF = result;
344 return result;
347 /* Similarly for variable shift instructions. */
349 uint32_t HELPER(shl)(uint32_t x, uint32_t i)
351 int shift = i & 0xff;
352 if (shift >= 32)
353 return 0;
354 return x << shift;
357 uint32_t HELPER(shr)(uint32_t x, uint32_t i)
359 int shift = i & 0xff;
360 if (shift >= 32)
361 return 0;
362 return (uint32_t)x >> shift;
365 uint32_t HELPER(sar)(uint32_t x, uint32_t i)
367 int shift = i & 0xff;
368 if (shift >= 32)
369 shift = 31;
370 return (int32_t)x >> shift;
373 uint32_t HELPER(shl_cc)(uint32_t x, uint32_t i)
375 int shift = i & 0xff;
376 if (shift >= 32) {
377 if (shift == 32)
378 env->CF = x & 1;
379 else
380 env->CF = 0;
381 return 0;
382 } else if (shift != 0) {
383 env->CF = (x >> (32 - shift)) & 1;
384 return x << shift;
386 return x;
389 uint32_t HELPER(shr_cc)(uint32_t x, uint32_t i)
391 int shift = i & 0xff;
392 if (shift >= 32) {
393 if (shift == 32)
394 env->CF = (x >> 31) & 1;
395 else
396 env->CF = 0;
397 return 0;
398 } else if (shift != 0) {
399 env->CF = (x >> (shift - 1)) & 1;
400 return x >> shift;
402 return x;
405 uint32_t HELPER(sar_cc)(uint32_t x, uint32_t i)
407 int shift = i & 0xff;
408 if (shift >= 32) {
409 env->CF = (x >> 31) & 1;
410 return (int32_t)x >> 31;
411 } else if (shift != 0) {
412 env->CF = (x >> (shift - 1)) & 1;
413 return (int32_t)x >> shift;
415 return x;
418 uint32_t HELPER(ror_cc)(uint32_t x, uint32_t i)
420 int shift1, shift;
421 shift1 = i & 0xff;
422 shift = shift1 & 0x1f;
423 if (shift == 0) {
424 if (shift1 != 0)
425 env->CF = (x >> 31) & 1;
426 return x;
427 } else {
428 env->CF = (x >> (shift - 1)) & 1;
429 return ((uint32_t)x >> shift) | (x << (32 - shift));