target-i386: Remove xlevel & hv-spinlocks option fixups
[qemu/ar7.git] / target-moxie / cpu.h
blobc10898eba7a4355de3bddd80e4f4c5dc81baab20
1 /*
2 * Moxie emulation
4 * Copyright (c) 2008, 2010, 2013 Anthony Green
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 #ifndef _CPU_MOXIE_H
20 #define _CPU_MOXIE_H
22 #include "qemu-common.h"
24 #define TARGET_LONG_BITS 32
26 #define CPUArchState struct CPUMoxieState
28 #define MOXIE_EX_DIV0 0
29 #define MOXIE_EX_BAD 1
30 #define MOXIE_EX_IRQ 2
31 #define MOXIE_EX_SWI 3
32 #define MOXIE_EX_MMU_MISS 4
33 #define MOXIE_EX_BREAK 16
35 #include "exec/cpu-defs.h"
36 #include "fpu/softfloat.h"
38 #define TARGET_PAGE_BITS 12 /* 4k */
40 #define TARGET_PHYS_ADDR_SPACE_BITS 32
41 #define TARGET_VIRT_ADDR_SPACE_BITS 32
43 #define NB_MMU_MODES 1
45 typedef struct CPUMoxieState {
47 uint32_t flags; /* general execution flags */
48 uint32_t gregs[16]; /* general registers */
49 uint32_t sregs[256]; /* special registers */
50 uint32_t pc; /* program counter */
51 /* Instead of saving the cc value, we save the cmp arguments
52 and compute cc on demand. */
53 uint32_t cc_a; /* reg a for condition code calculation */
54 uint32_t cc_b; /* reg b for condition code calculation */
56 void *irq[8];
58 CPU_COMMON
60 } CPUMoxieState;
62 #include "qom/cpu.h"
64 #define TYPE_MOXIE_CPU "moxie-cpu"
66 #define MOXIE_CPU_CLASS(klass) \
67 OBJECT_CLASS_CHECK(MoxieCPUClass, (klass), TYPE_MOXIE_CPU)
68 #define MOXIE_CPU(obj) \
69 OBJECT_CHECK(MoxieCPU, (obj), TYPE_MOXIE_CPU)
70 #define MOXIE_CPU_GET_CLASS(obj) \
71 OBJECT_GET_CLASS(MoxieCPUClass, (obj), TYPE_MOXIE_CPU)
73 /**
74 * MoxieCPUClass:
75 * @parent_reset: The parent class' reset handler.
77 * A Moxie CPU model.
79 typedef struct MoxieCPUClass {
80 /*< private >*/
81 CPUClass parent_class;
82 /*< public >*/
84 DeviceRealize parent_realize;
85 void (*parent_reset)(CPUState *cpu);
86 } MoxieCPUClass;
88 /**
89 * MoxieCPU:
90 * @env: #CPUMoxieState
92 * A Moxie CPU.
94 typedef struct MoxieCPU {
95 /*< private >*/
96 CPUState parent_obj;
97 /*< public >*/
99 CPUMoxieState env;
100 } MoxieCPU;
102 static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState *env)
104 return container_of(env, MoxieCPU, env);
107 #define ENV_GET_CPU(e) CPU(moxie_env_get_cpu(e))
109 #define ENV_OFFSET offsetof(MoxieCPU, env)
111 MoxieCPU *cpu_moxie_init(const char *cpu_model);
112 int cpu_moxie_exec(CPUState *cpu);
113 void moxie_cpu_do_interrupt(CPUState *cs);
114 void moxie_cpu_dump_state(CPUState *cpu, FILE *f,
115 fprintf_function cpu_fprintf, int flags);
116 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
117 void moxie_translate_init(void);
118 int cpu_moxie_signal_handler(int host_signum, void *pinfo,
119 void *puc);
121 #define cpu_init(cpu_model) CPU(cpu_moxie_init(cpu_model))
123 #define cpu_exec cpu_moxie_exec
124 #define cpu_signal_handler cpu_moxie_signal_handler
126 static inline int cpu_mmu_index(CPUMoxieState *env, bool ifetch)
128 return 0;
131 #include "exec/cpu-all.h"
133 static inline void cpu_get_tb_cpu_state(CPUMoxieState *env, target_ulong *pc,
134 target_ulong *cs_base, uint32_t *flags)
136 *pc = env->pc;
137 *cs_base = 0;
138 *flags = 0;
141 int moxie_cpu_handle_mmu_fault(CPUState *cpu, vaddr address,
142 int rw, int mmu_idx);
144 #endif /* _CPU_MOXIE_H */