hw/grackle_pci.c

   1 /*
   2  * QEMU Grackle PCI host (heathrow OldWorld PowerMac)
   3  *
   4  * Copyright (c) 2006-2007 Fabrice Bellard
   5  * Copyright (c) 2007 Jocelyn Mayer
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a copy
   8  * of this software and associated documentation files (the "Software"), to deal
   9  * in the Software without restriction, including without limitation the rights
  10  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11  * copies of the Software, and to permit persons to whom the Software is
  12  * furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice shall be included in
  15  * all copies or substantial portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23  * THE SOFTWARE.
  24  */
  25
  26 #include "pci/pci_host.h"
  27 #include "ppc/mac.h"
  28 #include "pci/pci.h"
  29
  30 /* debug Grackle */
  31 //#define DEBUG_GRACKLE
  32
  33 #ifdef DEBUG_GRACKLE
  34 #define GRACKLE_DPRINTF(fmt, ...)                               \
  35     do { printf("GRACKLE: " fmt , ## __VA_ARGS__); } while (0)
  36 #else
  37 #define GRACKLE_DPRINTF(fmt, ...)
  38 #endif
  39
  40 #define GRACKLE_PCI_HOST_BRIDGE(obj) \
  41     OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE)
  42
  43 typedef struct GrackleState {
  44     PCIHostState parent_obj;
  45
  46     MemoryRegion pci_mmio;
  47     MemoryRegion pci_hole;
  48 } GrackleState;
  49
  50 /* Don't know if this matches real hardware, but it agrees with OHW.  */
  51 static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
  52 {
  53     return (irq_num + (pci_dev->devfn >> 3)) & 3;
  54 }
  55
  56 static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
  57 {
  58     qemu_irq *pic = opaque;
  59
  60     GRACKLE_DPRINTF("set_irq num %d level %d\n", irq_num, level);
  61     qemu_set_irq(pic[irq_num + 0x15], level);
  62 }
  63
  64 PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic,
  65                          MemoryRegion *address_space_mem,
  66                          MemoryRegion *address_space_io)
  67 {
  68     DeviceState *dev;
  69     SysBusDevice *s;
  70     PCIHostState *phb;
  71     GrackleState *d;
  72
  73     dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
  74     qdev_init_nofail(dev);
  75     s = SYS_BUS_DEVICE(dev);
  76     phb = PCI_HOST_BRIDGE(dev);
  77     d = GRACKLE_PCI_HOST_BRIDGE(dev);
  78
  79     memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
  80     memory_region_init_alias(&d->pci_hole, "pci-hole", &d->pci_mmio,
  81                              0x80000000ULL, 0x7e000000ULL);
  82     memory_region_add_subregion(address_space_mem, 0x80000000ULL,
  83                                 &d->pci_hole);
  84
  85     phb->bus = pci_register_bus(dev, "pci",
  86                                 pci_grackle_set_irq,
  87                                 pci_grackle_map_irq,
  88                                 pic,
  89                                 &d->pci_mmio,
  90                                 address_space_io,
  91                                 0, 4);
  92
  93     pci_create_simple(phb->bus, 0, "grackle");
  94
  95     sysbus_mmio_map(s, 0, base);
  96     sysbus_mmio_map(s, 1, base + 0x00200000);
  97
  98     return phb->bus;
  99 }
 100
 101 static int pci_grackle_init_device(SysBusDevice *dev)
 102 {
 103     PCIHostState *phb;
 104
 105     phb = PCI_HOST_BRIDGE(dev);
 106
 107     memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops,
 108                           dev, "pci-conf-idx", 0x1000);
 109     memory_region_init_io(&phb->data_mem, &pci_host_data_le_ops,
 110                           dev, "pci-data-idx", 0x1000);
 111     sysbus_init_mmio(dev, &phb->conf_mem);
 112     sysbus_init_mmio(dev, &phb->data_mem);
 113
 114     return 0;
 115 }
 116
 117 static int grackle_pci_host_init(PCIDevice *d)
 118 {
 119     d->config[0x09] = 0x01;
 120     return 0;
 121 }
 122
 123 static void grackle_pci_class_init(ObjectClass *klass, void *data)
 124 {
 125     PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 126     DeviceClass *dc = DEVICE_CLASS(klass);
 127
 128     k->init      = grackle_pci_host_init;
 129     k->vendor_id = PCI_VENDOR_ID_MOTOROLA;
 130     k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106;
 131     k->revision  = 0x00;
 132     k->class_id  = PCI_CLASS_BRIDGE_HOST;
 133     dc->no_user = 1;
 134 }
 135
 136 static const TypeInfo grackle_pci_info = {
 137     .name          = "grackle",
 138     .parent        = TYPE_PCI_DEVICE,
 139     .instance_size = sizeof(PCIDevice),
 140     .class_init = grackle_pci_class_init,
 141 };
 142
 143 static void pci_grackle_class_init(ObjectClass *klass, void *data)
 144 {
 145     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
 146     DeviceClass *dc = DEVICE_CLASS(klass);
 147
 148     k->init = pci_grackle_init_device;
 149     dc->no_user = 1;
 150 }
 151
 152 static const TypeInfo grackle_pci_host_info = {
 153     .name          = TYPE_GRACKLE_PCI_HOST_BRIDGE,
 154     .parent        = TYPE_PCI_HOST_BRIDGE,
 155     .instance_size = sizeof(GrackleState),
 156     .class_init    = pci_grackle_class_init,
 157 };
 158
 159 static void grackle_register_types(void)
 160 {
 161     type_register_static(&grackle_pci_info);
 162     type_register_static(&grackle_pci_host_info);
 163 }
 164
 165 type_init(grackle_register_types)