target-i386/machine.c

   1 #include "hw/hw.h"
   2 #include "hw/boards.h"
   3 #include "hw/pc.h"
   4 #include "hw/isa.h"
   5
   6 #include "cpu.h"
   7 #include "kvm.h"
   8
   9 static const VMStateDescription vmstate_segment = {
  10     .name = "segment",
  11     .version_id = 1,
  12     .minimum_version_id = 1,
  13     .minimum_version_id_old = 1,
  14     .fields      = (VMStateField []) {
  15         VMSTATE_UINT32(selector, SegmentCache),
  16         VMSTATE_UINTTL(base, SegmentCache),
  17         VMSTATE_UINT32(limit, SegmentCache),
  18         VMSTATE_UINT32(flags, SegmentCache),
  19         VMSTATE_END_OF_LIST()
  20     }
  21 };
  22
  23 #define VMSTATE_SEGMENT(_field, _state) {                            \
  24     .name       = (stringify(_field)),                               \
  25     .size       = sizeof(SegmentCache),                              \
  26     .vmsd       = &vmstate_segment,                                  \
  27     .flags      = VMS_STRUCT,                                        \
  28     .offset     = offsetof(_state, _field)                           \
  29             + type_check(SegmentCache,typeof_field(_state, _field))  \
  30 }
  31
  32 #define VMSTATE_SEGMENT_ARRAY(_field, _state, _n)                    \
  33     VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_segment, SegmentCache)
  34
  35 static const VMStateDescription vmstate_xmm_reg = {
  36     .name = "xmm_reg",
  37     .version_id = 1,
  38     .minimum_version_id = 1,
  39     .minimum_version_id_old = 1,
  40     .fields      = (VMStateField []) {
  41         VMSTATE_UINT64(XMM_Q(0), XMMReg),
  42         VMSTATE_UINT64(XMM_Q(1), XMMReg),
  43         VMSTATE_END_OF_LIST()
  44     }
  45 };
  46
  47 #define VMSTATE_XMM_REGS(_field, _state, _n)                         \
  48     VMSTATE_STRUCT_ARRAY(_field, _state, _n, 0, vmstate_xmm_reg, XMMReg)
  49
  50 /* YMMH format is the same as XMM */
  51 static const VMStateDescription vmstate_ymmh_reg = {
  52     .name = "ymmh_reg",
  53     .version_id = 1,
  54     .minimum_version_id = 1,
  55     .minimum_version_id_old = 1,
  56     .fields      = (VMStateField []) {
  57         VMSTATE_UINT64(XMM_Q(0), XMMReg),
  58         VMSTATE_UINT64(XMM_Q(1), XMMReg),
  59         VMSTATE_END_OF_LIST()
  60     }
  61 };
  62
  63 #define VMSTATE_YMMH_REGS_VARS(_field, _state, _n, _v)                         \
  64     VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_ymmh_reg, XMMReg)
  65
  66 static const VMStateDescription vmstate_mtrr_var = {
  67     .name = "mtrr_var",
  68     .version_id = 1,
  69     .minimum_version_id = 1,
  70     .minimum_version_id_old = 1,
  71     .fields      = (VMStateField []) {
  72         VMSTATE_UINT64(base, MTRRVar),
  73         VMSTATE_UINT64(mask, MTRRVar),
  74         VMSTATE_END_OF_LIST()
  75     }
  76 };
  77
  78 #define VMSTATE_MTRR_VARS(_field, _state, _n, _v)                    \
  79     VMSTATE_STRUCT_ARRAY(_field, _state, _n, _v, vmstate_mtrr_var, MTRRVar)
  80
  81 static void put_fpreg_error(QEMUFile *f, void *opaque, size_t size)
  82 {
  83     fprintf(stderr, "call put_fpreg() with invalid arguments\n");
  84     exit(0);
  85 }
  86
  87 /* XXX: add that in a FPU generic layer */
  88 union x86_longdouble {
  89     uint64_t mant;
  90     uint16_t exp;
  91 };
  92
  93 #define MANTD1(fp)      (fp & ((1LL << 52) - 1))
  94 #define EXPBIAS1 1023
  95 #define EXPD1(fp)       ((fp >> 52) & 0x7FF)
  96 #define SIGND1(fp)      ((fp >> 32) & 0x80000000)
  97
  98 static void fp64_to_fp80(union x86_longdouble *p, uint64_t temp)
  99 {
 100     int e;
 101     /* mantissa */
 102     p->mant = (MANTD1(temp) << 11) | (1LL << 63);
 103     /* exponent + sign */
 104     e = EXPD1(temp) - EXPBIAS1 + 16383;
 105     e |= SIGND1(temp) >> 16;
 106     p->exp = e;
 107 }
 108
 109 static int get_fpreg(QEMUFile *f, void *opaque, size_t size)
 110 {
 111     FPReg *fp_reg = opaque;
 112     uint64_t mant;
 113     uint16_t exp;
 114
 115     qemu_get_be64s(f, &mant);
 116     qemu_get_be16s(f, &exp);
 117     fp_reg->d = cpu_set_fp80(mant, exp);
 118     return 0;
 119 }
 120
 121 static void put_fpreg(QEMUFile *f, void *opaque, size_t size)
 122 {
 123     FPReg *fp_reg = opaque;
 124     uint64_t mant;
 125     uint16_t exp;
 126     /* we save the real CPU data (in case of MMX usage only 'mant'
 127        contains the MMX register */
 128     cpu_get_fp80(&mant, &exp, fp_reg->d);
 129     qemu_put_be64s(f, &mant);
 130     qemu_put_be16s(f, &exp);
 131 }
 132
 133 static const VMStateInfo vmstate_fpreg = {
 134     .name = "fpreg",
 135     .get  = get_fpreg,
 136     .put  = put_fpreg,
 137 };
 138
 139 static int get_fpreg_1_mmx(QEMUFile *f, void *opaque, size_t size)
 140 {
 141     union x86_longdouble *p = opaque;
 142     uint64_t mant;
 143
 144     qemu_get_be64s(f, &mant);
 145     p->mant = mant;
 146     p->exp = 0xffff;
 147     return 0;
 148 }
 149
 150 static const VMStateInfo vmstate_fpreg_1_mmx = {
 151     .name = "fpreg_1_mmx",
 152     .get  = get_fpreg_1_mmx,
 153     .put  = put_fpreg_error,
 154 };
 155
 156 static int get_fpreg_1_no_mmx(QEMUFile *f, void *opaque, size_t size)
 157 {
 158     union x86_longdouble *p = opaque;
 159     uint64_t mant;
 160
 161     qemu_get_be64s(f, &mant);
 162     fp64_to_fp80(p, mant);
 163     return 0;
 164 }
 165
 166 static const VMStateInfo vmstate_fpreg_1_no_mmx = {
 167     .name = "fpreg_1_no_mmx",
 168     .get  = get_fpreg_1_no_mmx,
 169     .put  = put_fpreg_error,
 170 };
 171
 172 static bool fpregs_is_0(void *opaque, int version_id)
 173 {
 174     CPUState *env = opaque;
 175
 176     return (env->fpregs_format_vmstate == 0);
 177 }
 178
 179 static bool fpregs_is_1_mmx(void *opaque, int version_id)
 180 {
 181     CPUState *env = opaque;
 182     int guess_mmx;
 183
 184     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 185                  (env->fpus_vmstate & 0x3800) == 0);
 186     return (guess_mmx && (env->fpregs_format_vmstate == 1));
 187 }
 188
 189 static bool fpregs_is_1_no_mmx(void *opaque, int version_id)
 190 {
 191     CPUState *env = opaque;
 192     int guess_mmx;
 193
 194     guess_mmx = ((env->fptag_vmstate == 0xff) &&
 195                  (env->fpus_vmstate & 0x3800) == 0);
 196     return (!guess_mmx && (env->fpregs_format_vmstate == 1));
 197 }
 198
 199 #define VMSTATE_FP_REGS(_field, _state, _n)                               \
 200     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_0, vmstate_fpreg, FPReg), \
 201     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_mmx, vmstate_fpreg_1_mmx, FPReg), \
 202     VMSTATE_ARRAY_TEST(_field, _state, _n, fpregs_is_1_no_mmx, vmstate_fpreg_1_no_mmx, FPReg)
 203
 204 static bool version_is_5(void *opaque, int version_id)
 205 {
 206     return version_id == 5;
 207 }
 208
 209 #ifdef TARGET_X86_64
 210 static bool less_than_7(void *opaque, int version_id)
 211 {
 212     return version_id < 7;
 213 }
 214
 215 static int get_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
 216 {
 217     uint64_t *v = pv;
 218     *v = qemu_get_be32(f);
 219     return 0;
 220 }
 221
 222 static void put_uint64_as_uint32(QEMUFile *f, void *pv, size_t size)
 223 {
 224     uint64_t *v = pv;
 225     qemu_put_be32(f, *v);
 226 }
 227
 228 static const VMStateInfo vmstate_hack_uint64_as_uint32 = {
 229     .name = "uint64_as_uint32",
 230     .get  = get_uint64_as_uint32,
 231     .put  = put_uint64_as_uint32,
 232 };
 233
 234 #define VMSTATE_HACK_UINT32(_f, _s, _t)                                  \
 235     VMSTATE_SINGLE_TEST(_f, _s, _t, 0, vmstate_hack_uint64_as_uint32, uint64_t)
 236 #endif
 237
 238 static void cpu_pre_save(void *opaque)
 239 {
 240     CPUState *env = opaque;
 241     int i;
 242
 243     /* FPU */
 244     env->fpus_vmstate = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
 245     env->fptag_vmstate = 0;
 246     for(i = 0; i < 8; i++) {
 247         env->fptag_vmstate |= ((!env->fptags[i]) << i);
 248     }
 249
 250     env->fpregs_format_vmstate = 0;
 251 }
 252
 253 static int cpu_post_load(void *opaque, int version_id)
 254 {
 255     CPUState *env = opaque;
 256     int i;
 257
 258     /* XXX: restore FPU round state */
 259     env->fpstt = (env->fpus_vmstate >> 11) & 7;
 260     env->fpus = env->fpus_vmstate & ~0x3800;
 261     env->fptag_vmstate ^= 0xff;
 262     for(i = 0; i < 8; i++) {
 263         env->fptags[i] = (env->fptag_vmstate >> i) & 1;
 264     }
 265
 266     cpu_breakpoint_remove_all(env, BP_CPU);
 267     cpu_watchpoint_remove_all(env, BP_CPU);
 268     for (i = 0; i < 4; i++)
 269         hw_breakpoint_insert(env, i);
 270
 271     tlb_flush(env, 1);
 272     return 0;
 273 }
 274
 275 static bool async_pf_msr_needed(void *opaque)
 276 {
 277     CPUState *cpu = opaque;
 278
 279     return cpu->async_pf_en_msr != 0;
 280 }
 281
 282 static const VMStateDescription vmstate_async_pf_msr = {
 283     .name = "cpu/async_pf_msr",
 284     .version_id = 1,
 285     .minimum_version_id = 1,
 286     .minimum_version_id_old = 1,
 287     .fields      = (VMStateField []) {
 288         VMSTATE_UINT64(async_pf_en_msr, CPUState),
 289         VMSTATE_END_OF_LIST()
 290     }
 291 };
 292
 293 static bool fpop_ip_dp_needed(void *opaque)
 294 {
 295     CPUState *env = opaque;
 296
 297     return env->fpop != 0 || env->fpip != 0 || env->fpdp != 0;
 298 }
 299
 300 static const VMStateDescription vmstate_fpop_ip_dp = {
 301     .name = "cpu/fpop_ip_dp",
 302     .version_id = 1,
 303     .minimum_version_id = 1,
 304     .minimum_version_id_old = 1,
 305     .fields      = (VMStateField []) {
 306         VMSTATE_UINT16(fpop, CPUState),
 307         VMSTATE_UINT64(fpip, CPUState),
 308         VMSTATE_UINT64(fpdp, CPUState),
 309         VMSTATE_END_OF_LIST()
 310     }
 311 };
 312
 313 static const VMStateDescription vmstate_cpu = {
 314     .name = "cpu",
 315     .version_id = CPU_SAVE_VERSION,
 316     .minimum_version_id = 3,
 317     .minimum_version_id_old = 3,
 318     .pre_save = cpu_pre_save,
 319     .post_load = cpu_post_load,
 320     .fields      = (VMStateField []) {
 321         VMSTATE_UINTTL_ARRAY(regs, CPUState, CPU_NB_REGS),
 322         VMSTATE_UINTTL(eip, CPUState),
 323         VMSTATE_UINTTL(eflags, CPUState),
 324         VMSTATE_UINT32(hflags, CPUState),
 325         /* FPU */
 326         VMSTATE_UINT16(fpuc, CPUState),
 327         VMSTATE_UINT16(fpus_vmstate, CPUState),
 328         VMSTATE_UINT16(fptag_vmstate, CPUState),
 329         VMSTATE_UINT16(fpregs_format_vmstate, CPUState),
 330         VMSTATE_FP_REGS(fpregs, CPUState, 8),
 331
 332         VMSTATE_SEGMENT_ARRAY(segs, CPUState, 6),
 333         VMSTATE_SEGMENT(ldt, CPUState),
 334         VMSTATE_SEGMENT(tr, CPUState),
 335         VMSTATE_SEGMENT(gdt, CPUState),
 336         VMSTATE_SEGMENT(idt, CPUState),
 337
 338         VMSTATE_UINT32(sysenter_cs, CPUState),
 339 #ifdef TARGET_X86_64
 340         /* Hack: In v7 size changed from 32 to 64 bits on x86_64 */
 341         VMSTATE_HACK_UINT32(sysenter_esp, CPUState, less_than_7),
 342         VMSTATE_HACK_UINT32(sysenter_eip, CPUState, less_than_7),
 343         VMSTATE_UINTTL_V(sysenter_esp, CPUState, 7),
 344         VMSTATE_UINTTL_V(sysenter_eip, CPUState, 7),
 345 #else
 346         VMSTATE_UINTTL(sysenter_esp, CPUState),
 347         VMSTATE_UINTTL(sysenter_eip, CPUState),
 348 #endif
 349
 350         VMSTATE_UINTTL(cr[0], CPUState),
 351         VMSTATE_UINTTL(cr[2], CPUState),
 352         VMSTATE_UINTTL(cr[3], CPUState),
 353         VMSTATE_UINTTL(cr[4], CPUState),
 354         VMSTATE_UINTTL_ARRAY(dr, CPUState, 8),
 355         /* MMU */
 356         VMSTATE_INT32(a20_mask, CPUState),
 357         /* XMM */
 358         VMSTATE_UINT32(mxcsr, CPUState),
 359         VMSTATE_XMM_REGS(xmm_regs, CPUState, CPU_NB_REGS),
 360
 361 #ifdef TARGET_X86_64
 362         VMSTATE_UINT64(efer, CPUState),
 363         VMSTATE_UINT64(star, CPUState),
 364         VMSTATE_UINT64(lstar, CPUState),
 365         VMSTATE_UINT64(cstar, CPUState),
 366         VMSTATE_UINT64(fmask, CPUState),
 367         VMSTATE_UINT64(kernelgsbase, CPUState),
 368 #endif
 369         VMSTATE_UINT32_V(smbase, CPUState, 4),
 370
 371         VMSTATE_UINT64_V(pat, CPUState, 5),
 372         VMSTATE_UINT32_V(hflags2, CPUState, 5),
 373
 374         VMSTATE_UINT32_TEST(halted, CPUState, version_is_5),
 375         VMSTATE_UINT64_V(vm_hsave, CPUState, 5),
 376         VMSTATE_UINT64_V(vm_vmcb, CPUState, 5),
 377         VMSTATE_UINT64_V(tsc_offset, CPUState, 5),
 378         VMSTATE_UINT64_V(intercept, CPUState, 5),
 379         VMSTATE_UINT16_V(intercept_cr_read, CPUState, 5),
 380         VMSTATE_UINT16_V(intercept_cr_write, CPUState, 5),
 381         VMSTATE_UINT16_V(intercept_dr_read, CPUState, 5),
 382         VMSTATE_UINT16_V(intercept_dr_write, CPUState, 5),
 383         VMSTATE_UINT32_V(intercept_exceptions, CPUState, 5),
 384         VMSTATE_UINT8_V(v_tpr, CPUState, 5),
 385         /* MTRRs */
 386         VMSTATE_UINT64_ARRAY_V(mtrr_fixed, CPUState, 11, 8),
 387         VMSTATE_UINT64_V(mtrr_deftype, CPUState, 8),
 388         VMSTATE_MTRR_VARS(mtrr_var, CPUState, 8, 8),
 389         /* KVM-related states */
 390         VMSTATE_INT32_V(interrupt_injected, CPUState, 9),
 391         VMSTATE_UINT32_V(mp_state, CPUState, 9),
 392         VMSTATE_UINT64_V(tsc, CPUState, 9),
 393         VMSTATE_INT32_V(exception_injected, CPUState, 11),
 394         VMSTATE_UINT8_V(soft_interrupt, CPUState, 11),
 395         VMSTATE_UINT8_V(nmi_injected, CPUState, 11),
 396         VMSTATE_UINT8_V(nmi_pending, CPUState, 11),
 397         VMSTATE_UINT8_V(has_error_code, CPUState, 11),
 398         VMSTATE_UINT32_V(sipi_vector, CPUState, 11),
 399         /* MCE */
 400         VMSTATE_UINT64_V(mcg_cap, CPUState, 10),
 401         VMSTATE_UINT64_V(mcg_status, CPUState, 10),
 402         VMSTATE_UINT64_V(mcg_ctl, CPUState, 10),
 403         VMSTATE_UINT64_ARRAY_V(mce_banks, CPUState, MCE_BANKS_DEF *4, 10),
 404         /* rdtscp */
 405         VMSTATE_UINT64_V(tsc_aux, CPUState, 11),
 406         /* KVM pvclock msr */
 407         VMSTATE_UINT64_V(system_time_msr, CPUState, 11),
 408         VMSTATE_UINT64_V(wall_clock_msr, CPUState, 11),
 409         /* XSAVE related fields */
 410         VMSTATE_UINT64_V(xcr0, CPUState, 12),
 411         VMSTATE_UINT64_V(xstate_bv, CPUState, 12),
 412         VMSTATE_YMMH_REGS_VARS(ymmh_regs, CPUState, CPU_NB_REGS, 12),
 413         VMSTATE_UINT64_V(tsc_deadline, CPUState, 13),
 414         VMSTATE_END_OF_LIST()
 415         /* The above list is not sorted /wrt version numbers, watch out! */
 416     },
 417     .subsections = (VMStateSubsection []) {
 418         {
 419             .vmsd = &vmstate_async_pf_msr,
 420             .needed = async_pf_msr_needed,
 421         } , {
 422             .vmsd = &vmstate_fpop_ip_dp,
 423             .needed = fpop_ip_dp_needed,
 424         } , {
 425             /* empty */
 426         }
 427     }
 428 };
 429
 430 void cpu_save(QEMUFile *f, void *opaque)
 431 {
 432     vmstate_save_state(f, &vmstate_cpu, opaque);
 433 }
 434
 435 int cpu_load(QEMUFile *f, void *opaque, int version_id)
 436 {
 437     return vmstate_load_state(f, &vmstate_cpu, opaque, version_id);
 438 }