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HEAD
target/i386: Use X86Seg enum for segment registers
[qemu/ar7.git]
/
tests
/
tcg
/
lm32
/
test_bne.S
blob
871a006755cb0d7f1478af067dd22aa2b1dfc48e
1
.include "macros.inc"
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start
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test_name BNE_1
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mvi r1, 0
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mvi r2, 0
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bne r1, r2, 1f
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tc_pass
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bi 2f
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1:
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tc_fail
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2:
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test_name BNE_2
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mvi r1, 1
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mvi r2, 0
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bne r1, r2, 1f
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tc_fail
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bi 2f
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1:
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tc_pass
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2:
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test_name BNE_3
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mvi r1, 0
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mvi r2, 1
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bne r1, r2, 1f
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tc_fail
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bi 2f
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1:
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tc_pass
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2:
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bi 2f
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1:
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tc_fail
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bi 3f
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2:
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test_name BNE_4
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mvi r1, 1
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mvi r2, 1
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bne r1, r2, 1b
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tc_pass
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3:
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end
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