2 * RISC-V FPU Emulation Helpers for QEMU.
4 * Copyright (c) 2016-2017 Sagar Karandikar, sagark@eecs.berkeley.edu
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2 or later, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #include "qemu/osdep.h"
21 #include "qemu/host-utils.h"
22 #include "exec/exec-all.h"
23 #include "exec/helper-proto.h"
24 #include "fpu/softfloat.h"
25 #include "internals.h"
27 target_ulong
riscv_cpu_get_fflags(CPURISCVState
*env
)
29 int soft
= get_float_exception_flags(&env
->fp_status
);
30 target_ulong hard
= 0;
32 hard
|= (soft
& float_flag_inexact
) ? FPEXC_NX
: 0;
33 hard
|= (soft
& float_flag_underflow
) ? FPEXC_UF
: 0;
34 hard
|= (soft
& float_flag_overflow
) ? FPEXC_OF
: 0;
35 hard
|= (soft
& float_flag_divbyzero
) ? FPEXC_DZ
: 0;
36 hard
|= (soft
& float_flag_invalid
) ? FPEXC_NV
: 0;
41 void riscv_cpu_set_fflags(CPURISCVState
*env
, target_ulong hard
)
45 soft
|= (hard
& FPEXC_NX
) ? float_flag_inexact
: 0;
46 soft
|= (hard
& FPEXC_UF
) ? float_flag_underflow
: 0;
47 soft
|= (hard
& FPEXC_OF
) ? float_flag_overflow
: 0;
48 soft
|= (hard
& FPEXC_DZ
) ? float_flag_divbyzero
: 0;
49 soft
|= (hard
& FPEXC_NV
) ? float_flag_invalid
: 0;
51 set_float_exception_flags(soft
, &env
->fp_status
);
54 void helper_set_rounding_mode(CPURISCVState
*env
, uint32_t rm
)
63 softrm
= float_round_nearest_even
;
66 softrm
= float_round_to_zero
;
69 softrm
= float_round_down
;
72 softrm
= float_round_up
;
75 softrm
= float_round_ties_away
;
78 riscv_raise_exception(env
, RISCV_EXCP_ILLEGAL_INST
, GETPC());
81 set_float_rounding_mode(softrm
, &env
->fp_status
);
84 static uint64_t do_fmadd_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
,
85 uint64_t rs3
, int flags
)
87 float32 frs1
= check_nanbox_s(rs1
);
88 float32 frs2
= check_nanbox_s(rs2
);
89 float32 frs3
= check_nanbox_s(rs3
);
90 return nanbox_s(float32_muladd(frs1
, frs2
, frs3
, flags
, &env
->fp_status
));
93 uint64_t helper_fmadd_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
96 return do_fmadd_s(env
, frs1
, frs2
, frs3
, 0);
99 uint64_t helper_fmadd_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
102 return float64_muladd(frs1
, frs2
, frs3
, 0, &env
->fp_status
);
105 uint64_t helper_fmsub_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
108 return do_fmadd_s(env
, frs1
, frs2
, frs3
, float_muladd_negate_c
);
111 uint64_t helper_fmsub_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
114 return float64_muladd(frs1
, frs2
, frs3
, float_muladd_negate_c
,
118 uint64_t helper_fnmsub_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
121 return do_fmadd_s(env
, frs1
, frs2
, frs3
, float_muladd_negate_product
);
124 uint64_t helper_fnmsub_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
127 return float64_muladd(frs1
, frs2
, frs3
, float_muladd_negate_product
,
131 uint64_t helper_fnmadd_s(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
134 return do_fmadd_s(env
, frs1
, frs2
, frs3
,
135 float_muladd_negate_c
| float_muladd_negate_product
);
138 uint64_t helper_fnmadd_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
,
141 return float64_muladd(frs1
, frs2
, frs3
, float_muladd_negate_c
|
142 float_muladd_negate_product
, &env
->fp_status
);
145 uint64_t helper_fadd_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
)
147 float32 frs1
= check_nanbox_s(rs1
);
148 float32 frs2
= check_nanbox_s(rs2
);
149 return nanbox_s(float32_add(frs1
, frs2
, &env
->fp_status
));
152 uint64_t helper_fsub_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
)
154 float32 frs1
= check_nanbox_s(rs1
);
155 float32 frs2
= check_nanbox_s(rs2
);
156 return nanbox_s(float32_sub(frs1
, frs2
, &env
->fp_status
));
159 uint64_t helper_fmul_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
)
161 float32 frs1
= check_nanbox_s(rs1
);
162 float32 frs2
= check_nanbox_s(rs2
);
163 return nanbox_s(float32_mul(frs1
, frs2
, &env
->fp_status
));
166 uint64_t helper_fdiv_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
)
168 float32 frs1
= check_nanbox_s(rs1
);
169 float32 frs2
= check_nanbox_s(rs2
);
170 return nanbox_s(float32_div(frs1
, frs2
, &env
->fp_status
));
173 uint64_t helper_fmin_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
)
175 float32 frs1
= check_nanbox_s(rs1
);
176 float32 frs2
= check_nanbox_s(rs2
);
177 return nanbox_s(float32_minnum(frs1
, frs2
, &env
->fp_status
));
180 uint64_t helper_fmax_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
)
182 float32 frs1
= check_nanbox_s(rs1
);
183 float32 frs2
= check_nanbox_s(rs2
);
184 return nanbox_s(float32_maxnum(frs1
, frs2
, &env
->fp_status
));
187 uint64_t helper_fsqrt_s(CPURISCVState
*env
, uint64_t rs1
)
189 float32 frs1
= check_nanbox_s(rs1
);
190 return nanbox_s(float32_sqrt(frs1
, &env
->fp_status
));
193 target_ulong
helper_fle_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
)
195 float32 frs1
= check_nanbox_s(rs1
);
196 float32 frs2
= check_nanbox_s(rs2
);
197 return float32_le(frs1
, frs2
, &env
->fp_status
);
200 target_ulong
helper_flt_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
)
202 float32 frs1
= check_nanbox_s(rs1
);
203 float32 frs2
= check_nanbox_s(rs2
);
204 return float32_lt(frs1
, frs2
, &env
->fp_status
);
207 target_ulong
helper_feq_s(CPURISCVState
*env
, uint64_t rs1
, uint64_t rs2
)
209 float32 frs1
= check_nanbox_s(rs1
);
210 float32 frs2
= check_nanbox_s(rs2
);
211 return float32_eq_quiet(frs1
, frs2
, &env
->fp_status
);
214 target_ulong
helper_fcvt_w_s(CPURISCVState
*env
, uint64_t rs1
)
216 float32 frs1
= check_nanbox_s(rs1
);
217 return float32_to_int32(frs1
, &env
->fp_status
);
220 target_ulong
helper_fcvt_wu_s(CPURISCVState
*env
, uint64_t rs1
)
222 float32 frs1
= check_nanbox_s(rs1
);
223 return (int32_t)float32_to_uint32(frs1
, &env
->fp_status
);
226 #if defined(TARGET_RISCV64)
227 uint64_t helper_fcvt_l_s(CPURISCVState
*env
, uint64_t rs1
)
229 float32 frs1
= check_nanbox_s(rs1
);
230 return float32_to_int64(frs1
, &env
->fp_status
);
233 uint64_t helper_fcvt_lu_s(CPURISCVState
*env
, uint64_t rs1
)
235 float32 frs1
= check_nanbox_s(rs1
);
236 return float32_to_uint64(frs1
, &env
->fp_status
);
240 uint64_t helper_fcvt_s_w(CPURISCVState
*env
, target_ulong rs1
)
242 return nanbox_s(int32_to_float32((int32_t)rs1
, &env
->fp_status
));
245 uint64_t helper_fcvt_s_wu(CPURISCVState
*env
, target_ulong rs1
)
247 return nanbox_s(uint32_to_float32((uint32_t)rs1
, &env
->fp_status
));
250 #if defined(TARGET_RISCV64)
251 uint64_t helper_fcvt_s_l(CPURISCVState
*env
, uint64_t rs1
)
253 return nanbox_s(int64_to_float32(rs1
, &env
->fp_status
));
256 uint64_t helper_fcvt_s_lu(CPURISCVState
*env
, uint64_t rs1
)
258 return nanbox_s(uint64_to_float32(rs1
, &env
->fp_status
));
262 target_ulong
helper_fclass_s(uint64_t rs1
)
264 float32 frs1
= check_nanbox_s(rs1
);
265 return fclass_s(frs1
);
268 uint64_t helper_fadd_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
270 return float64_add(frs1
, frs2
, &env
->fp_status
);
273 uint64_t helper_fsub_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
275 return float64_sub(frs1
, frs2
, &env
->fp_status
);
278 uint64_t helper_fmul_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
280 return float64_mul(frs1
, frs2
, &env
->fp_status
);
283 uint64_t helper_fdiv_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
285 return float64_div(frs1
, frs2
, &env
->fp_status
);
288 uint64_t helper_fmin_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
290 return float64_minnum(frs1
, frs2
, &env
->fp_status
);
293 uint64_t helper_fmax_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
295 return float64_maxnum(frs1
, frs2
, &env
->fp_status
);
298 uint64_t helper_fcvt_s_d(CPURISCVState
*env
, uint64_t rs1
)
300 return nanbox_s(float64_to_float32(rs1
, &env
->fp_status
));
303 uint64_t helper_fcvt_d_s(CPURISCVState
*env
, uint64_t rs1
)
305 float32 frs1
= check_nanbox_s(rs1
);
306 return float32_to_float64(frs1
, &env
->fp_status
);
309 uint64_t helper_fsqrt_d(CPURISCVState
*env
, uint64_t frs1
)
311 return float64_sqrt(frs1
, &env
->fp_status
);
314 target_ulong
helper_fle_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
316 return float64_le(frs1
, frs2
, &env
->fp_status
);
319 target_ulong
helper_flt_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
321 return float64_lt(frs1
, frs2
, &env
->fp_status
);
324 target_ulong
helper_feq_d(CPURISCVState
*env
, uint64_t frs1
, uint64_t frs2
)
326 return float64_eq_quiet(frs1
, frs2
, &env
->fp_status
);
329 target_ulong
helper_fcvt_w_d(CPURISCVState
*env
, uint64_t frs1
)
331 return float64_to_int32(frs1
, &env
->fp_status
);
334 target_ulong
helper_fcvt_wu_d(CPURISCVState
*env
, uint64_t frs1
)
336 return (int32_t)float64_to_uint32(frs1
, &env
->fp_status
);
339 #if defined(TARGET_RISCV64)
340 uint64_t helper_fcvt_l_d(CPURISCVState
*env
, uint64_t frs1
)
342 return float64_to_int64(frs1
, &env
->fp_status
);
345 uint64_t helper_fcvt_lu_d(CPURISCVState
*env
, uint64_t frs1
)
347 return float64_to_uint64(frs1
, &env
->fp_status
);
351 uint64_t helper_fcvt_d_w(CPURISCVState
*env
, target_ulong rs1
)
353 return int32_to_float64((int32_t)rs1
, &env
->fp_status
);
356 uint64_t helper_fcvt_d_wu(CPURISCVState
*env
, target_ulong rs1
)
358 return uint32_to_float64((uint32_t)rs1
, &env
->fp_status
);
361 #if defined(TARGET_RISCV64)
362 uint64_t helper_fcvt_d_l(CPURISCVState
*env
, uint64_t rs1
)
364 return int64_to_float64(rs1
, &env
->fp_status
);
367 uint64_t helper_fcvt_d_lu(CPURISCVState
*env
, uint64_t rs1
)
369 return uint64_to_float64(rs1
, &env
->fp_status
);
373 target_ulong
helper_fclass_d(uint64_t frs1
)
375 return fclass_d(frs1
);