1 /* Support for generating ACPI tables and passing them to Guests
3 * Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
4 * Copyright (C) 2006 Fabrice Bellard
5 * Copyright (C) 2013 Red Hat Inc
7 * Author: Michael S. Tsirkin <mst@redhat.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, see <http://www.gnu.org/licenses/>.
23 #include "acpi-build.h"
26 #include "qemu-common.h"
27 #include "qemu/bitmap.h"
28 #include "qemu/osdep.h"
29 #include "qemu/range.h"
30 #include "qemu/error-report.h"
31 #include "hw/pci/pci.h"
33 #include "hw/i386/pc.h"
34 #include "target-i386/cpu.h"
35 #include "hw/timer/hpet.h"
36 #include "hw/acpi/acpi-defs.h"
37 #include "hw/acpi/acpi.h"
38 #include "hw/nvram/fw_cfg.h"
39 #include "hw/acpi/bios-linker-loader.h"
40 #include "hw/loader.h"
41 #include "hw/isa/isa.h"
42 #include "hw/acpi/memory_hotplug.h"
43 #include "sysemu/tpm.h"
44 #include "hw/acpi/tpm.h"
46 /* Supported chipsets: */
47 #include "hw/acpi/piix4.h"
48 #include "hw/acpi/pcihp.h"
49 #include "hw/i386/ich9.h"
50 #include "hw/pci/pci_bus.h"
51 #include "hw/pci-host/q35.h"
52 #include "hw/i386/intel_iommu.h"
54 #include "hw/i386/q35-acpi-dsdt.hex"
55 #include "hw/i386/acpi-dsdt.hex"
57 #include "hw/acpi/aml-build.h"
59 #include "qapi/qmp/qint.h"
60 #include "qom/qom-qobject.h"
61 #include "exec/ram_addr.h"
63 /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and
64 * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows
65 * a little bit, there should be plenty of free space since the DSDT
66 * shrunk by ~1.5k between QEMU 2.0 and QEMU 2.1.
68 #define ACPI_BUILD_LEGACY_CPU_AML_SIZE 97
69 #define ACPI_BUILD_ALIGN_SIZE 0x1000
71 #define ACPI_BUILD_TABLE_SIZE 0x20000
73 /* #define DEBUG_ACPI_BUILD */
74 #ifdef DEBUG_ACPI_BUILD
75 #define ACPI_BUILD_DPRINTF(fmt, ...) \
76 do {printf("ACPI_BUILD: " fmt, ## __VA_ARGS__); } while (0)
78 #define ACPI_BUILD_DPRINTF(fmt, ...)
81 typedef struct AcpiCpuInfo
{
82 DECLARE_BITMAP(found_cpus
, ACPI_CPU_HOTPLUG_ID_LIMIT
);
85 typedef struct AcpiMcfgInfo
{
90 typedef struct AcpiPmInfo
{
96 uint8_t acpi_enable_cmd
;
97 uint8_t acpi_disable_cmd
;
99 uint32_t gpe0_blk_len
;
101 uint16_t cpu_hp_io_base
;
102 uint16_t cpu_hp_io_len
;
103 uint16_t mem_hp_io_base
;
104 uint16_t mem_hp_io_len
;
105 uint16_t pcihp_io_base
;
106 uint16_t pcihp_io_len
;
109 typedef struct AcpiMiscInfo
{
112 const unsigned char *dsdt_code
;
114 uint16_t pvpanic_port
;
115 uint16_t applesmc_io_base
;
118 typedef struct AcpiBuildPciBusHotplugState
{
119 GArray
*device_table
;
120 GArray
*notify_table
;
121 struct AcpiBuildPciBusHotplugState
*parent
;
122 bool pcihp_bridge_en
;
123 } AcpiBuildPciBusHotplugState
;
125 static void acpi_get_dsdt(AcpiMiscInfo
*info
)
127 Object
*piix
= piix4_pm_find();
128 Object
*lpc
= ich9_lpc_find();
129 assert(!!piix
!= !!lpc
);
132 info
->dsdt_code
= AcpiDsdtAmlCode
;
133 info
->dsdt_size
= sizeof AcpiDsdtAmlCode
;
136 info
->dsdt_code
= Q35AcpiDsdtAmlCode
;
137 info
->dsdt_size
= sizeof Q35AcpiDsdtAmlCode
;
142 int acpi_add_cpu_info(Object
*o
, void *opaque
)
144 AcpiCpuInfo
*cpu
= opaque
;
147 if (object_dynamic_cast(o
, TYPE_CPU
)) {
148 apic_id
= object_property_get_int(o
, "apic-id", NULL
);
149 assert(apic_id
< ACPI_CPU_HOTPLUG_ID_LIMIT
);
151 set_bit(apic_id
, cpu
->found_cpus
);
154 object_child_foreach(o
, acpi_add_cpu_info
, opaque
);
158 static void acpi_get_cpu_info(AcpiCpuInfo
*cpu
)
160 Object
*root
= object_get_root();
162 memset(cpu
->found_cpus
, 0, sizeof cpu
->found_cpus
);
163 object_child_foreach(root
, acpi_add_cpu_info
, cpu
);
166 static void acpi_get_pm_info(AcpiPmInfo
*pm
)
168 Object
*piix
= piix4_pm_find();
169 Object
*lpc
= ich9_lpc_find();
173 pm
->pcihp_io_base
= 0;
174 pm
->pcihp_io_len
= 0;
177 pm
->cpu_hp_io_base
= PIIX4_CPU_HOTPLUG_IO_BASE
;
179 object_property_get_int(obj
, ACPI_PCIHP_IO_BASE_PROP
, NULL
);
181 object_property_get_int(obj
, ACPI_PCIHP_IO_LEN_PROP
, NULL
);
185 pm
->cpu_hp_io_base
= ICH9_CPU_HOTPLUG_IO_BASE
;
189 pm
->cpu_hp_io_len
= ACPI_GPE_PROC_LEN
;
190 pm
->mem_hp_io_base
= ACPI_MEMORY_HOTPLUG_BASE
;
191 pm
->mem_hp_io_len
= ACPI_MEMORY_HOTPLUG_IO_LEN
;
193 /* Fill in optional s3/s4 related properties */
194 o
= object_property_get_qobject(obj
, ACPI_PM_PROP_S3_DISABLED
, NULL
);
196 pm
->s3_disabled
= qint_get_int(qobject_to_qint(o
));
198 pm
->s3_disabled
= false;
201 o
= object_property_get_qobject(obj
, ACPI_PM_PROP_S4_DISABLED
, NULL
);
203 pm
->s4_disabled
= qint_get_int(qobject_to_qint(o
));
205 pm
->s4_disabled
= false;
208 o
= object_property_get_qobject(obj
, ACPI_PM_PROP_S4_VAL
, NULL
);
210 pm
->s4_val
= qint_get_int(qobject_to_qint(o
));
216 /* Fill in mandatory properties */
217 pm
->sci_int
= object_property_get_int(obj
, ACPI_PM_PROP_SCI_INT
, NULL
);
219 pm
->acpi_enable_cmd
= object_property_get_int(obj
,
220 ACPI_PM_PROP_ACPI_ENABLE_CMD
,
222 pm
->acpi_disable_cmd
= object_property_get_int(obj
,
223 ACPI_PM_PROP_ACPI_DISABLE_CMD
,
225 pm
->io_base
= object_property_get_int(obj
, ACPI_PM_PROP_PM_IO_BASE
,
227 pm
->gpe0_blk
= object_property_get_int(obj
, ACPI_PM_PROP_GPE0_BLK
,
229 pm
->gpe0_blk_len
= object_property_get_int(obj
, ACPI_PM_PROP_GPE0_BLK_LEN
,
231 pm
->pcihp_bridge_en
=
232 object_property_get_bool(obj
, "acpi-pci-hotplug-with-bridge-support",
236 static void acpi_get_misc_info(AcpiMiscInfo
*info
)
238 info
->has_hpet
= hpet_find();
239 info
->has_tpm
= tpm_find();
240 info
->pvpanic_port
= pvpanic_port();
241 info
->applesmc_io_base
= applesmc_port();
244 static void acpi_get_pci_info(PcPciInfo
*info
)
249 pci_host
= object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE
, &ambiguous
);
250 g_assert(!ambiguous
);
253 info
->w32
.begin
= object_property_get_int(pci_host
,
254 PCI_HOST_PROP_PCI_HOLE_START
,
256 info
->w32
.end
= object_property_get_int(pci_host
,
257 PCI_HOST_PROP_PCI_HOLE_END
,
259 info
->w64
.begin
= object_property_get_int(pci_host
,
260 PCI_HOST_PROP_PCI_HOLE64_START
,
262 info
->w64
.end
= object_property_get_int(pci_host
,
263 PCI_HOST_PROP_PCI_HOLE64_END
,
267 #define ACPI_PORT_SMI_CMD 0x00b2 /* TODO: this is APM_CNT_IOPORT */
269 static void acpi_align_size(GArray
*blob
, unsigned align
)
271 /* Align size to multiple of given size. This reduces the chance
272 * we need to change size in the future (breaking cross version migration).
274 g_array_set_size(blob
, ROUND_UP(acpi_data_len(blob
), align
));
279 build_facs(GArray
*table_data
, GArray
*linker
, PcGuestInfo
*guest_info
)
281 AcpiFacsDescriptorRev1
*facs
= acpi_data_push(table_data
, sizeof *facs
);
282 memcpy(&facs
->signature
, "FACS", 4);
283 facs
->length
= cpu_to_le32(sizeof(*facs
));
286 /* Load chipset information in FADT */
287 static void fadt_setup(AcpiFadtDescriptorRev1
*fadt
, AcpiPmInfo
*pm
)
291 fadt
->sci_int
= cpu_to_le16(pm
->sci_int
);
292 fadt
->smi_cmd
= cpu_to_le32(ACPI_PORT_SMI_CMD
);
293 fadt
->acpi_enable
= pm
->acpi_enable_cmd
;
294 fadt
->acpi_disable
= pm
->acpi_disable_cmd
;
295 /* EVT, CNT, TMR offset matches hw/acpi/core.c */
296 fadt
->pm1a_evt_blk
= cpu_to_le32(pm
->io_base
);
297 fadt
->pm1a_cnt_blk
= cpu_to_le32(pm
->io_base
+ 0x04);
298 fadt
->pm_tmr_blk
= cpu_to_le32(pm
->io_base
+ 0x08);
299 fadt
->gpe0_blk
= cpu_to_le32(pm
->gpe0_blk
);
300 /* EVT, CNT, TMR length matches hw/acpi/core.c */
301 fadt
->pm1_evt_len
= 4;
302 fadt
->pm1_cnt_len
= 2;
303 fadt
->pm_tmr_len
= 4;
304 fadt
->gpe0_blk_len
= pm
->gpe0_blk_len
;
305 fadt
->plvl2_lat
= cpu_to_le16(0xfff); /* C2 state not supported */
306 fadt
->plvl3_lat
= cpu_to_le16(0xfff); /* C3 state not supported */
307 fadt
->flags
= cpu_to_le32((1 << ACPI_FADT_F_WBINVD
) |
308 (1 << ACPI_FADT_F_PROC_C1
) |
309 (1 << ACPI_FADT_F_SLP_BUTTON
) |
310 (1 << ACPI_FADT_F_RTC_S4
));
311 fadt
->flags
|= cpu_to_le32(1 << ACPI_FADT_F_USE_PLATFORM_CLOCK
);
312 /* APIC destination mode ("Flat Logical") has an upper limit of 8 CPUs
313 * For more than 8 CPUs, "Clustered Logical" mode has to be used
316 fadt
->flags
|= cpu_to_le32(1 << ACPI_FADT_F_FORCE_APIC_CLUSTER_MODEL
);
323 build_fadt(GArray
*table_data
, GArray
*linker
, AcpiPmInfo
*pm
,
324 unsigned facs
, unsigned dsdt
)
326 AcpiFadtDescriptorRev1
*fadt
= acpi_data_push(table_data
, sizeof(*fadt
));
328 fadt
->firmware_ctrl
= cpu_to_le32(facs
);
329 /* FACS address to be filled by Guest linker */
330 bios_linker_loader_add_pointer(linker
, ACPI_BUILD_TABLE_FILE
,
331 ACPI_BUILD_TABLE_FILE
,
332 table_data
, &fadt
->firmware_ctrl
,
333 sizeof fadt
->firmware_ctrl
);
335 fadt
->dsdt
= cpu_to_le32(dsdt
);
336 /* DSDT address to be filled by Guest linker */
337 bios_linker_loader_add_pointer(linker
, ACPI_BUILD_TABLE_FILE
,
338 ACPI_BUILD_TABLE_FILE
,
339 table_data
, &fadt
->dsdt
,
342 fadt_setup(fadt
, pm
);
344 build_header(linker
, table_data
,
345 (void *)fadt
, "FACP", sizeof(*fadt
), 1);
349 build_madt(GArray
*table_data
, GArray
*linker
, AcpiCpuInfo
*cpu
,
350 PcGuestInfo
*guest_info
)
352 int madt_start
= table_data
->len
;
354 AcpiMultipleApicTable
*madt
;
355 AcpiMadtIoApic
*io_apic
;
356 AcpiMadtIntsrcovr
*intsrcovr
;
357 AcpiMadtLocalNmi
*local_nmi
;
360 madt
= acpi_data_push(table_data
, sizeof *madt
);
361 madt
->local_apic_address
= cpu_to_le32(APIC_DEFAULT_ADDRESS
);
362 madt
->flags
= cpu_to_le32(1);
364 for (i
= 0; i
< guest_info
->apic_id_limit
; i
++) {
365 AcpiMadtProcessorApic
*apic
= acpi_data_push(table_data
, sizeof *apic
);
366 apic
->type
= ACPI_APIC_PROCESSOR
;
367 apic
->length
= sizeof(*apic
);
368 apic
->processor_id
= i
;
369 apic
->local_apic_id
= i
;
370 if (test_bit(i
, cpu
->found_cpus
)) {
371 apic
->flags
= cpu_to_le32(1);
373 apic
->flags
= cpu_to_le32(0);
376 io_apic
= acpi_data_push(table_data
, sizeof *io_apic
);
377 io_apic
->type
= ACPI_APIC_IO
;
378 io_apic
->length
= sizeof(*io_apic
);
379 #define ACPI_BUILD_IOAPIC_ID 0x0
380 io_apic
->io_apic_id
= ACPI_BUILD_IOAPIC_ID
;
381 io_apic
->address
= cpu_to_le32(IO_APIC_DEFAULT_ADDRESS
);
382 io_apic
->interrupt
= cpu_to_le32(0);
384 if (guest_info
->apic_xrupt_override
) {
385 intsrcovr
= acpi_data_push(table_data
, sizeof *intsrcovr
);
386 intsrcovr
->type
= ACPI_APIC_XRUPT_OVERRIDE
;
387 intsrcovr
->length
= sizeof(*intsrcovr
);
388 intsrcovr
->source
= 0;
389 intsrcovr
->gsi
= cpu_to_le32(2);
390 intsrcovr
->flags
= cpu_to_le16(0); /* conforms to bus specifications */
392 for (i
= 1; i
< 16; i
++) {
393 #define ACPI_BUILD_PCI_IRQS ((1<<5) | (1<<9) | (1<<10) | (1<<11))
394 if (!(ACPI_BUILD_PCI_IRQS
& (1 << i
))) {
395 /* No need for a INT source override structure. */
398 intsrcovr
= acpi_data_push(table_data
, sizeof *intsrcovr
);
399 intsrcovr
->type
= ACPI_APIC_XRUPT_OVERRIDE
;
400 intsrcovr
->length
= sizeof(*intsrcovr
);
401 intsrcovr
->source
= i
;
402 intsrcovr
->gsi
= cpu_to_le32(i
);
403 intsrcovr
->flags
= cpu_to_le16(0xd); /* active high, level triggered */
406 local_nmi
= acpi_data_push(table_data
, sizeof *local_nmi
);
407 local_nmi
->type
= ACPI_APIC_LOCAL_NMI
;
408 local_nmi
->length
= sizeof(*local_nmi
);
409 local_nmi
->processor_id
= 0xff; /* all processors */
410 local_nmi
->flags
= cpu_to_le16(0);
411 local_nmi
->lint
= 1; /* ACPI_LINT1 */
413 build_header(linker
, table_data
,
414 (void *)(table_data
->data
+ madt_start
), "APIC",
415 table_data
->len
- madt_start
, 1);
418 #include "hw/i386/ssdt-tpm.hex"
420 /* Assign BSEL property to all buses. In the future, this can be changed
421 * to only assign to buses that support hotplug.
423 static void *acpi_set_bsel(PCIBus
*bus
, void *opaque
)
425 unsigned *bsel_alloc
= opaque
;
428 if (qbus_is_hotpluggable(BUS(bus
))) {
429 bus_bsel
= g_malloc(sizeof *bus_bsel
);
431 *bus_bsel
= (*bsel_alloc
)++;
432 object_property_add_uint32_ptr(OBJECT(bus
), ACPI_PCIHP_PROP_BSEL
,
439 static void acpi_set_pci_info(void)
441 PCIBus
*bus
= find_i440fx(); /* TODO: Q35 support */
442 unsigned bsel_alloc
= 0;
445 /* Scan all PCI buses. Set property to enable acpi based hotplug. */
446 pci_for_each_bus_depth_first(bus
, acpi_set_bsel
, NULL
, &bsel_alloc
);
450 static void build_append_pcihp_notify_entry(Aml
*method
, int slot
)
453 int32_t devfn
= PCI_DEVFN(slot
, 0);
455 if_ctx
= aml_if(aml_and(aml_arg(0), aml_int(0x1U
<< slot
)));
456 aml_append(if_ctx
, aml_notify(aml_name("S%.02X", devfn
), aml_arg(1)));
457 aml_append(method
, if_ctx
);
460 static void build_append_pci_bus_devices(Aml
*parent_scope
, PCIBus
*bus
,
461 bool pcihp_bridge_en
)
463 Aml
*dev
, *notify_method
, *method
;
468 bsel
= object_property_get_qobject(OBJECT(bus
), ACPI_PCIHP_PROP_BSEL
, NULL
);
470 int64_t bsel_val
= qint_get_int(qobject_to_qint(bsel
));
472 aml_append(parent_scope
, aml_name_decl("BSEL", aml_int(bsel_val
)));
473 notify_method
= aml_method("DVNT", 2);
476 for (i
= 0; i
< ARRAY_SIZE(bus
->devices
); i
+= PCI_FUNC_MAX
) {
479 PCIDevice
*pdev
= bus
->devices
[i
];
480 int slot
= PCI_SLOT(i
);
481 bool hotplug_enabled_dev
;
485 if (bsel
) { /* add hotplug slots for non present devices */
486 dev
= aml_device("S%.02X", PCI_DEVFN(slot
, 0));
487 aml_append(dev
, aml_name_decl("_SUN", aml_int(slot
)));
488 aml_append(dev
, aml_name_decl("_ADR", aml_int(slot
<< 16)));
489 method
= aml_method("_EJ0", 1);
491 aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
493 aml_append(dev
, method
);
494 aml_append(parent_scope
, dev
);
496 build_append_pcihp_notify_entry(notify_method
, slot
);
501 pc
= PCI_DEVICE_GET_CLASS(pdev
);
502 dc
= DEVICE_GET_CLASS(pdev
);
504 /* When hotplug for bridges is enabled, bridges are
505 * described in ACPI separately (see build_pci_bus_end).
506 * In this case they aren't themselves hot-pluggable.
507 * Hotplugged bridges *are* hot-pluggable.
509 bridge_in_acpi
= pc
->is_bridge
&& pcihp_bridge_en
&&
510 !DEVICE(pdev
)->hotplugged
;
512 hotplug_enabled_dev
= bsel
&& dc
->hotpluggable
&& !bridge_in_acpi
;
514 if (pc
->class_id
== PCI_CLASS_BRIDGE_ISA
) {
518 /* start to compose PCI slot descriptor */
519 dev
= aml_device("S%.02X", PCI_DEVFN(slot
, 0));
520 aml_append(dev
, aml_name_decl("_ADR", aml_int(slot
<< 16)));
522 if (pc
->class_id
== PCI_CLASS_DISPLAY_VGA
) {
523 /* add VGA specific AML methods */
526 if (object_dynamic_cast(OBJECT(pdev
), "qxl-vga")) {
532 method
= aml_method("_S1D", 0);
533 aml_append(method
, aml_return(aml_int(0)));
534 aml_append(dev
, method
);
536 method
= aml_method("_S2D", 0);
537 aml_append(method
, aml_return(aml_int(0)));
538 aml_append(dev
, method
);
540 method
= aml_method("_S3D", 0);
541 aml_append(method
, aml_return(aml_int(s3d
)));
542 aml_append(dev
, method
);
543 } else if (hotplug_enabled_dev
) {
544 /* add _SUN/_EJ0 to make slot hotpluggable */
545 aml_append(dev
, aml_name_decl("_SUN", aml_int(slot
)));
547 method
= aml_method("_EJ0", 1);
549 aml_call2("PCEJ", aml_name("BSEL"), aml_name("_SUN"))
551 aml_append(dev
, method
);
554 build_append_pcihp_notify_entry(notify_method
, slot
);
556 } else if (bridge_in_acpi
) {
558 * device is coldplugged bridge,
559 * add child device descriptions into its scope
561 PCIBus
*sec_bus
= pci_bridge_get_sec_bus(PCI_BRIDGE(pdev
));
563 build_append_pci_bus_devices(dev
, sec_bus
, pcihp_bridge_en
);
565 /* slot descriptor has been composed, add it into parent context */
566 aml_append(parent_scope
, dev
);
570 aml_append(parent_scope
, notify_method
);
573 /* Append PCNT method to notify about events on local and child buses.
574 * Add unconditionally for root since DSDT expects it.
576 method
= aml_method("PCNT", 0);
578 /* If bus supports hotplug select it and notify about local events */
580 int64_t bsel_val
= qint_get_int(qobject_to_qint(bsel
));
581 aml_append(method
, aml_store(aml_int(bsel_val
), aml_name("BNUM")));
583 aml_call2("DVNT", aml_name("PCIU"), aml_int(1) /* Device Check */)
586 aml_call2("DVNT", aml_name("PCID"), aml_int(3)/* Eject Request */)
590 /* Notify about child bus events in any case */
591 if (pcihp_bridge_en
) {
592 QLIST_FOREACH(sec
, &bus
->child
, sibling
) {
593 int32_t devfn
= sec
->parent_dev
->devfn
;
595 aml_append(method
, aml_name("^S%.02X.PCNT", devfn
));
598 aml_append(parent_scope
, method
);
602 build_ssdt(GArray
*table_data
, GArray
*linker
,
603 AcpiCpuInfo
*cpu
, AcpiPmInfo
*pm
, AcpiMiscInfo
*misc
,
604 PcPciInfo
*pci
, PcGuestInfo
*guest_info
)
606 MachineState
*machine
= MACHINE(qdev_get_machine());
607 uint32_t nr_mem
= machine
->ram_slots
;
608 unsigned acpi_cpus
= guest_info
->apic_id_limit
;
609 Aml
*ssdt
, *sb_scope
, *scope
, *pkg
, *dev
, *method
, *crs
, *field
, *ifctx
;
612 ssdt
= init_aml_allocator();
613 /* The current AML generator can cover the APIC ID range [0..255],
614 * inclusive, for VCPU hotplug. */
615 QEMU_BUILD_BUG_ON(ACPI_CPU_HOTPLUG_ID_LIMIT
> 256);
616 g_assert(acpi_cpus
<= ACPI_CPU_HOTPLUG_ID_LIMIT
);
618 /* Reserve space for header */
619 acpi_data_push(ssdt
->buf
, sizeof(AcpiTableHeader
));
621 scope
= aml_scope("\\_SB.PCI0");
622 /* build PCI0._CRS */
623 crs
= aml_resource_template();
625 aml_word_bus_number(aml_min_fixed
, aml_max_fixed
, aml_pos_decode
,
626 0x0000, 0x0000, 0x00FF, 0x0000, 0x0100));
627 aml_append(crs
, aml_io(aml_decode16
, 0x0CF8, 0x0CF8, 0x01, 0x08));
630 aml_word_io(aml_min_fixed
, aml_max_fixed
,
631 aml_pos_decode
, aml_entire_range
,
632 0x0000, 0x0000, 0x0CF7, 0x0000, 0x0CF8));
634 aml_word_io(aml_min_fixed
, aml_max_fixed
,
635 aml_pos_decode
, aml_entire_range
,
636 0x0000, 0x0D00, 0xFFFF, 0x0000, 0xF300));
638 aml_dword_memory(aml_pos_decode
, aml_min_fixed
, aml_max_fixed
,
639 aml_cacheable
, aml_ReadWrite
,
640 0, 0x000A0000, 0x000BFFFF, 0, 0x00020000));
642 aml_dword_memory(aml_pos_decode
, aml_min_fixed
, aml_max_fixed
,
643 aml_non_cacheable
, aml_ReadWrite
,
644 0, pci
->w32
.begin
, pci
->w32
.end
- 1, 0,
645 pci
->w32
.end
- pci
->w32
.begin
));
646 if (pci
->w64
.begin
) {
648 aml_qword_memory(aml_pos_decode
, aml_min_fixed
, aml_max_fixed
,
649 aml_cacheable
, aml_ReadWrite
,
650 0, pci
->w64
.begin
, pci
->w64
.end
- 1, 0,
651 pci
->w64
.end
- pci
->w64
.begin
));
653 aml_append(scope
, aml_name_decl("_CRS", crs
));
655 /* reserve GPE0 block resources */
656 dev
= aml_device("GPE0");
657 aml_append(dev
, aml_name_decl("_HID", aml_string("PNP0A06")));
658 aml_append(dev
, aml_name_decl("_UID", aml_string("GPE0 resources")));
659 /* device present, functioning, decoding, not shown in UI */
660 aml_append(dev
, aml_name_decl("_STA", aml_int(0xB)));
661 crs
= aml_resource_template();
663 aml_io(aml_decode16
, pm
->gpe0_blk
, pm
->gpe0_blk
, 1, pm
->gpe0_blk_len
)
665 aml_append(dev
, aml_name_decl("_CRS", crs
));
666 aml_append(scope
, dev
);
668 /* reserve PCIHP resources */
669 if (pm
->pcihp_io_len
) {
670 dev
= aml_device("PHPR");
671 aml_append(dev
, aml_name_decl("_HID", aml_string("PNP0A06")));
673 aml_name_decl("_UID", aml_string("PCI Hotplug resources")));
674 /* device present, functioning, decoding, not shown in UI */
675 aml_append(dev
, aml_name_decl("_STA", aml_int(0xB)));
676 crs
= aml_resource_template();
678 aml_io(aml_decode16
, pm
->pcihp_io_base
, pm
->pcihp_io_base
, 1,
681 aml_append(dev
, aml_name_decl("_CRS", crs
));
682 aml_append(scope
, dev
);
684 aml_append(ssdt
, scope
);
686 /* create S3_ / S4_ / S5_ packages if necessary */
687 scope
= aml_scope("\\");
688 if (!pm
->s3_disabled
) {
689 pkg
= aml_package(4);
690 aml_append(pkg
, aml_int(1)); /* PM1a_CNT.SLP_TYP */
691 aml_append(pkg
, aml_int(1)); /* PM1b_CNT.SLP_TYP, FIXME: not impl. */
692 aml_append(pkg
, aml_int(0)); /* reserved */
693 aml_append(pkg
, aml_int(0)); /* reserved */
694 aml_append(scope
, aml_name_decl("_S3", pkg
));
697 if (!pm
->s4_disabled
) {
698 pkg
= aml_package(4);
699 aml_append(pkg
, aml_int(pm
->s4_val
)); /* PM1a_CNT.SLP_TYP */
700 /* PM1b_CNT.SLP_TYP, FIXME: not impl. */
701 aml_append(pkg
, aml_int(pm
->s4_val
));
702 aml_append(pkg
, aml_int(0)); /* reserved */
703 aml_append(pkg
, aml_int(0)); /* reserved */
704 aml_append(scope
, aml_name_decl("_S4", pkg
));
707 pkg
= aml_package(4);
708 aml_append(pkg
, aml_int(0)); /* PM1a_CNT.SLP_TYP */
709 aml_append(pkg
, aml_int(0)); /* PM1b_CNT.SLP_TYP not impl. */
710 aml_append(pkg
, aml_int(0)); /* reserved */
711 aml_append(pkg
, aml_int(0)); /* reserved */
712 aml_append(scope
, aml_name_decl("_S5", pkg
));
713 aml_append(ssdt
, scope
);
715 if (misc
->applesmc_io_base
) {
716 scope
= aml_scope("\\_SB.PCI0.ISA");
717 dev
= aml_device("SMC");
719 aml_append(dev
, aml_name_decl("_HID", aml_eisaid("APP0001")));
720 /* device present, functioning, decoding, not shown in UI */
721 aml_append(dev
, aml_name_decl("_STA", aml_int(0xB)));
723 crs
= aml_resource_template();
725 aml_io(aml_decode16
, misc
->applesmc_io_base
, misc
->applesmc_io_base
,
726 0x01, APPLESMC_MAX_DATA_LENGTH
)
728 aml_append(crs
, aml_irq_no_flags(6));
729 aml_append(dev
, aml_name_decl("_CRS", crs
));
731 aml_append(scope
, dev
);
732 aml_append(ssdt
, scope
);
735 if (misc
->pvpanic_port
) {
736 scope
= aml_scope("\\_SB.PCI0.ISA");
738 dev
= aml_device("PEVR");
739 aml_append(dev
, aml_name_decl("_HID", aml_string("QEMU0001")));
741 crs
= aml_resource_template();
743 aml_io(aml_decode16
, misc
->pvpanic_port
, misc
->pvpanic_port
, 1, 1)
745 aml_append(dev
, aml_name_decl("_CRS", crs
));
747 aml_append(dev
, aml_operation_region("PEOR", aml_system_io
,
748 misc
->pvpanic_port
, 1));
749 field
= aml_field("PEOR", aml_byte_acc
, aml_preserve
);
750 aml_append(field
, aml_named_field("PEPT", 8));
751 aml_append(dev
, field
);
753 method
= aml_method("RDPT", 0);
754 aml_append(method
, aml_store(aml_name("PEPT"), aml_local(0)));
755 aml_append(method
, aml_return(aml_local(0)));
756 aml_append(dev
, method
);
758 method
= aml_method("WRPT", 1);
759 aml_append(method
, aml_store(aml_arg(0), aml_name("PEPT")));
760 aml_append(dev
, method
);
762 aml_append(scope
, dev
);
763 aml_append(ssdt
, scope
);
766 sb_scope
= aml_scope("_SB");
768 /* create PCI0.PRES device and its _CRS to reserve CPU hotplug MMIO */
769 dev
= aml_device("PCI0." stringify(CPU_HOTPLUG_RESOURCE_DEVICE
));
770 aml_append(dev
, aml_name_decl("_HID", aml_eisaid("PNP0A06")));
772 aml_name_decl("_UID", aml_string("CPU Hotplug resources"))
774 /* device present, functioning, decoding, not shown in UI */
775 aml_append(dev
, aml_name_decl("_STA", aml_int(0xB)));
776 crs
= aml_resource_template();
778 aml_io(aml_decode16
, pm
->cpu_hp_io_base
, pm
->cpu_hp_io_base
, 1,
781 aml_append(dev
, aml_name_decl("_CRS", crs
));
782 aml_append(sb_scope
, dev
);
783 /* declare CPU hotplug MMIO region and PRS field to access it */
784 aml_append(sb_scope
, aml_operation_region(
785 "PRST", aml_system_io
, pm
->cpu_hp_io_base
, pm
->cpu_hp_io_len
));
786 field
= aml_field("PRST", aml_byte_acc
, aml_preserve
);
787 aml_append(field
, aml_named_field("PRS", 256));
788 aml_append(sb_scope
, field
);
790 /* build Processor object for each processor */
791 for (i
= 0; i
< acpi_cpus
; i
++) {
792 dev
= aml_processor(i
, 0, 0, "CP%.02X", i
);
794 method
= aml_method("_MAT", 0);
795 aml_append(method
, aml_return(aml_call1("CPMA", aml_int(i
))));
796 aml_append(dev
, method
);
798 method
= aml_method("_STA", 0);
799 aml_append(method
, aml_return(aml_call1("CPST", aml_int(i
))));
800 aml_append(dev
, method
);
802 method
= aml_method("_EJ0", 1);
804 aml_return(aml_call2("CPEJ", aml_int(i
), aml_arg(0)))
806 aml_append(dev
, method
);
808 aml_append(sb_scope
, dev
);
812 * Method(NTFY, 2) {If (LEqual(Arg0, 0x00)) {Notify(CP00, Arg1)} ...}
814 /* Arg0 = Processor ID = APIC ID */
815 method
= aml_method("NTFY", 2);
816 for (i
= 0; i
< acpi_cpus
; i
++) {
817 ifctx
= aml_if(aml_equal(aml_arg(0), aml_int(i
)));
819 aml_notify(aml_name("CP%.02X", i
), aml_arg(1))
821 aml_append(method
, ifctx
);
823 aml_append(sb_scope
, method
);
825 /* build "Name(CPON, Package() { One, One, ..., Zero, Zero, ... })"
827 * Note: The ability to create variable-sized packages was first
828 * introduced in ACPI 2.0. ACPI 1.0 only allowed fixed-size packages
829 * ith up to 255 elements. Windows guests up to win2k8 fail when
830 * VarPackageOp is used.
832 pkg
= acpi_cpus
<= 255 ? aml_package(acpi_cpus
) :
833 aml_varpackage(acpi_cpus
);
835 for (i
= 0; i
< acpi_cpus
; i
++) {
836 uint8_t b
= test_bit(i
, cpu
->found_cpus
) ? 0x01 : 0x00;
837 aml_append(pkg
, aml_int(b
));
839 aml_append(sb_scope
, aml_name_decl("CPON", pkg
));
841 /* build memory devices */
842 assert(nr_mem
<= ACPI_MAX_RAM_SLOTS
);
843 scope
= aml_scope("\\_SB.PCI0." stringify(MEMORY_HOTPLUG_DEVICE
));
845 aml_name_decl(stringify(MEMORY_SLOTS_NUMBER
), aml_int(nr_mem
))
848 crs
= aml_resource_template();
850 aml_io(aml_decode16
, pm
->mem_hp_io_base
, pm
->mem_hp_io_base
, 0,
853 aml_append(scope
, aml_name_decl("_CRS", crs
));
855 aml_append(scope
, aml_operation_region(
856 stringify(MEMORY_HOTPLUG_IO_REGION
), aml_system_io
,
857 pm
->mem_hp_io_base
, pm
->mem_hp_io_len
)
860 field
= aml_field(stringify(MEMORY_HOTPLUG_IO_REGION
), aml_dword_acc
,
862 aml_append(field
, /* read only */
863 aml_named_field(stringify(MEMORY_SLOT_ADDR_LOW
), 32));
864 aml_append(field
, /* read only */
865 aml_named_field(stringify(MEMORY_SLOT_ADDR_HIGH
), 32));
866 aml_append(field
, /* read only */
867 aml_named_field(stringify(MEMORY_SLOT_SIZE_LOW
), 32));
868 aml_append(field
, /* read only */
869 aml_named_field(stringify(MEMORY_SLOT_SIZE_HIGH
), 32));
870 aml_append(field
, /* read only */
871 aml_named_field(stringify(MEMORY_SLOT_PROXIMITY
), 32));
872 aml_append(scope
, field
);
874 field
= aml_field(stringify(MEMORY_HOTPLUG_IO_REGION
), aml_byte_acc
,
876 aml_append(field
, aml_reserved_field(160 /* bits, Offset(20) */));
877 aml_append(field
, /* 1 if enabled, read only */
878 aml_named_field(stringify(MEMORY_SLOT_ENABLED
), 1));
880 /*(read) 1 if has a insert event. (write) 1 to clear event */
881 aml_named_field(stringify(MEMORY_SLOT_INSERT_EVENT
), 1));
883 /* (read) 1 if has a remove event. (write) 1 to clear event */
884 aml_named_field(stringify(MEMORY_SLOT_REMOVE_EVENT
), 1));
886 /* initiates device eject, write only */
887 aml_named_field(stringify(MEMORY_SLOT_EJECT
), 1));
888 aml_append(scope
, field
);
890 field
= aml_field(stringify(MEMORY_HOTPLUG_IO_REGION
), aml_dword_acc
,
892 aml_append(field
, /* DIMM selector, write only */
893 aml_named_field(stringify(MEMORY_SLOT_SLECTOR
), 32));
894 aml_append(field
, /* _OST event code, write only */
895 aml_named_field(stringify(MEMORY_SLOT_OST_EVENT
), 32));
896 aml_append(field
, /* _OST status code, write only */
897 aml_named_field(stringify(MEMORY_SLOT_OST_STATUS
), 32));
898 aml_append(scope
, field
);
900 aml_append(sb_scope
, scope
);
902 for (i
= 0; i
< nr_mem
; i
++) {
903 #define BASEPATH "\\_SB.PCI0." stringify(MEMORY_HOTPLUG_DEVICE) "."
906 dev
= aml_device("MP%02X", i
);
907 aml_append(dev
, aml_name_decl("_UID", aml_string("0x%02X", i
)));
908 aml_append(dev
, aml_name_decl("_HID", aml_eisaid("PNP0C80")));
910 method
= aml_method("_CRS", 0);
911 s
= BASEPATH
stringify(MEMORY_SLOT_CRS_METHOD
);
912 aml_append(method
, aml_return(aml_call1(s
, aml_name("_UID"))));
913 aml_append(dev
, method
);
915 method
= aml_method("_STA", 0);
916 s
= BASEPATH
stringify(MEMORY_SLOT_STATUS_METHOD
);
917 aml_append(method
, aml_return(aml_call1(s
, aml_name("_UID"))));
918 aml_append(dev
, method
);
920 method
= aml_method("_PXM", 0);
921 s
= BASEPATH
stringify(MEMORY_SLOT_PROXIMITY_METHOD
);
922 aml_append(method
, aml_return(aml_call1(s
, aml_name("_UID"))));
923 aml_append(dev
, method
);
925 method
= aml_method("_OST", 3);
926 s
= BASEPATH
stringify(MEMORY_SLOT_OST_METHOD
);
927 aml_append(method
, aml_return(aml_call4(
928 s
, aml_name("_UID"), aml_arg(0), aml_arg(1), aml_arg(2)
930 aml_append(dev
, method
);
932 method
= aml_method("_EJ0", 1);
933 s
= BASEPATH
stringify(MEMORY_SLOT_EJECT_METHOD
);
934 aml_append(method
, aml_return(aml_call2(
935 s
, aml_name("_UID"), aml_arg(0))));
936 aml_append(dev
, method
);
938 aml_append(sb_scope
, dev
);
941 /* build Method(MEMORY_SLOT_NOTIFY_METHOD, 2) {
942 * If (LEqual(Arg0, 0x00)) {Notify(MP00, Arg1)} ... }
944 method
= aml_method(stringify(MEMORY_SLOT_NOTIFY_METHOD
), 2);
945 for (i
= 0; i
< nr_mem
; i
++) {
946 ifctx
= aml_if(aml_equal(aml_arg(0), aml_int(i
)));
948 aml_notify(aml_name("MP%.02X", i
), aml_arg(1))
950 aml_append(method
, ifctx
);
952 aml_append(sb_scope
, method
);
959 pci_host
= object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE
, &ambiguous
);
960 if (!ambiguous
&& pci_host
) {
961 bus
= PCI_HOST_BRIDGE(pci_host
)->bus
;
965 Aml
*scope
= aml_scope("PCI0");
966 /* Scan all PCI buses. Generate tables to support hotplug. */
967 build_append_pci_bus_devices(scope
, bus
, pm
->pcihp_bridge_en
);
968 aml_append(sb_scope
, scope
);
971 aml_append(ssdt
, sb_scope
);
974 /* copy AML table into ACPI tables blob and patch header there */
975 g_array_append_vals(table_data
, ssdt
->buf
->data
, ssdt
->buf
->len
);
976 build_header(linker
, table_data
,
977 (void *)(table_data
->data
+ table_data
->len
- ssdt
->buf
->len
),
978 "SSDT", ssdt
->buf
->len
, 1);
979 free_aml_allocator();
983 build_hpet(GArray
*table_data
, GArray
*linker
)
987 hpet
= acpi_data_push(table_data
, sizeof(*hpet
));
988 /* Note timer_block_id value must be kept in sync with value advertised by
991 hpet
->timer_block_id
= cpu_to_le32(0x8086a201);
992 hpet
->addr
.address
= cpu_to_le64(HPET_BASE
);
993 build_header(linker
, table_data
,
994 (void *)hpet
, "HPET", sizeof(*hpet
), 1);
998 build_tpm_tcpa(GArray
*table_data
, GArray
*linker
, GArray
*tcpalog
)
1000 Acpi20Tcpa
*tcpa
= acpi_data_push(table_data
, sizeof *tcpa
);
1001 uint64_t log_area_start_address
= acpi_data_len(tcpalog
);
1003 tcpa
->platform_class
= cpu_to_le16(TPM_TCPA_ACPI_CLASS_CLIENT
);
1004 tcpa
->log_area_minimum_length
= cpu_to_le32(TPM_LOG_AREA_MINIMUM_SIZE
);
1005 tcpa
->log_area_start_address
= cpu_to_le64(log_area_start_address
);
1007 bios_linker_loader_alloc(linker
, ACPI_BUILD_TPMLOG_FILE
, 1,
1008 false /* high memory */);
1010 /* log area start address to be filled by Guest linker */
1011 bios_linker_loader_add_pointer(linker
, ACPI_BUILD_TABLE_FILE
,
1012 ACPI_BUILD_TPMLOG_FILE
,
1013 table_data
, &tcpa
->log_area_start_address
,
1014 sizeof(tcpa
->log_area_start_address
));
1016 build_header(linker
, table_data
,
1017 (void *)tcpa
, "TCPA", sizeof(*tcpa
), 2);
1019 acpi_data_push(tcpalog
, TPM_LOG_AREA_MINIMUM_SIZE
);
1023 build_tpm_ssdt(GArray
*table_data
, GArray
*linker
)
1027 tpm_ptr
= acpi_data_push(table_data
, sizeof(ssdt_tpm_aml
));
1028 memcpy(tpm_ptr
, ssdt_tpm_aml
, sizeof(ssdt_tpm_aml
));
1032 MEM_AFFINITY_NOFLAGS
= 0,
1033 MEM_AFFINITY_ENABLED
= (1 << 0),
1034 MEM_AFFINITY_HOTPLUGGABLE
= (1 << 1),
1035 MEM_AFFINITY_NON_VOLATILE
= (1 << 2),
1036 } MemoryAffinityFlags
;
1039 acpi_build_srat_memory(AcpiSratMemoryAffinity
*numamem
, uint64_t base
,
1040 uint64_t len
, int node
, MemoryAffinityFlags flags
)
1042 numamem
->type
= ACPI_SRAT_MEMORY
;
1043 numamem
->length
= sizeof(*numamem
);
1044 memset(numamem
->proximity
, 0, 4);
1045 numamem
->proximity
[0] = node
;
1046 numamem
->flags
= cpu_to_le32(flags
);
1047 numamem
->base_addr
= cpu_to_le64(base
);
1048 numamem
->range_length
= cpu_to_le64(len
);
1052 build_srat(GArray
*table_data
, GArray
*linker
, PcGuestInfo
*guest_info
)
1054 AcpiSystemResourceAffinityTable
*srat
;
1055 AcpiSratProcessorAffinity
*core
;
1056 AcpiSratMemoryAffinity
*numamem
;
1060 int srat_start
, numa_start
, slots
;
1061 uint64_t mem_len
, mem_base
, next_base
;
1062 PCMachineState
*pcms
= PC_MACHINE(qdev_get_machine());
1063 ram_addr_t hotplugabble_address_space_size
=
1064 object_property_get_int(OBJECT(pcms
), PC_MACHINE_MEMHP_REGION_SIZE
,
1067 srat_start
= table_data
->len
;
1069 srat
= acpi_data_push(table_data
, sizeof *srat
);
1070 srat
->reserved1
= cpu_to_le32(1);
1071 core
= (void *)(srat
+ 1);
1073 for (i
= 0; i
< guest_info
->apic_id_limit
; ++i
) {
1074 core
= acpi_data_push(table_data
, sizeof *core
);
1075 core
->type
= ACPI_SRAT_PROCESSOR
;
1076 core
->length
= sizeof(*core
);
1077 core
->local_apic_id
= i
;
1078 curnode
= guest_info
->node_cpu
[i
];
1079 core
->proximity_lo
= curnode
;
1080 memset(core
->proximity_hi
, 0, 3);
1081 core
->local_sapic_eid
= 0;
1082 core
->flags
= cpu_to_le32(1);
1086 /* the memory map is a bit tricky, it contains at least one hole
1087 * from 640k-1M and possibly another one from 3.5G-4G.
1090 numa_start
= table_data
->len
;
1092 numamem
= acpi_data_push(table_data
, sizeof *numamem
);
1093 acpi_build_srat_memory(numamem
, 0, 640*1024, 0, MEM_AFFINITY_ENABLED
);
1094 next_base
= 1024 * 1024;
1095 for (i
= 1; i
< guest_info
->numa_nodes
+ 1; ++i
) {
1096 mem_base
= next_base
;
1097 mem_len
= guest_info
->node_mem
[i
- 1];
1099 mem_len
-= 1024 * 1024;
1101 next_base
= mem_base
+ mem_len
;
1103 /* Cut out the ACPI_PCI hole */
1104 if (mem_base
<= guest_info
->ram_size_below_4g
&&
1105 next_base
> guest_info
->ram_size_below_4g
) {
1106 mem_len
-= next_base
- guest_info
->ram_size_below_4g
;
1108 numamem
= acpi_data_push(table_data
, sizeof *numamem
);
1109 acpi_build_srat_memory(numamem
, mem_base
, mem_len
, i
- 1,
1110 MEM_AFFINITY_ENABLED
);
1112 mem_base
= 1ULL << 32;
1113 mem_len
= next_base
- guest_info
->ram_size_below_4g
;
1114 next_base
+= (1ULL << 32) - guest_info
->ram_size_below_4g
;
1116 numamem
= acpi_data_push(table_data
, sizeof *numamem
);
1117 acpi_build_srat_memory(numamem
, mem_base
, mem_len
, i
- 1,
1118 MEM_AFFINITY_ENABLED
);
1120 slots
= (table_data
->len
- numa_start
) / sizeof *numamem
;
1121 for (; slots
< guest_info
->numa_nodes
+ 2; slots
++) {
1122 numamem
= acpi_data_push(table_data
, sizeof *numamem
);
1123 acpi_build_srat_memory(numamem
, 0, 0, 0, MEM_AFFINITY_NOFLAGS
);
1127 * Entry is required for Windows to enable memory hotplug in OS.
1128 * Memory devices may override proximity set by this entry,
1129 * providing _PXM method if necessary.
1131 if (hotplugabble_address_space_size
) {
1132 numamem
= acpi_data_push(table_data
, sizeof *numamem
);
1133 acpi_build_srat_memory(numamem
, pcms
->hotplug_memory_base
,
1134 hotplugabble_address_space_size
, 0,
1135 MEM_AFFINITY_HOTPLUGGABLE
|
1136 MEM_AFFINITY_ENABLED
);
1139 build_header(linker
, table_data
,
1140 (void *)(table_data
->data
+ srat_start
),
1142 table_data
->len
- srat_start
, 1);
1146 build_mcfg_q35(GArray
*table_data
, GArray
*linker
, AcpiMcfgInfo
*info
)
1148 AcpiTableMcfg
*mcfg
;
1150 int len
= sizeof(*mcfg
) + 1 * sizeof(mcfg
->allocation
[0]);
1152 mcfg
= acpi_data_push(table_data
, len
);
1153 mcfg
->allocation
[0].address
= cpu_to_le64(info
->mcfg_base
);
1154 /* Only a single allocation so no need to play with segments */
1155 mcfg
->allocation
[0].pci_segment
= cpu_to_le16(0);
1156 mcfg
->allocation
[0].start_bus_number
= 0;
1157 mcfg
->allocation
[0].end_bus_number
= PCIE_MMCFG_BUS(info
->mcfg_size
- 1);
1159 /* MCFG is used for ECAM which can be enabled or disabled by guest.
1160 * To avoid table size changes (which create migration issues),
1161 * always create the table even if there are no allocations,
1162 * but set the signature to a reserved value in this case.
1163 * ACPI spec requires OSPMs to ignore such tables.
1165 if (info
->mcfg_base
== PCIE_BASE_ADDR_UNMAPPED
) {
1166 /* Reserved signature: ignored by OSPM */
1171 build_header(linker
, table_data
, (void *)mcfg
, sig
, len
, 1);
1175 build_dmar_q35(GArray
*table_data
, GArray
*linker
)
1177 int dmar_start
= table_data
->len
;
1179 AcpiTableDmar
*dmar
;
1180 AcpiDmarHardwareUnit
*drhd
;
1182 dmar
= acpi_data_push(table_data
, sizeof(*dmar
));
1183 dmar
->host_address_width
= VTD_HOST_ADDRESS_WIDTH
- 1;
1184 dmar
->flags
= 0; /* No intr_remap for now */
1186 /* DMAR Remapping Hardware Unit Definition structure */
1187 drhd
= acpi_data_push(table_data
, sizeof(*drhd
));
1188 drhd
->type
= cpu_to_le16(ACPI_DMAR_TYPE_HARDWARE_UNIT
);
1189 drhd
->length
= cpu_to_le16(sizeof(*drhd
)); /* No device scope now */
1190 drhd
->flags
= ACPI_DMAR_INCLUDE_PCI_ALL
;
1191 drhd
->pci_segment
= cpu_to_le16(0);
1192 drhd
->address
= cpu_to_le64(Q35_HOST_BRIDGE_IOMMU_ADDR
);
1194 build_header(linker
, table_data
, (void *)(table_data
->data
+ dmar_start
),
1195 "DMAR", table_data
->len
- dmar_start
, 1);
1199 build_dsdt(GArray
*table_data
, GArray
*linker
, AcpiMiscInfo
*misc
)
1201 AcpiTableHeader
*dsdt
;
1203 assert(misc
->dsdt_code
&& misc
->dsdt_size
);
1205 dsdt
= acpi_data_push(table_data
, misc
->dsdt_size
);
1206 memcpy(dsdt
, misc
->dsdt_code
, misc
->dsdt_size
);
1208 memset(dsdt
, 0, sizeof *dsdt
);
1209 build_header(linker
, table_data
, dsdt
, "DSDT",
1210 misc
->dsdt_size
, 1);
1213 /* Build final rsdt table */
1215 build_rsdt(GArray
*table_data
, GArray
*linker
, GArray
*table_offsets
)
1217 AcpiRsdtDescriptorRev1
*rsdt
;
1221 rsdt_len
= sizeof(*rsdt
) + sizeof(uint32_t) * table_offsets
->len
;
1222 rsdt
= acpi_data_push(table_data
, rsdt_len
);
1223 memcpy(rsdt
->table_offset_entry
, table_offsets
->data
,
1224 sizeof(uint32_t) * table_offsets
->len
);
1225 for (i
= 0; i
< table_offsets
->len
; ++i
) {
1226 /* rsdt->table_offset_entry to be filled by Guest linker */
1227 bios_linker_loader_add_pointer(linker
,
1228 ACPI_BUILD_TABLE_FILE
,
1229 ACPI_BUILD_TABLE_FILE
,
1230 table_data
, &rsdt
->table_offset_entry
[i
],
1233 build_header(linker
, table_data
,
1234 (void *)rsdt
, "RSDT", rsdt_len
, 1);
1238 build_rsdp(GArray
*rsdp_table
, GArray
*linker
, unsigned rsdt
)
1240 AcpiRsdpDescriptor
*rsdp
= acpi_data_push(rsdp_table
, sizeof *rsdp
);
1242 bios_linker_loader_alloc(linker
, ACPI_BUILD_RSDP_FILE
, 16,
1243 true /* fseg memory */);
1245 memcpy(&rsdp
->signature
, "RSD PTR ", 8);
1246 memcpy(rsdp
->oem_id
, ACPI_BUILD_APPNAME6
, 6);
1247 rsdp
->rsdt_physical_address
= cpu_to_le32(rsdt
);
1248 /* Address to be filled by Guest linker */
1249 bios_linker_loader_add_pointer(linker
, ACPI_BUILD_RSDP_FILE
,
1250 ACPI_BUILD_TABLE_FILE
,
1251 rsdp_table
, &rsdp
->rsdt_physical_address
,
1252 sizeof rsdp
->rsdt_physical_address
);
1254 /* Checksum to be filled by Guest linker */
1255 bios_linker_loader_add_checksum(linker
, ACPI_BUILD_RSDP_FILE
,
1256 rsdp
, rsdp
, sizeof *rsdp
, &rsdp
->checksum
);
1262 struct AcpiBuildState
{
1263 /* Copy of table in RAM (for patching). */
1264 ram_addr_t table_ram
;
1265 /* Is table patched? */
1267 PcGuestInfo
*guest_info
;
1269 ram_addr_t rsdp_ram
;
1270 ram_addr_t linker_ram
;
1273 static bool acpi_get_mcfg(AcpiMcfgInfo
*mcfg
)
1279 pci_host
= object_resolve_path_type("", TYPE_PCI_HOST_BRIDGE
, &ambiguous
);
1280 g_assert(!ambiguous
);
1283 o
= object_property_get_qobject(pci_host
, PCIE_HOST_MCFG_BASE
, NULL
);
1287 mcfg
->mcfg_base
= qint_get_int(qobject_to_qint(o
));
1290 o
= object_property_get_qobject(pci_host
, PCIE_HOST_MCFG_SIZE
, NULL
);
1292 mcfg
->mcfg_size
= qint_get_int(qobject_to_qint(o
));
1297 static bool acpi_has_iommu(void)
1300 Object
*intel_iommu
;
1302 intel_iommu
= object_resolve_path_type("", TYPE_INTEL_IOMMU_DEVICE
,
1304 return intel_iommu
&& !ambiguous
;
1308 void acpi_build(PcGuestInfo
*guest_info
, AcpiBuildTables
*tables
)
1310 GArray
*table_offsets
;
1311 unsigned facs
, ssdt
, dsdt
, rsdt
;
1319 GArray
*tables_blob
= tables
->table_data
;
1321 acpi_get_cpu_info(&cpu
);
1322 acpi_get_pm_info(&pm
);
1323 acpi_get_dsdt(&misc
);
1324 acpi_get_misc_info(&misc
);
1325 acpi_get_pci_info(&pci
);
1327 table_offsets
= g_array_new(false, true /* clear */,
1329 ACPI_BUILD_DPRINTF("init ACPI tables\n");
1331 bios_linker_loader_alloc(tables
->linker
, ACPI_BUILD_TABLE_FILE
,
1332 64 /* Ensure FACS is aligned */,
1333 false /* high memory */);
1336 * FACS is pointed to by FADT.
1337 * We place it first since it's the only table that has alignment
1340 facs
= tables_blob
->len
;
1341 build_facs(tables_blob
, tables
->linker
, guest_info
);
1343 /* DSDT is pointed to by FADT */
1344 dsdt
= tables_blob
->len
;
1345 build_dsdt(tables_blob
, tables
->linker
, &misc
);
1347 /* Count the size of the DSDT and SSDT, we will need it for legacy
1348 * sizing of ACPI tables.
1350 aml_len
+= tables_blob
->len
- dsdt
;
1352 /* ACPI tables pointed to by RSDT */
1353 acpi_add_table(table_offsets
, tables_blob
);
1354 build_fadt(tables_blob
, tables
->linker
, &pm
, facs
, dsdt
);
1356 ssdt
= tables_blob
->len
;
1357 acpi_add_table(table_offsets
, tables_blob
);
1358 build_ssdt(tables_blob
, tables
->linker
, &cpu
, &pm
, &misc
, &pci
,
1360 aml_len
+= tables_blob
->len
- ssdt
;
1362 acpi_add_table(table_offsets
, tables_blob
);
1363 build_madt(tables_blob
, tables
->linker
, &cpu
, guest_info
);
1365 if (misc
.has_hpet
) {
1366 acpi_add_table(table_offsets
, tables_blob
);
1367 build_hpet(tables_blob
, tables
->linker
);
1370 acpi_add_table(table_offsets
, tables_blob
);
1371 build_tpm_tcpa(tables_blob
, tables
->linker
, tables
->tcpalog
);
1373 acpi_add_table(table_offsets
, tables_blob
);
1374 build_tpm_ssdt(tables_blob
, tables
->linker
);
1376 if (guest_info
->numa_nodes
) {
1377 acpi_add_table(table_offsets
, tables_blob
);
1378 build_srat(tables_blob
, tables
->linker
, guest_info
);
1380 if (acpi_get_mcfg(&mcfg
)) {
1381 acpi_add_table(table_offsets
, tables_blob
);
1382 build_mcfg_q35(tables_blob
, tables
->linker
, &mcfg
);
1384 if (acpi_has_iommu()) {
1385 acpi_add_table(table_offsets
, tables_blob
);
1386 build_dmar_q35(tables_blob
, tables
->linker
);
1389 /* Add tables supplied by user (if any) */
1390 for (u
= acpi_table_first(); u
; u
= acpi_table_next(u
)) {
1391 unsigned len
= acpi_table_len(u
);
1393 acpi_add_table(table_offsets
, tables_blob
);
1394 g_array_append_vals(tables_blob
, u
, len
);
1397 /* RSDT is pointed to by RSDP */
1398 rsdt
= tables_blob
->len
;
1399 build_rsdt(tables_blob
, tables
->linker
, table_offsets
);
1401 /* RSDP is in FSEG memory, so allocate it separately */
1402 build_rsdp(tables
->rsdp
, tables
->linker
, rsdt
);
1404 /* We'll expose it all to Guest so we want to reduce
1405 * chance of size changes.
1407 * We used to align the tables to 4k, but of course this would
1408 * too simple to be enough. 4k turned out to be too small an
1409 * alignment very soon, and in fact it is almost impossible to
1410 * keep the table size stable for all (max_cpus, max_memory_slots)
1411 * combinations. So the table size is always 64k for pc-i440fx-2.1
1412 * and we give an error if the table grows beyond that limit.
1414 * We still have the problem of migrating from "-M pc-i440fx-2.0". For
1415 * that, we exploit the fact that QEMU 2.1 generates _smaller_ tables
1416 * than 2.0 and we can always pad the smaller tables with zeros. We can
1417 * then use the exact size of the 2.0 tables.
1419 * All this is for PIIX4, since QEMU 2.0 didn't support Q35 migration.
1421 if (guest_info
->legacy_acpi_table_size
) {
1422 /* Subtracting aml_len gives the size of fixed tables. Then add the
1423 * size of the PIIX4 DSDT/SSDT in QEMU 2.0.
1425 int legacy_aml_len
=
1426 guest_info
->legacy_acpi_table_size
+
1427 ACPI_BUILD_LEGACY_CPU_AML_SIZE
* max_cpus
;
1428 int legacy_table_size
=
1429 ROUND_UP(tables_blob
->len
- aml_len
+ legacy_aml_len
,
1430 ACPI_BUILD_ALIGN_SIZE
);
1431 if (tables_blob
->len
> legacy_table_size
) {
1432 /* Should happen only with PCI bridges and -M pc-i440fx-2.0. */
1433 error_report("Warning: migration may not work.");
1435 g_array_set_size(tables_blob
, legacy_table_size
);
1437 /* Make sure we have a buffer in case we need to resize the tables. */
1438 if (tables_blob
->len
> ACPI_BUILD_TABLE_SIZE
/ 2) {
1439 /* As of QEMU 2.1, this fires with 160 VCPUs and 255 memory slots. */
1440 error_report("Warning: ACPI tables are larger than 64k.");
1441 error_report("Warning: migration may not work.");
1442 error_report("Warning: please remove CPUs, NUMA nodes, "
1443 "memory slots or PCI bridges.");
1445 acpi_align_size(tables_blob
, ACPI_BUILD_TABLE_SIZE
);
1448 acpi_align_size(tables
->linker
, ACPI_BUILD_ALIGN_SIZE
);
1450 /* Cleanup memory that's no longer used. */
1451 g_array_free(table_offsets
, true);
1454 static void acpi_ram_update(ram_addr_t ram
, GArray
*data
)
1456 uint32_t size
= acpi_data_len(data
);
1458 /* Make sure RAM size is correct - in case it got changed e.g. by migration */
1459 qemu_ram_resize(ram
, size
, &error_abort
);
1461 memcpy(qemu_get_ram_ptr(ram
), data
->data
, size
);
1462 cpu_physical_memory_set_dirty_range_nocode(ram
, size
);
1465 static void acpi_build_update(void *build_opaque
, uint32_t offset
)
1467 AcpiBuildState
*build_state
= build_opaque
;
1468 AcpiBuildTables tables
;
1470 /* No state to update or already patched? Nothing to do. */
1471 if (!build_state
|| build_state
->patched
) {
1474 build_state
->patched
= 1;
1476 acpi_build_tables_init(&tables
);
1478 acpi_build(build_state
->guest_info
, &tables
);
1480 acpi_ram_update(build_state
->table_ram
, tables
.table_data
);
1482 if (build_state
->rsdp
) {
1483 memcpy(build_state
->rsdp
, tables
.rsdp
->data
, acpi_data_len(tables
.rsdp
));
1485 acpi_ram_update(build_state
->rsdp_ram
, tables
.rsdp
);
1488 acpi_ram_update(build_state
->linker_ram
, tables
.linker
);
1489 acpi_build_tables_cleanup(&tables
, true);
1492 static void acpi_build_reset(void *build_opaque
)
1494 AcpiBuildState
*build_state
= build_opaque
;
1495 build_state
->patched
= 0;
1498 static ram_addr_t
acpi_add_rom_blob(AcpiBuildState
*build_state
, GArray
*blob
,
1499 const char *name
, uint64_t max_size
)
1501 return rom_add_blob(name
, blob
->data
, acpi_data_len(blob
), max_size
, -1,
1502 name
, acpi_build_update
, build_state
);
1505 static const VMStateDescription vmstate_acpi_build
= {
1506 .name
= "acpi_build",
1508 .minimum_version_id
= 1,
1509 .fields
= (VMStateField
[]) {
1510 VMSTATE_UINT8(patched
, AcpiBuildState
),
1511 VMSTATE_END_OF_LIST()
1515 void acpi_setup(PcGuestInfo
*guest_info
)
1517 AcpiBuildTables tables
;
1518 AcpiBuildState
*build_state
;
1520 if (!guest_info
->fw_cfg
) {
1521 ACPI_BUILD_DPRINTF("No fw cfg. Bailing out.\n");
1525 if (!guest_info
->has_acpi_build
) {
1526 ACPI_BUILD_DPRINTF("ACPI build disabled. Bailing out.\n");
1530 if (!acpi_enabled
) {
1531 ACPI_BUILD_DPRINTF("ACPI disabled. Bailing out.\n");
1535 build_state
= g_malloc0(sizeof *build_state
);
1537 build_state
->guest_info
= guest_info
;
1539 acpi_set_pci_info();
1541 acpi_build_tables_init(&tables
);
1542 acpi_build(build_state
->guest_info
, &tables
);
1544 /* Now expose it all to Guest */
1545 build_state
->table_ram
= acpi_add_rom_blob(build_state
, tables
.table_data
,
1546 ACPI_BUILD_TABLE_FILE
,
1547 ACPI_BUILD_TABLE_MAX_SIZE
);
1548 assert(build_state
->table_ram
!= RAM_ADDR_MAX
);
1550 build_state
->linker_ram
=
1551 acpi_add_rom_blob(build_state
, tables
.linker
, "etc/table-loader", 0);
1553 fw_cfg_add_file(guest_info
->fw_cfg
, ACPI_BUILD_TPMLOG_FILE
,
1554 tables
.tcpalog
->data
, acpi_data_len(tables
.tcpalog
));
1556 if (!guest_info
->rsdp_in_ram
) {
1558 * Keep for compatibility with old machine types.
1559 * Though RSDP is small, its contents isn't immutable, so
1560 * we'll update it along with the rest of tables on guest access.
1562 uint32_t rsdp_size
= acpi_data_len(tables
.rsdp
);
1564 build_state
->rsdp
= g_memdup(tables
.rsdp
->data
, rsdp_size
);
1565 fw_cfg_add_file_callback(guest_info
->fw_cfg
, ACPI_BUILD_RSDP_FILE
,
1566 acpi_build_update
, build_state
,
1567 build_state
->rsdp
, rsdp_size
);
1568 build_state
->rsdp_ram
= (ram_addr_t
)-1;
1570 build_state
->rsdp
= NULL
;
1571 build_state
->rsdp_ram
= acpi_add_rom_blob(build_state
, tables
.rsdp
,
1572 ACPI_BUILD_RSDP_FILE
, 0);
1575 qemu_register_reset(acpi_build_reset
, build_state
);
1576 acpi_build_reset(build_state
);
1577 vmstate_register(NULL
, 0, &vmstate_acpi_build
, build_state
);
1579 /* Cleanup tables but don't free the memory: we track it
1582 acpi_build_tables_cleanup(&tables
, false);