include/exec/cpu-common.h

   1 #ifndef CPU_COMMON_H
   2 #define CPU_COMMON_H
   3
   4 /* CPU interfaces that are target independent.  */
   5
   6 #ifndef CONFIG_USER_ONLY
   7 #include "exec/hwaddr.h"
   8 #endif
   9
  10 #include "qemu/bswap.h"
  11 #include "qemu/queue.h"
  12 #include "qemu/fprintf-fn.h"
  13
  14 /**
  15  * CPUListState:
  16  * @cpu_fprintf: Print function.
  17  * @file: File to print to using @cpu_fprint.
  18  *
  19  * State commonly used for iterating over CPU models.
  20  */
  21 typedef struct CPUListState {
  22     fprintf_function cpu_fprintf;
  23     FILE *file;
  24 } CPUListState;
  25
  26 /* The CPU list lock nests outside tb_lock/tb_unlock.  */
  27 void qemu_init_cpu_list(void);
  28 void cpu_list_lock(void);
  29 void cpu_list_unlock(void);
  30
  31 #if !defined(CONFIG_USER_ONLY)
  32
  33 enum device_endian {
  34     DEVICE_NATIVE_ENDIAN,
  35     DEVICE_BIG_ENDIAN,
  36     DEVICE_LITTLE_ENDIAN,
  37 };
  38
  39 /* address in the RAM (different from a physical address) */
  40 #if defined(CONFIG_XEN_BACKEND)
  41 typedef uint64_t ram_addr_t;
  42 #  define RAM_ADDR_MAX UINT64_MAX
  43 #  define RAM_ADDR_FMT "%" PRIx64
  44 #else
  45 typedef uintptr_t ram_addr_t;
  46 #  define RAM_ADDR_MAX UINTPTR_MAX
  47 #  define RAM_ADDR_FMT "%" PRIxPTR
  48 #endif
  49
  50 extern ram_addr_t ram_size;
  51
  52 /* memory API */
  53
  54 typedef void CPUWriteMemoryFunc(void *opaque, hwaddr addr, uint32_t value);
  55 typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);
  56
  57 void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
  58 /* This should not be used by devices.  */
  59 ram_addr_t qemu_ram_addr_from_host(void *ptr);
  60 RAMBlock *qemu_ram_block_by_name(const char *name);
  61 RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
  62                                    ram_addr_t *offset);
  63 void qemu_ram_set_idstr(RAMBlock *block, const char *name, DeviceState *dev);
  64 void qemu_ram_unset_idstr(RAMBlock *block);
  65 const char *qemu_ram_get_idstr(RAMBlock *rb);
  66 size_t qemu_ram_pagesize(RAMBlock *block);
  67
  68 void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
  69                             int len, int is_write);
  70 static inline void cpu_physical_memory_read(hwaddr addr,
  71                                             void *buf, int len)
  72 {
  73     cpu_physical_memory_rw(addr, buf, len, 0);
  74 }
  75 static inline void cpu_physical_memory_write(hwaddr addr,
  76                                              const void *buf, int len)
  77 {
  78     cpu_physical_memory_rw(addr, (void *)buf, len, 1);
  79 }
  80 void *cpu_physical_memory_map(hwaddr addr,
  81                               hwaddr *plen,
  82                               int is_write);
  83 void cpu_physical_memory_unmap(void *buffer, hwaddr len,
  84                                int is_write, hwaddr access_len);
  85 void cpu_register_map_client(QEMUBH *bh);
  86 void cpu_unregister_map_client(QEMUBH *bh);
  87
  88 bool cpu_physical_memory_is_io(hwaddr phys_addr);
  89
  90 /* Coalesced MMIO regions are areas where write operations can be reordered.
  91  * This usually implies that write operations are side-effect free.  This allows
  92  * batching which can make a major impact on performance when using
  93  * virtualization.
  94  */
  95 void qemu_flush_coalesced_mmio_buffer(void);
  96
  97 void cpu_physical_memory_write_rom(AddressSpace *as, hwaddr addr,
  98                                    const uint8_t *buf, int len);
  99 void cpu_flush_icache_range(hwaddr start, int len);
 100
 101 extern struct MemoryRegion io_mem_rom;
 102 extern struct MemoryRegion io_mem_notdirty;
 103
 104 typedef int (RAMBlockIterFunc)(const char *block_name, void *host_addr,
 105     ram_addr_t offset, ram_addr_t length, void *opaque);
 106
 107 int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque);
 108
 109 #endif
 110
 111 #endif /* CPU_COMMON_H */