accel/tcg: Restrict tb_gen_code() from other accelerators
[qemu/ar7.git] / accel / tcg / cpu-exec.c
blob37d17c8e88caa195197a550e86cce847ef43f6ac
1 /*
2 * emulator main execution loop
4 * Copyright (c) 2003-2005 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qemu/qemu-print.h"
23 #include "cpu.h"
24 #include "trace.h"
25 #include "disas/disas.h"
26 #include "exec/exec-all.h"
27 #include "tcg/tcg.h"
28 #include "qemu/atomic.h"
29 #include "qemu/compiler.h"
30 #include "sysemu/qtest.h"
31 #include "qemu/timer.h"
32 #include "qemu/rcu.h"
33 #include "exec/tb-hash.h"
34 #include "exec/tb-lookup.h"
35 #include "exec/log.h"
36 #include "qemu/main-loop.h"
37 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
38 #include "hw/i386/apic.h"
39 #endif
40 #include "sysemu/cpus.h"
41 #include "exec/cpu-all.h"
42 #include "sysemu/cpu-timers.h"
43 #include "sysemu/replay.h"
44 #include "internal.h"
46 /* -icount align implementation. */
48 typedef struct SyncClocks {
49 int64_t diff_clk;
50 int64_t last_cpu_icount;
51 int64_t realtime_clock;
52 } SyncClocks;
54 #if !defined(CONFIG_USER_ONLY)
55 /* Allow the guest to have a max 3ms advance.
56 * The difference between the 2 clocks could therefore
57 * oscillate around 0.
59 #define VM_CLOCK_ADVANCE 3000000
60 #define THRESHOLD_REDUCE 1.5
61 #define MAX_DELAY_PRINT_RATE 2000000000LL
62 #define MAX_NB_PRINTS 100
64 static int64_t max_delay;
65 static int64_t max_advance;
67 static void align_clocks(SyncClocks *sc, CPUState *cpu)
69 int64_t cpu_icount;
71 if (!icount_align_option) {
72 return;
75 cpu_icount = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
76 sc->diff_clk += icount_to_ns(sc->last_cpu_icount - cpu_icount);
77 sc->last_cpu_icount = cpu_icount;
79 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
80 #ifndef _WIN32
81 struct timespec sleep_delay, rem_delay;
82 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
83 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
84 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
85 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
86 } else {
87 sc->diff_clk = 0;
89 #else
90 Sleep(sc->diff_clk / SCALE_MS);
91 sc->diff_clk = 0;
92 #endif
96 static void print_delay(const SyncClocks *sc)
98 static float threshold_delay;
99 static int64_t last_realtime_clock;
100 static int nb_prints;
102 if (icount_align_option &&
103 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
104 nb_prints < MAX_NB_PRINTS) {
105 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
106 (-sc->diff_clk / (float)1000000000LL <
107 (threshold_delay - THRESHOLD_REDUCE))) {
108 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
109 qemu_printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
110 threshold_delay - 1,
111 threshold_delay);
112 nb_prints++;
113 last_realtime_clock = sc->realtime_clock;
118 static void init_delay_params(SyncClocks *sc, CPUState *cpu)
120 if (!icount_align_option) {
121 return;
123 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
124 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
125 sc->last_cpu_icount
126 = cpu->icount_extra + cpu_neg(cpu)->icount_decr.u16.low;
127 if (sc->diff_clk < max_delay) {
128 max_delay = sc->diff_clk;
130 if (sc->diff_clk > max_advance) {
131 max_advance = sc->diff_clk;
134 /* Print every 2s max if the guest is late. We limit the number
135 of printed messages to NB_PRINT_MAX(currently 100) */
136 print_delay(sc);
138 #else
139 static void align_clocks(SyncClocks *sc, const CPUState *cpu)
143 static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
146 #endif /* CONFIG USER ONLY */
148 /* Execute a TB, and fix up the CPU state afterwards if necessary */
150 * Disable CFI checks.
151 * TCG creates binary blobs at runtime, with the transformed code.
152 * A TB is a blob of binary code, created at runtime and called with an
153 * indirect function call. Since such function did not exist at compile time,
154 * the CFI runtime has no way to verify its signature and would fail.
155 * TCG is not considered a security-sensitive part of QEMU so this does not
156 * affect the impact of CFI in environment with high security requirements
158 static inline TranslationBlock * QEMU_DISABLE_CFI
159 cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit)
161 CPUArchState *env = cpu->env_ptr;
162 uintptr_t ret;
163 TranslationBlock *last_tb;
164 const void *tb_ptr = itb->tc.ptr;
166 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
167 "Trace %d: %p ["
168 TARGET_FMT_lx "/" TARGET_FMT_lx "/%#x] %s\n",
169 cpu->cpu_index, itb->tc.ptr,
170 itb->cs_base, itb->pc, itb->flags,
171 lookup_symbol(itb->pc));
173 #if defined(DEBUG_DISAS)
174 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
175 && qemu_log_in_addr_range(itb->pc)) {
176 FILE *logfile = qemu_log_lock();
177 int flags = 0;
178 if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) {
179 flags |= CPU_DUMP_FPU;
181 #if defined(TARGET_I386)
182 flags |= CPU_DUMP_CCOP;
183 #endif
184 log_cpu_state(cpu, flags);
185 qemu_log_unlock(logfile);
187 #endif /* DEBUG_DISAS */
189 ret = tcg_qemu_tb_exec(env, tb_ptr);
190 cpu->can_do_io = 1;
192 * TODO: Delay swapping back to the read-write region of the TB
193 * until we actually need to modify the TB. The read-only copy,
194 * coming from the rx region, shares the same host TLB entry as
195 * the code that executed the exit_tb opcode that arrived here.
196 * If we insist on touching both the RX and the RW pages, we
197 * double the host TLB pressure.
199 last_tb = tcg_splitwx_to_rw((void *)(ret & ~TB_EXIT_MASK));
200 *tb_exit = ret & TB_EXIT_MASK;
202 trace_exec_tb_exit(last_tb, *tb_exit);
204 if (*tb_exit > TB_EXIT_IDX1) {
205 /* We didn't start executing this TB (eg because the instruction
206 * counter hit zero); we must restore the guest PC to the address
207 * of the start of the TB.
209 CPUClass *cc = CPU_GET_CLASS(cpu);
210 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
211 "Stopped execution of TB chain before %p ["
212 TARGET_FMT_lx "] %s\n",
213 last_tb->tc.ptr, last_tb->pc,
214 lookup_symbol(last_tb->pc));
215 if (cc->synchronize_from_tb) {
216 cc->synchronize_from_tb(cpu, last_tb);
217 } else {
218 assert(cc->set_pc);
219 cc->set_pc(cpu, last_tb->pc);
222 return last_tb;
225 #ifndef CONFIG_USER_ONLY
226 /* Execute the code without caching the generated code. An interpreter
227 could be used if available. */
228 static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
229 TranslationBlock *orig_tb, bool ignore_icount)
231 TranslationBlock *tb;
232 uint32_t cflags = curr_cflags() | CF_NOCACHE;
233 int tb_exit;
235 if (ignore_icount) {
236 cflags &= ~CF_USE_ICOUNT;
239 /* Should never happen.
240 We only end up here when an existing TB is too long. */
241 cflags |= MIN(max_cycles, CF_COUNT_MASK);
243 mmap_lock();
244 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base,
245 orig_tb->flags, cflags);
246 tb->orig_tb = orig_tb;
247 mmap_unlock();
249 /* execute the generated code */
250 trace_exec_tb_nocache(tb, tb->pc);
251 cpu_tb_exec(cpu, tb, &tb_exit);
253 mmap_lock();
254 tb_phys_invalidate(tb, -1);
255 mmap_unlock();
256 tcg_tb_remove(tb);
258 #endif
260 static void cpu_exec_enter(CPUState *cpu)
262 CPUClass *cc = CPU_GET_CLASS(cpu);
264 if (cc->cpu_exec_enter) {
265 cc->cpu_exec_enter(cpu);
269 static void cpu_exec_exit(CPUState *cpu)
271 CPUClass *cc = CPU_GET_CLASS(cpu);
273 if (cc->cpu_exec_exit) {
274 cc->cpu_exec_exit(cpu);
278 void cpu_exec_step_atomic(CPUState *cpu)
280 TranslationBlock *tb;
281 target_ulong cs_base, pc;
282 uint32_t flags;
283 uint32_t cflags = 1;
284 uint32_t cf_mask = cflags & CF_HASH_MASK;
285 int tb_exit;
287 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
288 start_exclusive();
289 g_assert(cpu == current_cpu);
290 g_assert(!cpu->running);
291 cpu->running = true;
293 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
294 if (tb == NULL) {
295 mmap_lock();
296 tb = tb_gen_code(cpu, pc, cs_base, flags, cflags);
297 mmap_unlock();
300 /* Since we got here, we know that parallel_cpus must be true. */
301 parallel_cpus = false;
302 cpu_exec_enter(cpu);
303 /* execute the generated code */
304 trace_exec_tb(tb, pc);
305 cpu_tb_exec(cpu, tb, &tb_exit);
306 cpu_exec_exit(cpu);
307 } else {
309 * The mmap_lock is dropped by tb_gen_code if it runs out of
310 * memory.
312 #ifndef CONFIG_SOFTMMU
313 tcg_debug_assert(!have_mmap_lock());
314 #endif
315 if (qemu_mutex_iothread_locked()) {
316 qemu_mutex_unlock_iothread();
318 assert_no_pages_locked();
319 qemu_plugin_disable_mem_helpers(cpu);
324 * As we start the exclusive region before codegen we must still
325 * be in the region if we longjump out of either the codegen or
326 * the execution.
328 g_assert(cpu_in_exclusive_context(cpu));
329 parallel_cpus = true;
330 cpu->running = false;
331 end_exclusive();
334 struct tb_desc {
335 target_ulong pc;
336 target_ulong cs_base;
337 CPUArchState *env;
338 tb_page_addr_t phys_page1;
339 uint32_t flags;
340 uint32_t cf_mask;
341 uint32_t trace_vcpu_dstate;
344 static bool tb_lookup_cmp(const void *p, const void *d)
346 const TranslationBlock *tb = p;
347 const struct tb_desc *desc = d;
349 if (tb->pc == desc->pc &&
350 tb->page_addr[0] == desc->phys_page1 &&
351 tb->cs_base == desc->cs_base &&
352 tb->flags == desc->flags &&
353 tb->trace_vcpu_dstate == desc->trace_vcpu_dstate &&
354 (tb_cflags(tb) & (CF_HASH_MASK | CF_INVALID)) == desc->cf_mask) {
355 /* check next page if needed */
356 if (tb->page_addr[1] == -1) {
357 return true;
358 } else {
359 tb_page_addr_t phys_page2;
360 target_ulong virt_page2;
362 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
363 phys_page2 = get_page_addr_code(desc->env, virt_page2);
364 if (tb->page_addr[1] == phys_page2) {
365 return true;
369 return false;
372 TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc,
373 target_ulong cs_base, uint32_t flags,
374 uint32_t cf_mask)
376 tb_page_addr_t phys_pc;
377 struct tb_desc desc;
378 uint32_t h;
380 desc.env = (CPUArchState *)cpu->env_ptr;
381 desc.cs_base = cs_base;
382 desc.flags = flags;
383 desc.cf_mask = cf_mask;
384 desc.trace_vcpu_dstate = *cpu->trace_dstate;
385 desc.pc = pc;
386 phys_pc = get_page_addr_code(desc.env, pc);
387 if (phys_pc == -1) {
388 return NULL;
390 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
391 h = tb_hash_func(phys_pc, pc, flags, cf_mask, *cpu->trace_dstate);
392 return qht_lookup_custom(&tb_ctx.htable, &desc, h, tb_lookup_cmp);
395 void tb_set_jmp_target(TranslationBlock *tb, int n, uintptr_t addr)
397 if (TCG_TARGET_HAS_direct_jump) {
398 uintptr_t offset = tb->jmp_target_arg[n];
399 uintptr_t tc_ptr = (uintptr_t)tb->tc.ptr;
400 uintptr_t jmp_rx = tc_ptr + offset;
401 uintptr_t jmp_rw = jmp_rx - tcg_splitwx_diff;
402 tb_target_set_jmp_target(tc_ptr, jmp_rx, jmp_rw, addr);
403 } else {
404 tb->jmp_target_arg[n] = addr;
408 static inline void tb_add_jump(TranslationBlock *tb, int n,
409 TranslationBlock *tb_next)
411 uintptr_t old;
413 assert(n < ARRAY_SIZE(tb->jmp_list_next));
414 qemu_spin_lock(&tb_next->jmp_lock);
416 /* make sure the destination TB is valid */
417 if (tb_next->cflags & CF_INVALID) {
418 goto out_unlock_next;
420 /* Atomically claim the jump destination slot only if it was NULL */
421 old = qatomic_cmpxchg(&tb->jmp_dest[n], (uintptr_t)NULL,
422 (uintptr_t)tb_next);
423 if (old) {
424 goto out_unlock_next;
427 /* patch the native jump address */
428 tb_set_jmp_target(tb, n, (uintptr_t)tb_next->tc.ptr);
430 /* add in TB jmp list */
431 tb->jmp_list_next[n] = tb_next->jmp_list_head;
432 tb_next->jmp_list_head = (uintptr_t)tb | n;
434 qemu_spin_unlock(&tb_next->jmp_lock);
436 qemu_log_mask_and_addr(CPU_LOG_EXEC, tb->pc,
437 "Linking TBs %p [" TARGET_FMT_lx
438 "] index %d -> %p [" TARGET_FMT_lx "]\n",
439 tb->tc.ptr, tb->pc, n,
440 tb_next->tc.ptr, tb_next->pc);
441 return;
443 out_unlock_next:
444 qemu_spin_unlock(&tb_next->jmp_lock);
445 return;
448 static inline TranslationBlock *tb_find(CPUState *cpu,
449 TranslationBlock *last_tb,
450 int tb_exit, uint32_t cf_mask)
452 TranslationBlock *tb;
453 target_ulong cs_base, pc;
454 uint32_t flags;
456 tb = tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask);
457 if (tb == NULL) {
458 mmap_lock();
459 tb = tb_gen_code(cpu, pc, cs_base, flags, cf_mask);
460 mmap_unlock();
461 /* We add the TB in the virtual pc hash table for the fast lookup */
462 qatomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
464 #ifndef CONFIG_USER_ONLY
465 /* We don't take care of direct jumps when address mapping changes in
466 * system emulation. So it's not safe to make a direct jump to a TB
467 * spanning two pages because the mapping for the second page can change.
469 if (tb->page_addr[1] != -1) {
470 last_tb = NULL;
472 #endif
473 /* See if we can patch the calling TB. */
474 if (last_tb) {
475 tb_add_jump(last_tb, tb_exit, tb);
477 return tb;
480 static inline bool cpu_handle_halt(CPUState *cpu)
482 if (cpu->halted) {
483 #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
484 if (cpu->interrupt_request & CPU_INTERRUPT_POLL) {
485 X86CPU *x86_cpu = X86_CPU(cpu);
486 qemu_mutex_lock_iothread();
487 apic_poll_irq(x86_cpu->apic_state);
488 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
489 qemu_mutex_unlock_iothread();
491 #endif
492 if (!cpu_has_work(cpu)) {
493 return true;
496 cpu->halted = 0;
499 return false;
502 static inline void cpu_handle_debug_exception(CPUState *cpu)
504 CPUClass *cc = CPU_GET_CLASS(cpu);
505 CPUWatchpoint *wp;
507 if (!cpu->watchpoint_hit) {
508 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
509 wp->flags &= ~BP_WATCHPOINT_HIT;
513 if (cc->debug_excp_handler) {
514 cc->debug_excp_handler(cpu);
518 static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
520 if (cpu->exception_index < 0) {
521 #ifndef CONFIG_USER_ONLY
522 if (replay_has_exception()
523 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0) {
524 /* try to cause an exception pending in the log */
525 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0, curr_cflags()), true);
527 #endif
528 if (cpu->exception_index < 0) {
529 return false;
533 if (cpu->exception_index >= EXCP_INTERRUPT) {
534 /* exit request from the cpu execution loop */
535 *ret = cpu->exception_index;
536 if (*ret == EXCP_DEBUG) {
537 cpu_handle_debug_exception(cpu);
539 cpu->exception_index = -1;
540 return true;
541 } else {
542 #if defined(CONFIG_USER_ONLY)
543 /* if user mode only, we simulate a fake exception
544 which will be handled outside the cpu execution
545 loop */
546 #if defined(TARGET_I386)
547 CPUClass *cc = CPU_GET_CLASS(cpu);
548 cc->do_interrupt(cpu);
549 #endif
550 *ret = cpu->exception_index;
551 cpu->exception_index = -1;
552 return true;
553 #else
554 if (replay_exception()) {
555 CPUClass *cc = CPU_GET_CLASS(cpu);
556 qemu_mutex_lock_iothread();
557 cc->do_interrupt(cpu);
558 qemu_mutex_unlock_iothread();
559 cpu->exception_index = -1;
561 if (unlikely(cpu->singlestep_enabled)) {
563 * After processing the exception, ensure an EXCP_DEBUG is
564 * raised when single-stepping so that GDB doesn't miss the
565 * next instruction.
567 *ret = EXCP_DEBUG;
568 cpu_handle_debug_exception(cpu);
569 return true;
571 } else if (!replay_has_interrupt()) {
572 /* give a chance to iothread in replay mode */
573 *ret = EXCP_INTERRUPT;
574 return true;
576 #endif
579 return false;
583 * CPU_INTERRUPT_POLL is a virtual event which gets converted into a
584 * "real" interrupt event later. It does not need to be recorded for
585 * replay purposes.
587 static inline bool need_replay_interrupt(int interrupt_request)
589 #if defined(TARGET_I386)
590 return !(interrupt_request & CPU_INTERRUPT_POLL);
591 #else
592 return true;
593 #endif
596 static inline bool cpu_handle_interrupt(CPUState *cpu,
597 TranslationBlock **last_tb)
599 CPUClass *cc = CPU_GET_CLASS(cpu);
601 /* Clear the interrupt flag now since we're processing
602 * cpu->interrupt_request and cpu->exit_request.
603 * Ensure zeroing happens before reading cpu->exit_request or
604 * cpu->interrupt_request (see also smp_wmb in cpu_exit())
606 qatomic_mb_set(&cpu_neg(cpu)->icount_decr.u16.high, 0);
608 if (unlikely(qatomic_read(&cpu->interrupt_request))) {
609 int interrupt_request;
610 qemu_mutex_lock_iothread();
611 interrupt_request = cpu->interrupt_request;
612 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
613 /* Mask out external interrupts for this step. */
614 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
616 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
617 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
618 cpu->exception_index = EXCP_DEBUG;
619 qemu_mutex_unlock_iothread();
620 return true;
622 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
623 /* Do nothing */
624 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
625 replay_interrupt();
626 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
627 cpu->halted = 1;
628 cpu->exception_index = EXCP_HLT;
629 qemu_mutex_unlock_iothread();
630 return true;
632 #if defined(TARGET_I386)
633 else if (interrupt_request & CPU_INTERRUPT_INIT) {
634 X86CPU *x86_cpu = X86_CPU(cpu);
635 CPUArchState *env = &x86_cpu->env;
636 replay_interrupt();
637 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
638 do_cpu_init(x86_cpu);
639 cpu->exception_index = EXCP_HALTED;
640 qemu_mutex_unlock_iothread();
641 return true;
643 #else
644 else if (interrupt_request & CPU_INTERRUPT_RESET) {
645 replay_interrupt();
646 cpu_reset(cpu);
647 qemu_mutex_unlock_iothread();
648 return true;
650 #endif
651 /* The target hook has 3 exit conditions:
652 False when the interrupt isn't processed,
653 True when it is, and we should restart on a new TB,
654 and via longjmp via cpu_loop_exit. */
655 else {
656 if (cc->cpu_exec_interrupt &&
657 cc->cpu_exec_interrupt(cpu, interrupt_request)) {
658 if (need_replay_interrupt(interrupt_request)) {
659 replay_interrupt();
662 * After processing the interrupt, ensure an EXCP_DEBUG is
663 * raised when single-stepping so that GDB doesn't miss the
664 * next instruction.
666 cpu->exception_index =
667 (cpu->singlestep_enabled ? EXCP_DEBUG : -1);
668 *last_tb = NULL;
670 /* The target hook may have updated the 'cpu->interrupt_request';
671 * reload the 'interrupt_request' value */
672 interrupt_request = cpu->interrupt_request;
674 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
675 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
676 /* ensure that no TB jump will be modified as
677 the program flow was changed */
678 *last_tb = NULL;
681 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
682 qemu_mutex_unlock_iothread();
685 /* Finally, check if we need to exit to the main loop. */
686 if (unlikely(qatomic_read(&cpu->exit_request))
687 || (icount_enabled()
688 && cpu_neg(cpu)->icount_decr.u16.low + cpu->icount_extra == 0)) {
689 qatomic_set(&cpu->exit_request, 0);
690 if (cpu->exception_index == -1) {
691 cpu->exception_index = EXCP_INTERRUPT;
693 return true;
696 return false;
699 static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
700 TranslationBlock **last_tb, int *tb_exit)
702 int32_t insns_left;
704 trace_exec_tb(tb, tb->pc);
705 tb = cpu_tb_exec(cpu, tb, tb_exit);
706 if (*tb_exit != TB_EXIT_REQUESTED) {
707 *last_tb = tb;
708 return;
711 *last_tb = NULL;
712 insns_left = qatomic_read(&cpu_neg(cpu)->icount_decr.u32);
713 if (insns_left < 0) {
714 /* Something asked us to stop executing chained TBs; just
715 * continue round the main loop. Whatever requested the exit
716 * will also have set something else (eg exit_request or
717 * interrupt_request) which will be handled by
718 * cpu_handle_interrupt. cpu_handle_interrupt will also
719 * clear cpu->icount_decr.u16.high.
721 return;
724 /* Instruction counter expired. */
725 assert(icount_enabled());
726 #ifndef CONFIG_USER_ONLY
727 /* Ensure global icount has gone forward */
728 icount_update(cpu);
729 /* Refill decrementer and continue execution. */
730 insns_left = MIN(0xffff, cpu->icount_budget);
731 cpu_neg(cpu)->icount_decr.u16.low = insns_left;
732 cpu->icount_extra = cpu->icount_budget - insns_left;
733 if (!cpu->icount_extra && insns_left < tb->icount) {
734 /* Execute any remaining instructions, then let the main loop
735 * handle the next event.
737 if (insns_left > 0) {
738 cpu_exec_nocache(cpu, insns_left, tb, false);
741 #endif
744 /* main execution loop */
746 int cpu_exec(CPUState *cpu)
748 CPUClass *cc = CPU_GET_CLASS(cpu);
749 int ret;
750 SyncClocks sc = { 0 };
752 /* replay_interrupt may need current_cpu */
753 current_cpu = cpu;
755 if (cpu_handle_halt(cpu)) {
756 return EXCP_HALTED;
759 rcu_read_lock();
761 cpu_exec_enter(cpu);
763 /* Calculate difference between guest clock and host clock.
764 * This delay includes the delay of the last cycle, so
765 * what we have to do is sleep until it is 0. As for the
766 * advance/delay we gain here, we try to fix it next time.
768 init_delay_params(&sc, cpu);
770 /* prepare setjmp context for exception handling */
771 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
772 #if defined(__clang__)
773 /* Some compilers wrongly smash all local variables after
774 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
775 * Reload essential local variables here for those compilers.
776 * Newer versions of gcc would complain about this code (-Wclobbered). */
777 cpu = current_cpu;
778 cc = CPU_GET_CLASS(cpu);
779 #else /* buggy compiler */
780 /* Assert that the compiler does not smash local variables. */
781 g_assert(cpu == current_cpu);
782 g_assert(cc == CPU_GET_CLASS(cpu));
783 #endif /* buggy compiler */
784 #ifndef CONFIG_SOFTMMU
785 tcg_debug_assert(!have_mmap_lock());
786 #endif
787 if (qemu_mutex_iothread_locked()) {
788 qemu_mutex_unlock_iothread();
790 qemu_plugin_disable_mem_helpers(cpu);
792 assert_no_pages_locked();
795 /* if an exception is pending, we execute it here */
796 while (!cpu_handle_exception(cpu, &ret)) {
797 TranslationBlock *last_tb = NULL;
798 int tb_exit = 0;
800 while (!cpu_handle_interrupt(cpu, &last_tb)) {
801 uint32_t cflags = cpu->cflags_next_tb;
802 TranslationBlock *tb;
804 /* When requested, use an exact setting for cflags for the next
805 execution. This is used for icount, precise smc, and stop-
806 after-access watchpoints. Since this request should never
807 have CF_INVALID set, -1 is a convenient invalid value that
808 does not require tcg headers for cpu_common_reset. */
809 if (cflags == -1) {
810 cflags = curr_cflags();
811 } else {
812 cpu->cflags_next_tb = -1;
815 tb = tb_find(cpu, last_tb, tb_exit, cflags);
816 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
817 /* Try to align the host and virtual clocks
818 if the guest is in advance */
819 align_clocks(&sc, cpu);
823 cpu_exec_exit(cpu);
824 rcu_read_unlock();
826 return ret;
829 #ifndef CONFIG_USER_ONLY
831 void dump_drift_info(void)
833 if (!icount_enabled()) {
834 return;
837 qemu_printf("Host - Guest clock %"PRIi64" ms\n",
838 (cpu_get_clock() - icount_get()) / SCALE_MS);
839 if (icount_align_option) {
840 qemu_printf("Max guest delay %"PRIi64" ms\n",
841 -max_delay / SCALE_MS);
842 qemu_printf("Max guest advance %"PRIi64" ms\n",
843 max_advance / SCALE_MS);
844 } else {
845 qemu_printf("Max guest delay NA\n");
846 qemu_printf("Max guest advance NA\n");
850 #endif /* !CONFIG_USER_ONLY */